diff options
Diffstat (limited to 'gcc/config/i386/i386.h')
| -rw-r--r-- | gcc/config/i386/i386.h | 33 |
1 files changed, 24 insertions, 9 deletions
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 5c2046a49d7..2f47472df2e 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -104,6 +104,13 @@ extern int target_flags; #endif #endif +/* APPLE LOCAL begin mainline 2005-04-11 4010614 */ +#ifndef TARGET_FPMATH_DEFAULT +#define TARGET_FPMATH_DEFAULT \ + (TARGET_64BIT && TARGET_SSE ? FPMATH_SSE : FPMATH_387) +#endif +/* APPLE LOCAL end mainline 2005-04-11 4010614 */ + /* Masks for the -m switches */ #define MASK_80387 0x00000001 /* Hardware floating point */ #define MASK_RTD 0x00000002 /* Use ret that pops args */ @@ -129,7 +136,8 @@ extern int target_flags; #define MASK_MS_BITFIELD_LAYOUT 0x00200000 /* Use native (MS) bitfield layout */ #define MASK_TLS_DIRECT_SEG_REFS 0x00400000 /* Avoid adding %gs:0 */ -/* Unused: 0x03e0000 */ +/* APPLE LOCAL dynamic-no-pic */ +/* Unused: 0x03000000 */ /* ... overlap with subtarget options starts by 0x04000000. */ #define MASK_NO_RED_ZONE 0x04000000 /* Do not use red zone */ @@ -229,7 +237,8 @@ extern int target_flags; #define TUNEMASK (1 << ix86_tune) extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and; -extern const int x86_use_bit_test, x86_cmove, x86_deep_branch; +/* APPLE LOCAL mainline 2005-03-16 4054919 */ +extern const int x86_use_bit_test, x86_cmove, x86_fisttp, x86_deep_branch; extern const int x86_branch_hints, x86_unroll_strlen; extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx; extern const int x86_use_loop, x86_use_fiop, x86_use_mov0; @@ -258,6 +267,8 @@ extern int x86_prefetch_sse; /* For sane SSE instruction set generation we need fcomi instruction. It is safe to enable all CMOVE instructions. */ #define TARGET_CMOVE ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE) +/* APPLE LOCAL mainline 2005-03-16 4054919 */ +#define TARGET_FISTTP (x86_fisttp & (1 << ix86_arch)) #define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & TUNEMASK) #define TARGET_BRANCH_PREDICTION_HINTS (x86_branch_hints & TUNEMASK) #define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & TUNEMASK) @@ -792,7 +803,15 @@ extern int x86_prefetch_sse; #define PARM_BOUNDARY BITS_PER_WORD /* Boundary (in *bits*) on which stack pointer should be aligned. */ -#define STACK_BOUNDARY BITS_PER_WORD +/* APPLE LOCAL begin compiler should obey -mpreferred-stack-boundary (radar 3232990) */ +/* prefer * #define STACK_BOUNDARY ((ix86_preferred_stack_boundary > 128) ? 128 : ix86_preferred_stack_boundary) */ +/* We're going to extremes to yield a result of indeterminite + signedness here; this macro will be expanded in signed and + unsigned contexts, and mixed signedness induces fatal + warnings. Radar 3941684. */ +#define STACK_BOUNDARY ((ix86_preferred_stack_boundary >= 128) ? 128 : \ + (ix86_preferred_stack_boundary == 64) ? 64 : 32) +/* APPLE LOCAL end compiler should obey -mpreferred-stack-boundary (radar 3232990) */ /* Boundary (in *bits*) on which the stack pointer prefers to be aligned; the compiler cannot rely on having this alignment. */ @@ -843,7 +862,8 @@ extern int x86_prefetch_sse; #define BIGGEST_FIELD_ALIGNMENT 32 #endif #else -#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ +/* APPLE LOCAL Macintosh alignment */ +#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED, FIRST_FIELD_P) \ x86_field_alignment (FIELD, COMPUTED) #endif @@ -1107,11 +1127,6 @@ do { \ || (MODE) == V8HImode || (MODE) == V2DFmode || (MODE) == V2DImode \ || (MODE) == V4SFmode || (MODE) == V4SImode) -/* Return true for modes passed in MMX registers. */ -#define MMX_REG_MODE_P(MODE) \ - ((MODE) == V8QImode || (MODE) == V4HImode || (MODE) == V2SImode \ - || (MODE) == V2SFmode) - /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |