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-rw-r--r--gcc/config/m32r/m32r.md28
1 files changed, 14 insertions, 14 deletions
diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md
index 0c76a044ccc..ec0d61f294c 100644
--- a/gcc/config/m32r/m32r.md
+++ b/gcc/config/m32r/m32r.md
@@ -250,7 +250,7 @@
/* Everything except mem = const or mem = mem can be done easily.
Objects in the small data area are handled too. */
- if (GET_CODE (operands[0]) == MEM)
+ if (MEM_P (operands[0]))
operands[1] = force_reg (QImode, operands[1]);
}")
@@ -289,7 +289,7 @@
/* Everything except mem = const or mem = mem can be done easily. */
- if (GET_CODE (operands[0]) == MEM)
+ if (MEM_P (operands[0]))
operands[1] = force_reg (HImode, operands[1]);
}")
@@ -341,7 +341,7 @@
/* Everything except mem = const or mem = mem can be done easily. */
- if (GET_CODE (operands[0]) == MEM)
+ if (MEM_P (operands[0]))
operands[1] = force_reg (SImode, operands[1]);
/* Small Data Area reference? */
@@ -367,7 +367,7 @@
"register_operand (operands[0], SImode) || register_operand (operands[1], SImode)"
"*
{
- if (GET_CODE (operands[0]) == REG || GET_CODE (operands[1]) == SUBREG)
+ if (REG_P (operands[0]) || GET_CODE (operands[1]) == SUBREG)
{
switch (GET_CODE (operands[1]))
{
@@ -409,8 +409,8 @@
}
}
- else if (GET_CODE (operands[0]) == MEM
- && (GET_CODE (operands[1]) == REG || GET_CODE (operands[1]) == SUBREG))
+ else if (MEM_P (operands[0])
+ && (REG_P (operands[1]) || GET_CODE (operands[1]) == SUBREG))
{
if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC
&& XEXP (XEXP (operands[0], 0), 0) == stack_pointer_rtx)
@@ -585,7 +585,7 @@
/* Everything except mem = const or mem = mem can be done easily. */
- if (GET_CODE (operands[0]) == MEM)
+ if (MEM_P (operands[0]))
operands[1] = force_reg (DImode, operands[1]);
}")
@@ -626,7 +626,7 @@
/* Everything except mem = const or mem = mem can be done easily. */
- if (GET_CODE (operands[0]) == MEM)
+ if (MEM_P (operands[0]))
operands[1] = force_reg (SFmode, operands[1]);
}")
@@ -678,7 +678,7 @@
/* Everything except mem = const or mem = mem can be done easily. */
- if (GET_CODE (operands[0]) == MEM)
+ if (MEM_P (operands[0]))
operands[1] = force_reg (DFmode, operands[1]);
}")
@@ -1036,7 +1036,7 @@
&& satisfies_constraint_I (operands[2]))
return \"#\";
- else if (GET_CODE (operands[2]) == CONST_INT)
+ else if (CONST_INT_P (operands[2]))
return \"and3 %0,%1,%#%X2\";
return \"and %0,%2\";
@@ -1067,7 +1067,7 @@
&& satisfies_constraint_I (operands[2]))
return \"#\";
- else if (GET_CODE (operands[2]) == CONST_INT)
+ else if (CONST_INT_P (operands[2]))
return \"or3 %0,%1,%#%X2\";
return \"or %0,%2\";
@@ -1098,7 +1098,7 @@
&& satisfies_constraint_I (operands[2]))
return \"#\";
- else if (GET_CODE (operands[2]) == CONST_INT)
+ else if (CONST_INT_P (operands[2]))
return \"xor3 %0,%1,%#%X2\";
return \"xor %0,%2\";
@@ -1588,7 +1588,7 @@
rtx op3 = operands[3];
HOST_WIDE_INT value;
- if (GET_CODE (op2) == REG && GET_CODE (op3) == REG
+ if (REG_P (op2) && REG_P (op3)
&& REGNO (op2) == REGNO (op3))
{
op1 = operands[2];
@@ -1596,7 +1596,7 @@
}
start_sequence ();
- if (GET_CODE (op1) == REG && GET_CODE (op3) == REG
+ if (REG_P (op1) && REG_P (op3)
&& REGNO (op1) != REGNO (op3))
{
emit_move_insn (op3, op1);