diff options
Diffstat (limited to 'gcc/config/m68hc11/m68hc11.md')
| -rw-r--r-- | gcc/config/m68hc11/m68hc11.md | 297 |
1 files changed, 73 insertions, 224 deletions
diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index 0d40278cebb..f4ff3ebbb4c 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -162,31 +162,11 @@ ;; An offsetable memory operand should be ok. The 'tst_operand' and ;; 'cmp_operand' predicates take care of this rule. ;; -(define_expand "tstsi" - [(set (cc0) - (match_operand:SI 0 "tst_operand" ""))] - "" - " -{ - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = const0_rtx; - DONE; -}") - -(define_expand "tsthi" - [(set (cc0) - (match_operand:HI 0 "tst_operand" ""))] - "" - " -{ - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = const0_rtx; - DONE; -}") (define_insn "tsthi_1" [(set (cc0) - (match_operand:HI 0 "tst_operand" "dx,*y"))] + (compare (match_operand:HI 0 "tst_operand" "dx,*y") + (const_int 0)))] "" "* { @@ -196,34 +176,26 @@ return \"cp%0\\t#0\"; }") -(define_expand "tstqi" - [(set (cc0) - (match_operand:QI 0 "tst_operand" ""))] - "" - " -{ - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = const0_rtx; - DONE; -}") - ;; ;; Split pattern for (tst:QI) on an address register. ;; (define_split [(set (cc0) - (match_operand:QI 0 "hard_addr_reg_operand" ""))] + (compare (match_operand:QI 0 "hard_addr_reg_operand" "") + (const_int 0)))] "z_replacement_completed == 2 && GET_MODE (operands[0]) == QImode" [(parallel [(set (reg:HI D_REGNUM) (match_dup 1)) (set (match_dup 1) (reg:HI D_REGNUM))]) - (set (cc0) (reg:QI D_REGNUM)) + (set (cc0) (compare (reg:QI D_REGNUM) + (const_int 0))) (parallel [(set (reg:HI D_REGNUM) (match_dup 1)) (set (match_dup 1) (reg:HI D_REGNUM))])] "operands[1] = gen_rtx_REG (HImode, REGNO (operands[0]));") (define_insn "tstqi_1" [(set (cc0) - (match_operand:QI 0 "tst_operand" "m,d,*A,!u"))] + (compare (match_operand:QI 0 "tst_operand" "m,d,*A,!u") + (const_int 0)))] "" "* { @@ -252,8 +224,8 @@ ;; after Z register replacement. ;; (define_insn_and_split "tstqi_z_used" - [(set (cc0) - (match_operand:QI 0 "tst_operand" "m")) + [(set (cc0) (compare (match_operand:QI 0 "tst_operand" "m") + (const_int 0))) (use (match_operand:HI 1 "hard_reg_operand" "dxy")) (use (reg:HI SOFT_Z_REGNUM))] "" @@ -261,7 +233,8 @@ "z_replacement_completed == 2" [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNUM))) (match_dup 1)) (set (match_dup 1) (match_dup 2)) - (set (cc0) (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (match_dup 1) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))] "operands[2] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);") @@ -270,21 +243,6 @@ ;;- Compare ;;-------------------------------------------------------------------- -(define_expand "cmpsi" - [(set (cc0) - (compare (match_operand:SI 0 "tst_operand" "") - (match_operand:SI 1 "cmp_operand" "")))] - "" - " -{ - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[0] = force_reg (SImode, operands[0]); - - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = operands[1]; - DONE; -}") - ;; ;; Comparison of a hard register with another one is provided because ;; it helps GCC to avoid to spill a pseudo hard register. @@ -316,21 +274,6 @@ (compare (match_dup 0) (mem:HI (post_inc:HI (reg:HI SP_REGNUM)))))] "") -(define_expand "cmphi" - [(set (cc0) - (compare (match_operand:HI 0 "tst_operand" "") - (match_operand:HI 1 "cmp_operand" "")))] - "" - " -{ - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[0] = force_reg (HImode, operands[0]); - - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = operands[1]; - DONE; -}") - (define_insn "cmphi_1_hc12" [(set (cc0) (compare (match_operand:HI 0 "tst_operand" @@ -419,25 +362,11 @@ operands[3] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM); operands[4] = gen_rtx_REG (HImode, REGNO (operands[1]));") -(define_expand "cmpqi" - [(set (cc0) - (compare (match_operand:QI 0 "tst_operand" "") - (match_operand:QI 1 "cmp_operand" "")))] - "" - " -{ - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[0] = force_reg (QImode, operands[0]); - - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = operands[1]; - DONE; -}") - (define_insn "bitcmpqi" [(set (cc0) - (and:QI (match_operand:QI 0 "tst_operand" "d,d,d,m,!u") - (match_operand:QI 1 "cmp_operand" "im,*B,u,d,d")))] + (compare (and:QI (match_operand:QI 0 "tst_operand" "d,d,d,m,!u") + (match_operand:QI 1 "cmp_operand" "im,*B,u,d,d")) + (const_int 0)))] "" "@ bitb\\t%b1 @@ -448,8 +377,9 @@ (define_split /* "bitcmpqi" */ [(set (cc0) - (and:QI (match_operand:QI 0 "tst_operand" "") - (match_operand:QI 1 "hard_addr_reg_operand" "")))] + (compare (and:QI (match_operand:QI 0 "tst_operand" "") + (match_operand:QI 1 "hard_addr_reg_operand" "")) + (const_int 0)))] "z_replacement_completed == 2" [(set (match_dup 3) (match_dup 2)) (set (cc0) (and:QI (match_dup 0) (match_dup 4)))] @@ -459,8 +389,9 @@ (define_insn_and_split "bitcmpqi_z_used" [(set (cc0) - (and:QI (match_operand:QI 0 "tst_operand" "d,m") - (match_operand:QI 1 "cmp_operand" "m,d"))) + (compare (and:QI (match_operand:QI 0 "tst_operand" "d,m") + (match_operand:QI 1 "cmp_operand" "m,d")) + (const_int 0))) (use (match_operand:HI 2 "hard_reg_operand" "xy,xy")) (use (reg:HI SOFT_Z_REGNUM))] "" @@ -474,8 +405,9 @@ (define_insn "bitcmphi" [(set (cc0) - (and:HI (match_operand:HI 0 "tst_operand" "d") - (match_operand:HI 1 "const_int_operand" "i")))] + (compare (and:HI (match_operand:HI 0 "tst_operand" "d") + (match_operand:HI 1 "const_int_operand" "i")) + (const_int 0)))] "(INTVAL (operands[1]) & 0x0ff) == 0 || (INTVAL (operands[1]) & 0x0ff00) == 0" "* @@ -488,9 +420,10 @@ (define_insn "bitcmpqi_12" [(set (cc0) - (zero_extract (match_operand:HI 0 "tst_operand" "d") - (match_operand:HI 1 "const_int_operand" "i") - (match_operand:HI 2 "const_int_operand" "i")))] + (compare (zero_extract:HI (match_operand:HI 0 "tst_operand" "d") + (match_operand:HI 1 "const_int_operand" "i") + (match_operand:HI 2 "const_int_operand" "i")) + (const_int 0)))] "(unsigned) (INTVAL (operands[2]) + INTVAL (operands[1])) <= 8 || (((unsigned) (INTVAL (operands[2]) + INTVAL (operands[1])) <= 16) && (unsigned) INTVAL (operands[2]) >= 8)" @@ -6134,155 +6067,66 @@ "" "bra\\t%l0") -(define_expand "beq" - [(set (pc) - (if_then_else (eq (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (EQ, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (NE, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchsi4" + [(set (cc0) + (compare (match_operand:SI 1 "tst_operand" "") + (match_operand:SI 2 "cmp_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - m68hc11_expand_compare_and_branch (GT, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") + if (GET_CODE (operands[1]) == MEM && GET_CODE (operands[2]) == MEM) + operands[1] = force_reg (SImode, operands[1]); -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (GTU, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); + m68hc11_expand_compare_and_branch (GET_CODE (operands[0]), operands[1], + operands[2], operands[3]); DONE; }") -(define_expand "blt" - [(set (pc) - (if_then_else (lt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (LT, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchhi4" + [(set (cc0) + (compare (match_operand:HI 1 "tst_operand" "") + (match_operand:HI 2 "cmp_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - m68hc11_expand_compare_and_branch (LTU, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") + if (GET_CODE (operands[1]) == MEM && GET_CODE (operands[2]) == MEM) + operands[1] = force_reg (HImode, operands[1]); -(define_expand "bge" - [(set (pc) - (if_then_else (ge (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (GE, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); + m68hc11_expand_compare_and_branch (GET_CODE (operands[0]), operands[1], + operands[2], operands[3]); DONE; }") -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchqi4" + [(set (cc0) + (compare (match_operand:QI 1 "tst_operand" "") + (match_operand:QI 2 "cmp_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - m68hc11_expand_compare_and_branch (GEU, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") + if (GET_CODE (operands[1]) == MEM && GET_CODE (operands[2]) == MEM) + operands[1] = force_reg (QImode, operands[1]); -(define_expand "ble" - [(set (pc) - (if_then_else (le (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (LE, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); + m68hc11_expand_compare_and_branch (GET_CODE (operands[0]), operands[1], + operands[2], operands[3]); DONE; }") -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (LEU, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") ;; ;; Test and branch instructions for 68HC12 for EQ and NE. @@ -7091,11 +6935,14 @@ (plus:HI (match_dup 0) (match_operand:HI 1 "const_int_operand" ""))) (set (cc0) - (match_operand:QI 2 "memory_operand" ""))] + (compare (match_operand:QI 2 "memory_operand" "") + (const_int 0)))] "TARGET_AUTO_INC_DEC && (INTVAL (operands[1]) == -1 || INTVAL (operands[1]) == 1) && reg_mentioned_p (operands[0], operands[2])" - [(set (cc0) (match_dup 3))] + [(set (cc0) + (compare (match_dup 3) + (const_int 0)))] "if (INTVAL (operands[1]) == 1) operands[3] = gen_rtx_MEM (QImode, gen_rtx_PRE_INC (HImode, operands[0])); @@ -7326,7 +7173,8 @@ (match_operand:HI 1 "hard_reg_operand" "")) (set (match_dup 1) (plus:HI (match_dup 1) (match_operand:HI 2 "const_int_operand" ""))) - (set (cc0) (match_dup 0))] + (set (cc0) (compare (match_dup 0) + (const_int 0)))] "peep2_reg_dead_p (3, operands[0]) && !Z_REG_P (operands[1])" [(set (match_dup 1) (plus:HI (match_dup 1) (match_dup 2))) (set (cc0) (compare (match_dup 1) (match_dup 2)))] @@ -7339,7 +7187,8 @@ (plus:HI (match_dup 2) (match_operand:HI 3 "const_int_operand" ""))) (set (match_operand:HI 4 "memory_operand" "") (match_dup 2)) - (set (cc0) (match_operand:HI 5 "hard_reg_operand" ""))] + (set (cc0) (compare (match_operand:HI 5 "hard_reg_operand" "") + (const_int 0)))] "peep2_reg_dead_p (4, operands[5]) && !Z_REG_P (operands[2]) && !reg_mentioned_p (operands[2], operands[4]) |