diff options
Diffstat (limited to 'gcc/config/mips/loongson.md')
| -rw-r--r-- | gcc/config/mips/loongson.md | 56 |
1 files changed, 32 insertions, 24 deletions
diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md index 0b19bd7baf8..b8489ab5ab9 100644 --- a/gcc/config/mips/loongson.md +++ b/gcc/config/mips/loongson.md @@ -852,58 +852,66 @@ "dsrl\t%0,%1,%2" [(set_attr "type" "fcvt")]) -(define_expand "reduc_uplus_<mode>" - [(match_operand:VWH 0 "register_operand" "") - (match_operand:VWH 1 "register_operand" "")] +(define_insn "vec_loongson_extract_lo_<mode>" + [(set (match_operand:<V_inner> 0 "register_operand" "=r") + (vec_select:<V_inner> + (match_operand:VWHB 1 "register_operand" "f") + (parallel [(const_int 0)])))] "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" -{ - mips_expand_vec_reduc (operands[0], operands[1], gen_add<mode>3); - DONE; -}) + "mfc1\t%0,%1" + [(set_attr "type" "mfc")]) -; ??? Given that we're not describing a widening reduction, we should -; not have separate optabs for signed and unsigned. -(define_expand "reduc_splus_<mode>" - [(match_operand:VWHB 0 "register_operand" "") +(define_expand "reduc_plus_scal_<mode>" + [(match_operand:<V_inner> 0 "register_operand" "") (match_operand:VWHB 1 "register_operand" "")] "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" { - emit_insn (gen_reduc_uplus_<mode>(operands[0], operands[1])); + rtx tmp = gen_reg_rtx (GET_MODE (operands[1])); + mips_expand_vec_reduc (tmp, operands[1], gen_add<mode>3); + emit_insn (gen_vec_loongson_extract_lo_<mode> (operands[0], tmp)); DONE; }) -(define_expand "reduc_smax_<mode>" - [(match_operand:VWHB 0 "register_operand" "") +(define_expand "reduc_smax_scal_<mode>" + [(match_operand:<V_inner> 0 "register_operand" "") (match_operand:VWHB 1 "register_operand" "")] "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" { - mips_expand_vec_reduc (operands[0], operands[1], gen_smax<mode>3); + rtx tmp = gen_reg_rtx (GET_MODE (operands[1])); + mips_expand_vec_reduc (tmp, operands[1], gen_smax<mode>3); + emit_insn (gen_vec_loongson_extract_lo_<mode> (operands[0], tmp)); DONE; }) -(define_expand "reduc_smin_<mode>" - [(match_operand:VWHB 0 "register_operand" "") +(define_expand "reduc_smin_scal_<mode>" + [(match_operand:<V_inner> 0 "register_operand" "") (match_operand:VWHB 1 "register_operand" "")] "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" { - mips_expand_vec_reduc (operands[0], operands[1], gen_smin<mode>3); + rtx tmp = gen_reg_rtx (GET_MODE (operands[1])); + mips_expand_vec_reduc (tmp, operands[1], gen_smin<mode>3); + emit_insn (gen_vec_loongson_extract_lo_<mode> (operands[0], tmp)); DONE; }) -(define_expand "reduc_umax_<mode>" - [(match_operand:VB 0 "register_operand" "") +(define_expand "reduc_umax_scal_<mode>" + [(match_operand:<V_inner> 0 "register_operand" "") (match_operand:VB 1 "register_operand" "")] "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" { - mips_expand_vec_reduc (operands[0], operands[1], gen_umax<mode>3); + rtx tmp = gen_reg_rtx (GET_MODE (operands[1])); + mips_expand_vec_reduc (tmp, operands[1], gen_umax<mode>3); + emit_insn (gen_vec_loongson_extract_lo_<mode> (operands[0], tmp)); DONE; }) -(define_expand "reduc_umin_<mode>" - [(match_operand:VB 0 "register_operand" "") +(define_expand "reduc_umin_scal_<mode>" + [(match_operand:<V_inner> 0 "register_operand" "") (match_operand:VB 1 "register_operand" "")] "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" { - mips_expand_vec_reduc (operands[0], operands[1], gen_umin<mode>3); + rtx tmp = gen_reg_rtx (GET_MODE (operands[1])); + mips_expand_vec_reduc (tmp, operands[1], gen_umin<mode>3); + emit_insn (gen_vec_loongson_extract_lo_<mode> (operands[0], tmp)); DONE; }) |