diff options
Diffstat (limited to 'gcc/config/s390/s390.md')
| -rw-r--r-- | gcc/config/s390/s390.md | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 752d2944cda..0fc7b807c99 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -833,7 +833,7 @@ "TARGET_64BIT" { gcc_assert (MEM_P (operands[0])); - s390_load_address (operands[2], XEXP (operands[0], 0)); + s390_load_address (operands[2], find_replacement (&XEXP (operands[0], 0))); operands[0] = replace_equiv_address (operands[0], operands[2]); emit_move_insn (operands[0], operands[1]); DONE; @@ -992,7 +992,7 @@ "!TARGET_64BIT" { gcc_assert (MEM_P (operands[0])); - s390_load_address (operands[2], XEXP (operands[0], 0)); + s390_load_address (operands[2], find_replacement (&XEXP (operands[0], 0))); operands[0] = replace_equiv_address (operands[0], operands[2]); emit_move_insn (operands[0], operands[1]); DONE; @@ -1451,7 +1451,7 @@ "!TARGET_64BIT" { gcc_assert (MEM_P (operands[0])); - s390_load_address (operands[2], XEXP (operands[0], 0)); + s390_load_address (operands[2], find_replacement (&XEXP (operands[0], 0))); operands[0] = replace_equiv_address (operands[0], operands[2]); emit_move_insn (operands[0], operands[1]); DONE; @@ -2660,6 +2660,27 @@ ; LLGT-type instructions (zero-extend from 31 bit to 64 bit). ; +(define_insn "*llgt_sidi" + [(set (match_operand:DI 0 "register_operand" "=d") + (and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "m") 0) + (const_int 2147483647)))] + "TARGET_64BIT" + "llgt\t%0,%1" + [(set_attr "op_type" "RXE")]) + +(define_insn_and_split "*llgt_sidi_split" + [(set (match_operand:DI 0 "register_operand" "=d") + (and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "m") 0) + (const_int 2147483647))) + (clobber (reg:CC 33))] + "TARGET_64BIT" + "#" + "&& reload_completed" + [(set (match_dup 0) + (and:DI (subreg:DI (match_dup 1) 0) + (const_int 2147483647)))] + "") + (define_insn "*llgt_sisi" [(set (match_operand:SI 0 "register_operand" "=d,d") (and:SI (match_operand:SI 1 "nonimmediate_operand" "d,m") @@ -2702,27 +2723,6 @@ (const_int 2147483647)))] "") -(define_insn "*llgt_sidi" - [(set (match_operand:DI 0 "register_operand" "=d") - (and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "m") 0) - (const_int 2147483647)))] - "TARGET_64BIT" - "llgt\t%0,%1" - [(set_attr "op_type" "RXE")]) - -(define_insn_and_split "*llgt_sidi_split" - [(set (match_operand:DI 0 "register_operand" "=d") - (and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "m") 0) - (const_int 2147483647))) - (clobber (reg:CC 33))] - "TARGET_64BIT" - "#" - "&& reload_completed" - [(set (match_dup 0) - (and:DI (subreg:DI (match_dup 1) 0) - (const_int 2147483647)))] - "") - ; ; zero_extendqidi2 instruction pattern(s) ; @@ -7780,18 +7780,18 @@ (define_expand "set_tp_64" [(set (reg:DI 36) (match_operand:DI 0 "nonimmediate_operand" "")) - (unspec_volatile [(reg:DI 36)] UNSPECV_SET_TP)] + (set (reg:DI 36) (unspec_volatile:DI [(reg:DI 36)] UNSPECV_SET_TP))] "TARGET_64BIT" "") (define_expand "set_tp_31" [(set (reg:SI 36) (match_operand:SI 0 "nonimmediate_operand" "")) - (unspec_volatile [(reg:SI 36)] UNSPECV_SET_TP)] + (set (reg:SI 36) (unspec_volatile:SI [(reg:SI 36)] UNSPECV_SET_TP))] "!TARGET_64BIT" "") (define_insn "*set_tp" - [(unspec_volatile [(reg 36)] UNSPECV_SET_TP)] + [(set (reg 36) (unspec_volatile [(reg 36)] UNSPECV_SET_TP))] "" "" [(set_attr "type" "none") |