aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/tilegx/sync.md
diff options
context:
space:
mode:
Diffstat (limited to 'gcc/config/tilegx/sync.md')
-rw-r--r--gcc/config/tilegx/sync.md46
1 files changed, 46 insertions, 0 deletions
diff --git a/gcc/config/tilegx/sync.md b/gcc/config/tilegx/sync.md
index a853996162a..a4bea6b6889 100644
--- a/gcc/config/tilegx/sync.md
+++ b/gcc/config/tilegx/sync.md
@@ -162,3 +162,49 @@
tilegx_post_atomic_barrier (model);
DONE;
})
+
+
+(define_expand "atomic_test_and_set"
+ [(match_operand:QI 0 "register_operand" "") ;; bool output
+ (match_operand:QI 1 "nonautoincmem_operand" "+U") ;; memory
+ (match_operand:SI 2 "const_int_operand" "")] ;; model
+ ""
+{
+ rtx addr, aligned_addr, aligned_mem, offset, word, shmt;
+ rtx tmp0, tmp1;
+ rtx result = operands[0];
+ rtx mem = operands[1];
+ enum memmodel model = (enum memmodel) INTVAL (operands[2]);
+
+ addr = force_reg (Pmode, XEXP (mem, 0));
+
+ aligned_addr = gen_reg_rtx (Pmode);
+ emit_move_insn (aligned_addr, gen_rtx_AND (Pmode, addr, GEN_INT (-8)));
+
+ aligned_mem = change_address (mem, DImode, aligned_addr);
+ set_mem_alias_set (aligned_mem, 0);
+
+ offset = gen_reg_rtx (DImode);
+ emit_move_insn (offset, gen_rtx_AND (DImode, gen_lowpart (DImode, addr),
+ GEN_INT (7)));
+
+ tmp0 = gen_reg_rtx (DImode);
+ emit_move_insn (tmp0, GEN_INT (1));
+
+ shmt = gen_reg_rtx (DImode);
+ emit_move_insn (shmt, gen_rtx_ASHIFT (DImode, offset, GEN_INT (3)));
+
+ word = gen_reg_rtx (DImode);
+ emit_move_insn (word, gen_rtx_ASHIFT (DImode, tmp0,
+ gen_lowpart (SImode, shmt)));
+
+ tmp1 = gen_reg_rtx (DImode);
+ tilegx_pre_atomic_barrier (model);
+ emit_insn (gen_atomic_fetch_or_baredi (tmp1, aligned_mem, word));
+ tilegx_post_atomic_barrier (model);
+
+ emit_move_insn (gen_lowpart (DImode, result),
+ gen_rtx_LSHIFTRT (DImode, tmp1,
+ gen_lowpart (SImode, shmt)));
+ DONE;
+})