diff options
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 41 |
1 files changed, 35 insertions, 6 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 587e30e613d..dc9a4e73712 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -169,10 +169,11 @@ in the following sections. -aux-info @var{filename} -fallow-parameterless-variadic-functions @gol -fno-asm -fno-builtin -fno-builtin-@var{function} @gol -fhosted -ffreestanding -fopenacc -fopenmp -fopenmp-simd @gol --fms-extensions -fplan9-extensions -trigraphs -traditional -traditional-cpp @gol +-fms-extensions -fplan9-extensions -fsso-struct=@var{endianness} -fallow-single-precision -fcond-mismatch -flax-vector-conversions @gol -fsigned-bitfields -fsigned-char @gol --funsigned-bitfields -funsigned-char} +-funsigned-bitfields -funsigned-char @gol +-trigraphs -traditional -traditional-cpp} @item C++ Language Options @xref{C++ Dialect Options,,Options Controlling C++ Dialect}. @@ -278,6 +279,7 @@ Objective-C and Objective-C++ Dialects}. -Wshift-overflow -Wshift-overflow=@var{n} @gol -Wshift-count-negative -Wshift-count-overflow -Wshift-negative-value @gol -Wsign-compare -Wsign-conversion -Wfloat-conversion @gol +-Wno-scalar-storage-order @gol -Wsizeof-pointer-memaccess -Wsizeof-array-argument @gol -Wstack-protector -Wstack-usage=@var{len} -Wstrict-aliasing @gol -Wstrict-aliasing=n @gol -Wstrict-overflow -Wstrict-overflow=@var{n} @gol @@ -521,6 +523,7 @@ Objective-C and Objective-C++ Dialects}. -mtls-size=@var{size} @gol -mfix-cortex-a53-835769 -mno-fix-cortex-a53-835769 @gol -mfix-cortex-a53-843419 -mno-fix-cortex-a53-843419 @gol +-mlow-precision-recip-sqrt -mno-low-precision-recip-sqrt@gol -march=@var{name} -mcpu=@var{name} -mtune=@var{name}} @emph{Adapteva Epiphany Options} @@ -2075,6 +2078,17 @@ These options control whether a bit-field is signed or unsigned, when the declaration does not use either @code{signed} or @code{unsigned}. By default, such a bit-field is signed, because this is consistent: the basic integer types such as @code{int} are signed types. + +@item -fsso-struct=@var{endianness} +@opindex fsso-struct +Set the default scalar storage order of structures and unions to the +specified endianness. The accepted values are @samp{big-endian} and +@samp{little-endian}. If the option is not passed, the compiler uses +the native endianness of the target. This option is not supported for C++. + +@strong{Warning:} the @option{-fsso-struct} switch causes GCC to generate +code that is not binary compatible with code generated without it if the +specified endianness is not the native endianness of the target. @end table @node C++ Dialect Options @@ -5112,6 +5126,11 @@ This includes conversions from real to integer, and from higher precision real to lower precision real values. This option is also enabled by @option{-Wconversion}. +@item -Wno-scalar-storage-order +@opindex -Wno-scalar-storage-order +@opindex -Wscalar-storage-order +Do not warn on suspicious constructs involving reverse scalar storage order. + @item -Wsized-deallocation @r{(C++ and Objective-C++ only)} @opindex Wsized-deallocation @opindex Wno-sized-deallocation @@ -12519,6 +12538,17 @@ Enable or disable the workaround for the ARM Cortex-A53 erratum number 843419. This erratum workaround is made at link time and this will only pass the corresponding flag to the linker. +@item -mlow-precision-recip-sqrt +@item -mno-low-precision-recip-sqrt +@opindex -mlow-precision-recip-sqrt +@opindex -mno-low-precision-recip-sqrt +The square root estimate uses two steps instead of three for double-precision, +and one step instead of two for single-precision. +Thus reducing latency and precision. +This is only relevant if @option{-ffast-math} activates +reciprocal square root estimate instructions. +Which in turn depends on the target processor. + @item -march=@var{name} @opindex march Specify the name of the target architecture, optionally suffixed by one or @@ -13745,10 +13775,9 @@ off by default. @item -masm-syntax-unified @opindex masm-syntax-unified Assume inline assembler is using unified asm syntax. The default is -currently off which implies divided syntax. Currently this option is -available only for Thumb1 and has no effect on ARM state and Thumb2. -However, this may change in future releases of GCC. Divided syntax -should be considered deprecated. +currently off which implies divided syntax. This option has no impact +on Thumb2. However, this may change in future releases of GCC. +Divided syntax should be considered deprecated. @item -mrestrict-it @opindex mrestrict-it |