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-rw-r--r--gcc/doc/invoke.texi195
1 files changed, 124 insertions, 71 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 87f1252d585..59b7c822d23 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -341,8 +341,9 @@ Objective-C and Objective-C++ Dialects}.
-fno-toplevel-reorder -fno-trapping-math -fno-zero-initialized-in-bss @gol
-fomit-frame-pointer -foptimize-register-move -foptimize-sibling-calls @gol
-fpeel-loops -fpredictive-commoning -fprefetch-loop-arrays @gol
--fprofile-generate -fprofile-use -fprofile-values -freciprocal-math @gol
--fregmove -frename-registers -freorder-blocks @gol
+-fprofile-dir=@var{path} -fprofile-generate -fprofile-generate=@var{path} @gol
+-fprofile-use -fprofile-use=@var{path} -fprofile-values @gol
+-freciprocal-math -fregmove -frename-registers -freorder-blocks @gol
-freorder-blocks-and-partition -freorder-functions @gol
-frerun-cse-after-loop -freschedule-modulo-scheduled-loops @gol
-frounding-math -frtl-abstract-sequences -fsched2-use-superblocks @gol
@@ -554,6 +555,7 @@ Objective-C and Objective-C++ Dialects}.
-mno-wide-multiply -mrtd -malign-double @gol
-mpreferred-stack-boundary=@var{num} -mcx16 -msahf -mrecip @gol
-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 @gol
+-maes -mpclmul @gol
-msse4a -m3dnow -mpopcnt -mabm -msse5 @gol
-mthreads -mno-align-stringops -minline-all-stringops @gol
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
@@ -744,7 +746,7 @@ See RS/6000 and PowerPC Options.
-m5-compact -m5-compact-nofpu @gol
-mb -ml -mdalign -mrelax @gol
-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
--mieee -misize -minline-ic_invalidate -mpadstruct -mspace @gol
+-mieee -mbitops -misize -minline-ic_invalidate -mpadstruct -mspace @gol
-mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
-mdivsi3_libfunc=@var{name} @gol
-madjust-unroll -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
@@ -930,21 +932,27 @@ C++ header file to be turned into a precompiled header.
@item @var{file}.f
@itemx @var{file}.for
-@itemx @var{file}.FOR
+@itemx @var{file}.ftn
Fixed form Fortran source code which should not be preprocessed.
@item @var{file}.F
+@itemx @var{file}.FOR
@itemx @var{file}.fpp
@itemx @var{file}.FPP
+@itemx @var{file}.FTN
Fixed form Fortran source code which must be preprocessed (with the traditional
preprocessor).
@item @var{file}.f90
@itemx @var{file}.f95
+@itemx @var{file}.f03
+@itemx @var{file}.f08
Free form Fortran source code which should not be preprocessed.
@item @var{file}.F90
@itemx @var{file}.F95
+@itemx @var{file}.F03
+@itemx @var{file}.F08
Free form Fortran source code which must be preprocessed (with the
traditional preprocessor).
@@ -961,7 +969,7 @@ instantiation), or a library unit renaming declaration (a package,
generic, or subprogram renaming declaration). Such files are also
called @dfn{specs}.
-@itemx @var{file}.adb
+@item @var{file}.adb
Ada source code file containing a library unit body (a subprogram or
package body). Such files are also called @dfn{bodies}.
@@ -4431,7 +4439,7 @@ dbg_cnt(dce) will return true only for first 10 invocations
and dbg_cnt(tail_call) will return false always.
@item -d@var{letters}
-@item -fdump-rtl-@var{pass}
+@itemx -fdump-rtl-@var{pass}
@opindex d
Says to make debugging dumps during compilation at times specified by
@var{letters}. This is used for debugging the RTL-based passes of the
@@ -4451,16 +4459,16 @@ letters for use in @var{letters} and @var{pass}, and their meanings:
@opindex dA
Annotate the assembler output with miscellaneous debugging information.
-@itemx -fdump-rtl-bbro
+@item -fdump-rtl-bbro
@opindex fdump-rtl-bbro
Dump after block reordering, to @file{@var{file}.148r.bbro}.
-@itemx -fdump-rtl-combine
+@item -fdump-rtl-combine
@opindex fdump-rtl-combine
Dump after the RTL instruction combination pass, to the file
@file{@var{file}.129r.combine}.
-@itemx -fdump-rtl-ce1
+@item -fdump-rtl-ce1
@itemx -fdump-rtl-ce2
@opindex fdump-rtl-ce1
@opindex fdump-rtl-ce2
@@ -4469,7 +4477,7 @@ first if conversion, to the file @file{@var{file}.117r.ce1}.
@option{-fdump-rtl-ce2} enable dumping after the second if
conversion, to the file @file{@var{file}.130r.ce2}.
-@itemx -fdump-rtl-btl
+@item -fdump-rtl-btl
@itemx -fdump-rtl-dbr
@opindex fdump-rtl-btl
@opindex fdump-rtl-dbr
@@ -4483,11 +4491,11 @@ scheduling, to @file{@var{file}.36.dbr}.
Dump all macro definitions, at the end of preprocessing, in addition to
normal output.
-@itemx -fdump-rtl-ce3
+@item -fdump-rtl-ce3
@opindex fdump-rtl-ce3
Dump after the third if conversion, to @file{@var{file}.146r.ce3}.
-@itemx -fdump-rtl-cfg
+@item -fdump-rtl-cfg
@itemx -fdump-rtl-life
@opindex fdump-rtl-cfg
@opindex fdump-rtl-life
@@ -4496,11 +4504,11 @@ and data flow analysis, to @file{@var{file}.116r.cfg}.
@option{-fdump-rtl-cfg} enable dumping dump after life analysis,
to @file{@var{file}.128r.life1} and @file{@var{file}.135r.life2}.
-@itemx -fdump-rtl-greg
+@item -fdump-rtl-greg
@opindex fdump-rtl-greg
Dump after global register allocation, to @file{@var{file}.139r.greg}.
-@itemx -fdump-rtl-gcse
+@item -fdump-rtl-gcse
@itemx -fdump-rtl-bypass
@opindex fdump-rtl-gcse
@opindex fdump-rtl-bypass
@@ -4509,28 +4517,28 @@ Dump after global register allocation, to @file{@var{file}.139r.greg}.
enable dumping after jump bypassing and control flow optimizations, to
@file{@var{file}.115r.bypass}.
-@itemx -fdump-rtl-eh
+@item -fdump-rtl-eh
@opindex fdump-rtl-eh
Dump after finalization of EH handling code, to @file{@var{file}.02.eh}.
-@itemx -fdump-rtl-sibling
+@item -fdump-rtl-sibling
@opindex fdump-rtl-sibling
Dump after sibling call optimizations, to @file{@var{file}.106r.sibling}.
-@itemx -fdump-rtl-jump
+@item -fdump-rtl-jump
@opindex fdump-rtl-jump
Dump after the first jump optimization, to @file{@var{file}.112r.jump}.
-@itemx -fdump-rtl-stack
+@item -fdump-rtl-stack
@opindex fdump-rtl-stack
Dump after conversion from GCC's "flat register file" registers to the
x87's stack-like registers, to @file{@var{file}.152r.stack}.
-@itemx -fdump-rtl-lreg
+@item -fdump-rtl-lreg
@opindex fdump-rtl-lreg
Dump after local register allocation, to @file{@var{file}.138r.lreg}.
-@itemx -fdump-rtl-loop2
+@item -fdump-rtl-loop2
@opindex fdump-rtl-loop2
@option{-dL} and @option{-fdump-rtl-loop2} enable dumping after the
loop optimization pass, to @file{@var{file}.119r.loop2},
@@ -4538,54 +4546,54 @@ loop optimization pass, to @file{@var{file}.119r.loop2},
@file{@var{file}.121r.loop2_invariant}, and
@file{@var{file}.125r.loop2_done}.
-@itemx -fdump-rtl-sms
+@item -fdump-rtl-sms
@opindex fdump-rtl-sms
Dump after modulo scheduling, to @file{@var{file}.136r.sms}.
-@itemx -fdump-rtl-mach
+@item -fdump-rtl-mach
@opindex fdump-rtl-mach
Dump after performing the machine dependent reorganization pass, to
@file{@var{file}.155r.mach} if that pass exists.
-@itemx -fdump-rtl-rnreg
+@item -fdump-rtl-rnreg
@opindex fdump-rtl-rnreg
Dump after register renumbering, to @file{@var{file}.147r.rnreg}.
-@itemx -fdump-rtl-regmove
+@item -fdump-rtl-regmove
@opindex fdump-rtl-regmove
Dump after the register move pass, to @file{@var{file}.132r.regmove}.
-@itemx -fdump-rtl-postreload
+@item -fdump-rtl-postreload
@opindex fdump-rtl-postreload
Dump after post-reload optimizations, to @file{@var{file}.24.postreload}.
-@itemx -fdump-rtl-expand
+@item -fdump-rtl-expand
@opindex fdump-rtl-expand
Dump after RTL generation, to @file{@var{file}.104r.expand}.
-@itemx -fdump-rtl-sched2
+@item -fdump-rtl-sched2
@opindex fdump-rtl-sched2
Dump after the second scheduling pass, to @file{@var{file}.149r.sched2}.
-@itemx -fdump-rtl-cse
+@item -fdump-rtl-cse
@opindex fdump-rtl-cse
Dump after CSE (including the jump optimization that sometimes follows
CSE), to @file{@var{file}.113r.cse}.
-@itemx -fdump-rtl-sched1
+@item -fdump-rtl-sched1
@opindex fdump-rtl-sched1
Dump after the first scheduling pass, to @file{@var{file}.136r.sched1}.
-@itemx -fdump-rtl-cse2
+@item -fdump-rtl-cse2
@opindex fdump-rtl-cse2
Dump after the second CSE pass (including the jump optimization that
sometimes follows CSE), to @file{@var{file}.127r.cse2}.
-@itemx -fdump-rtl-tracer
+@item -fdump-rtl-tracer
@opindex fdump-rtl-tracer
Dump after running tracer, to @file{@var{file}.118r.tracer}.
-@itemx -fdump-rtl-vpt
+@item -fdump-rtl-vpt
@itemx -fdump-rtl-vartrack
@opindex fdump-rtl-vpt
@opindex fdump-rtl-vartrack
@@ -4594,19 +4602,19 @@ profile transformations, to @file{@var{file}.10.vpt}.
@option{-fdump-rtl-vartrack} enable dumping after variable tracking,
to @file{@var{file}.154r.vartrack}.
-@itemx -fdump-rtl-flow2
+@item -fdump-rtl-flow2
@opindex fdump-rtl-flow2
Dump after the second flow pass, to @file{@var{file}.142r.flow2}.
-@itemx -fdump-rtl-peephole2
+@item -fdump-rtl-peephole2
@opindex fdump-rtl-peephole2
Dump after the peephole pass, to @file{@var{file}.145r.peephole2}.
-@itemx -fdump-rtl-web
+@item -fdump-rtl-web
@opindex fdump-rtl-web
Dump after live range splitting, to @file{@var{file}.126r.web}.
-@itemx -fdump-rtl-all
+@item -fdump-rtl-all
@opindex fdump-rtl-all
Produce all the dumps listed above.
@@ -6156,13 +6164,22 @@ using twos complement arithmetic. When this option is in effect any
attempt to determine whether an operation on signed numbers will
overflow must be written carefully to not actually involve overflow.
+This option also allows the compiler to assume strict pointer
+semantics: given a pointer to an object, if adding an offset to that
+pointer does not produce a pointer to the same object, the addition is
+undefined. This permits the compiler to conclude that @code{p + u >
+p} is always true for a pointer @code{p} and unsigned integer
+@code{u}. This assumption is only valid because pointer wraparound is
+undefined, as the expression is false if @code{p + u} overflows using
+twos complement arithmetic.
+
See also the @option{-fwrapv} option. Using @option{-fwrapv} means
-that signed overflow is fully defined: it wraps. When
+that integer signed overflow is fully defined: it wraps. When
@option{-fwrapv} is used, there is no difference between
-@option{-fstrict-overflow} and @option{-fno-strict-overflow}. With
-@option{-fwrapv} certain types of overflow are permitted. For
-example, if the compiler gets an overflow when doing arithmetic on
-constants, the overflowed value can still be used with
+@option{-fstrict-overflow} and @option{-fno-strict-overflow} for
+integers. With @option{-fwrapv} certain types of overflow are
+permitted. For example, if the compiler gets an overflow when doing
+arithmetic on constants, the overflowed value can still be used with
@option{-fwrapv}, but not otherwise.
The @option{-fstrict-overflow} option is enabled at levels
@@ -6314,7 +6331,19 @@ and occasionally eliminate the copy.
Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+@item -fprofile-dir=@var{path}
+@opindex fprofile-dir
+
+Set the directory to search the profile data files in to @var{path}.
+This option affects only the profile data generated by
+@option{-fprofile-generate}, @option{-ftest-coverage}, @option{-fprofile-arcs}
+and used by @option{-fprofile-use} and @option{-fbranch-probabilities}
+and its related options.
+By default, GCC will use the current directory as @var{path}
+thus the profile data file will appear in the same directory as the object file.
+
@item -fprofile-generate
+@itemx -fprofile-generate=@var{path}
@opindex fprofile-generate
Enable options usually used for instrumenting application to produce
@@ -6324,7 +6353,11 @@ compiling and when linking your program.
The following options are enabled: @code{-fprofile-arcs}, @code{-fprofile-values}, @code{-fvpt}.
+If @var{path} is specified, GCC will look at the @var{path} to find
+the profile feeedback data files. See @option{-fprofile-dir}.
+
@item -fprofile-use
+@itemx -fprofile-use=@var{path}
@opindex fprofile-use
Enable profile feedback directed optimizations, and optimizations
generally profitable only with profile feedback available.
@@ -6336,6 +6369,9 @@ By default, GCC emits an error message if the feedback profiles do not
match the source code. This error can be turned into a warning by using
@option{-Wcoverage-mismatch}. Note this may result in poorly optimized
code.
+
+If @var{path} is specified, GCC will look at the @var{path} to find
+the profile feedback data files. See @option{-fprofile-dir}.
@end table
The following options control compiler behavior regarding floating
@@ -8542,7 +8578,7 @@ assembly code. Permissible names are: @samp{arm2}, @samp{arm250},
@samp{cortex-a8}, @samp{cortex-r4}, @samp{cortex-m3}, @samp{cortex-m1},
@samp{xscale}, @samp{iwmmxt}, @samp{ep9312}.
-@itemx -mtune=@var{name}
+@item -mtune=@var{name}
@opindex mtune
This option is very similar to the @option{-mcpu=} option, except that
instead of specifying the actual target processor type, and hence
@@ -9320,7 +9356,6 @@ one controlled by the @option{-mcpu} or @option{-march} option.
@itemx -unexported_symbols_list
@itemx -weak_reference_mismatches
@itemx -whatsloaded
-
@opindex allowable_client
@opindex client_name
@opindex compatibility_version
@@ -9379,7 +9414,6 @@ one controlled by the @option{-mcpu} or @option{-march} option.
@opindex unexported_symbols_list
@opindex weak_reference_mismatches
@opindex whatsloaded
-
These options are passed to the Darwin linker. The Darwin linker man page
describes them in detail.
@end table
@@ -10691,29 +10725,33 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
@item -mmmx
@itemx -mno-mmx
-@item -msse
+@itemx -msse
@itemx -mno-sse
-@item -msse2
+@itemx -msse2
@itemx -mno-sse2
-@item -msse3
+@itemx -msse3
@itemx -mno-sse3
-@item -mssse3
+@itemx -mssse3
@itemx -mno-ssse3
-@item -msse4.1
+@itemx -msse4.1
@itemx -mno-sse4.1
-@item -msse4.2
+@itemx -msse4.2
@itemx -mno-sse4.2
-@item -msse4
+@itemx -msse4
@itemx -mno-sse4
-@item -msse4a
-@item -mno-sse4a
-@item -msse5
+@itemx -maes
+@itemx -mno-aes
+@itemx -mpclmul
+@itemx -mno-pclmul
+@itemx -msse4a
+@itemx -mno-sse4a
+@itemx -msse5
@itemx -mno-sse5
-@item -m3dnow
+@itemx -m3dnow
@itemx -mno-3dnow
-@item -mpopcnt
+@itemx -mpopcnt
@itemx -mno-popcnt
-@item -mabm
+@itemx -mabm
@itemx -mno-abm
@opindex mmmx
@opindex mno-mmx
@@ -10722,8 +10760,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
@opindex m3dnow
@opindex mno-3dnow
These switches enable or disable the use of instructions in the MMX,
-SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4A, SSE5, ABM or 3DNow!@: extended
-instruction sets.
+SSE, SSE2, SSE3, SSSE3, SSE4.1, AES, PCLMUL, SSE4A, SSE5, ABM or
+3DNow!@: extended instruction sets.
These extensions are also available as built-in functions: see
@ref{X86 Built-in Functions}, for details of the functions enabled and
disabled by these switches.
@@ -10770,15 +10808,26 @@ decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
@item -mveclibabi=@var{type}
@opindex mveclibabi
Specifies the ABI type to use for vectorizing intrinsics using an
-external library. Supported types are @code{acml} for the AMD
-math core library style of interfacing. GCC will currently emit
-calls to @code{__vrd2_sin}, @code{__vrd2_cos}, @code{__vrd2_exp},
-@code{__vrd2_log}, @code{__vrd2_log2}, @code{__vrd2_log10},
-@code{__vrs4_sinf}, @code{__vrs4_cosf}, @code{__vrs4_expf},
-@code{__vrs4_logf}, @code{__vrs4_log2f}, @code{__vrs4_log10f}
-and @code{__vrs4_powf} when using this type and @option{-ftree-vectorize}
-is enabled. A ACML ABI compatible library will have to be specified
-at link time.
+external library. Supported types are @code{svml} for the Intel short
+vector math library and @code{acml} for the AMD math core library style
+of interfacing. GCC will currently emit calls to @code{vmldExp2},
+@code{vmldLn2}, @code{vmldLog102}, @code{vmldLog102}, @code{vmldPow2},
+@code{vmldTanh2}, @code{vmldTan2}, @code{vmldAtan2}, @code{vmldAtanh2},
+@code{vmldCbrt2}, @code{vmldSinh2}, @code{vmldSin2}, @code{vmldAsinh2},
+@code{vmldAsin2}, @code{vmldCosh2}, @code{vmldCos2}, @code{vmldAcosh2},
+@code{vmldAcos2}, @code{vmlsExp4}, @code{vmlsLn4}, @code{vmlsLog104},
+@code{vmlsLog104}, @code{vmlsPow4}, @code{vmlsTanh4}, @code{vmlsTan4},
+@code{vmlsAtan4}, @code{vmlsAtanh4}, @code{vmlsCbrt4}, @code{vmlsSinh4},
+@code{vmlsSin4}, @code{vmlsAsinh4}, @code{vmlsAsin4}, @code{vmlsCosh4},
+@code{vmlsCos4}, @code{vmlsAcosh4} and @code{vmlsAcos4} for corresponding
+function type when @option{-mveclibabi=svml} is used and @code{__vrd2_sin},
+@code{__vrd2_cos}, @code{__vrd2_exp}, @code{__vrd2_log}, @code{__vrd2_log2},
+@code{__vrd2_log10}, @code{__vrs4_sinf}, @code{__vrs4_cosf},
+@code{__vrs4_expf}, @code{__vrs4_logf}, @code{__vrs4_log2f},
+@code{__vrs4_log10f} and @code{__vrs4_powf} for corresponding function type
+when @option{-mveclibabi=acml} is used. Both @option{-ftree-vectorize} and
+@option{-funsafe-math-optimizations} have to be enabled. A SVML or ACML ABI
+compatible library will have to be specified at link time.
@item -mpush-args
@itemx -mno-push-args
@@ -12977,7 +13026,7 @@ the AltiVec instruction set. You may also need to set
enhancements.
@item -mvrsave
-@item -mno-vrsave
+@itemx -mno-vrsave
@opindex mvrsave
@opindex mno-vrsave
Generate VRSAVE instructions when generating AltiVec code.
@@ -13604,7 +13653,7 @@ to build a linux kernel use @option{-msoft-float}.
The default is to not maintain the backchain.
@item -mpacked-stack
-@item -mno-packed-stack
+@itemx -mno-packed-stack
@opindex mpacked-stack
@opindex mno-packed-stack
Use (do not use) the packed stack layout. When @option{-mno-packed-stack} is
@@ -13725,7 +13774,7 @@ Emit a warning if the function calls alloca or uses dynamically
sized arrays. This is generally a bad idea with a limited stack size.
@item -mstack-guard=@var{stack-guard}
-@item -mstack-size=@var{stack-size}
+@itemx -mstack-size=@var{stack-size}
@opindex mstack-guard
@opindex mstack-size
If these options are provided the s390 back end emits additional instructions in
@@ -13879,6 +13928,10 @@ linker option @option{-relax}.
Use 32-bit offsets in @code{switch} tables. The default is to use
16-bit offsets.
+@item -mbitops
+@opindex mbitops
+Enable the use of bit manipulation instructions on SH2A.
+
@item -mfmovd
@opindex mfmovd
Enable the use of the instruction @code{fmovd}.