diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/arm')
2004 files changed, 59 insertions, 38488 deletions
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c index 680a3b560d7..788079bc104 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c @@ -1,7 +1,8 @@ /* Test AAPCS layout (VFP variant for Neon types) */ /* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_fp16_hw } */ /* { dg-add-options arm_neon_fp16 } */ #ifndef IN_FRAMEWORK diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c index fc2b13bf1b7..b42fdd23926 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c @@ -1,7 +1,8 @@ /* Test AAPCS layout (VFP variant for Neon types) */ /* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_neon_fp16_hw } */ /* { dg-add-options arm_neon_fp16 } */ #ifndef IN_FRAMEWORK diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c index 225e9ce7c10..0745a82f5e8 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c @@ -1,8 +1,9 @@ -/* Test AAPCS layout (VFP variant) */ +/* Test AAPCS layout (VFP variant) */ /* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_fp16_hw } */ +/* { dg-add-options arm_fp16_ieee } */ #ifndef IN_FRAMEWORK #define VFP diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c index 8928b1562e9..950c1f6a6d4 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c @@ -1,8 +1,9 @@ -/* Test AAPCS layout (VFP variant) */ +/* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */ +/* { dg-do run { target arm_eabi } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_fp16_hw } */ +/* { dg-add-options arm_fp16_ieee } */ #ifndef IN_FRAMEWORK #define VFP diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c index 61f07049f2c..f898d4cebd7 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c @@ -1,8 +1,9 @@ -/* Test AAPCS layout (VFP variant) */ +/* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */ +/* { dg-do run { target arm_eabi } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_fp16_hw } */ +/* { dg-add-options arm_fp16_ieee } */ #ifndef IN_FRAMEWORK #define VFP diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c index 15dff7d19f8..48bb59856e0 100644 --- a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c +++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c @@ -1,8 +1,9 @@ -/* Test AAPCS layout (VFP variant) */ +/* Test AAPCS layout (VFP variant) */ -/* { dg-do run { target arm_eabi } } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */ +/* { dg-do run { target arm_eabi } } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ +/* { dg-require-effective-target arm_fp16_hw } */ +/* { dg-add-options arm_fp16_ieee } */ #ifndef IN_FRAMEWORK #define VFP diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c index 5eab3e2ca78..9bf3fc07e7f 100644 --- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c +++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c @@ -1,17 +1,21 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm_fp16_ok } */ -/* { dg-options "-mfp16-format=ieee -O2" } */ -/* { dg-add-options arm_fp16 } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_fp16_ieee } */ -/* Test __fp16 arguments and return value in registers. */ +/* Test __fp16 arguments and return value in registers (hard-float). */ -__fp16 F (__fp16 a, __fp16 b, __fp16 c) +void +swap (__fp16, __fp16); + +__fp16 +F (__fp16 a, __fp16 b, __fp16 c) { - if (a == b) - return c; - return a; + swap (b, a); + return c; } -/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s0} 1 } } */ -/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s1} 1 } } */ -/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-2]} 2 } } */ +/* { dg-final { scan-assembler-times {vmov.f32\ts1, s0} 1 } } */ +/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c new file mode 100644 index 00000000000..4753e364a22 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_fp16_ok } */ +/* { dg-options "-mfloat-abi=softfp -O2" } */ +/* { dg-add-options arm_fp16_ieee } */ +/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */ + +/* Test __fp16 arguments and return value in registers (softfp). */ + +void +swap (__fp16, __fp16); + +__fp16 +F (__fp16 a, __fp16 b, __fp16 c) +{ + swap (b, a); + return c; +} + +/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } } */ +/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } } */ +/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/neon.exp b/gcc/testsuite/gcc.target/arm/neon/neon.exp deleted file mode 100644 index d440fc0f059..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/neon.exp +++ /dev/null @@ -1,35 +0,0 @@ -# Copyright (C) 1997-2016 Free Software Foundation, Inc. - -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GCC; see the file COPYING3. If not see -# <http://www.gnu.org/licenses/>. - -# GCC testsuite that uses the `dg.exp' driver. - -# Exit immediately if this isn't an ARM target. -if ![istarget arm*-*-*] then { - return -} - -# Load support procs. -load_lib gcc-dg.exp - -# Initialize `dg'. -dg-init - -# Main loop. -dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \ - "" "" - -# All done. -dg-finish diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c deleted file mode 100644 index d2424d9c5b6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRaddhns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRaddhns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int8x8_t = vraddhn_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vraddhn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c deleted file mode 100644 index a787bccf479..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRaddhns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRaddhns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int16x4_t = vraddhn_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vraddhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c deleted file mode 100644 index dde572c4457..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRaddhns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRaddhns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int32x2_t = vraddhn_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vraddhn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c deleted file mode 100644 index 74098a9e547..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRaddhnu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRaddhnu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint8x8_t = vraddhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vraddhn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c deleted file mode 100644 index 4795f446dc7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRaddhnu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRaddhnu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint16x4_t = vraddhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vraddhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c deleted file mode 100644 index d3a7e0b4ae5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRaddhnu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRaddhnu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint32x2_t = vraddhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vraddhn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c deleted file mode 100644 index d8da62725b7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vrhaddq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vrhadd\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c deleted file mode 100644 index 6281ade30ca..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vrhaddq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vrhadd\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c deleted file mode 100644 index a558ca363d9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vrhaddq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vrhadd\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c deleted file mode 100644 index 06822c2ff11..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vrhaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vrhadd\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c deleted file mode 100644 index 713e70a2a6b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vrhaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vrhadd\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c deleted file mode 100644 index 64a912f25ee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vrhaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vrhadd\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c deleted file mode 100644 index 8eb55045ec6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhadds16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhadds16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vrhadd_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vrhadd\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c deleted file mode 100644 index a1acebd186f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhadds32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhadds32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vrhadd_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vrhadd\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c deleted file mode 100644 index df7f58c33a0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhadds8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhadds8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vrhadd_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vrhadd\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c deleted file mode 100644 index 215eb1597bd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vrhadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vrhadd\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c deleted file mode 100644 index 2d8d5fbf635..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vrhadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vrhadd\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c deleted file mode 100644 index 362a5464701..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRhaddu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRhaddu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vrhadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vrhadd\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c deleted file mode 100644 index 74bd3aaf091..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vrshlq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vrshl\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c deleted file mode 100644 index a6a9e4c2490..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vrshlq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vrshl\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c deleted file mode 100644 index 8201a04fb5a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vrshlq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vrshl\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c deleted file mode 100644 index 28d281f7670..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vrshlq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vrshl\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c deleted file mode 100644 index 66d278887e5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vrshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vrshl\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c deleted file mode 100644 index 4185fbe1769..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vrshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vrshl\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c deleted file mode 100644 index fb0eddd7129..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - int64x2_t arg1_int64x2_t; - - out_uint64x2_t = vrshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vrshl\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c deleted file mode 100644 index cee1b9e38fb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vrshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vrshl\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls16.c b/gcc/testsuite/gcc.target/arm/neon/vRshls16.c deleted file mode 100644 index ac7158adc15..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshls16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vrshl_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vrshl\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls32.c b/gcc/testsuite/gcc.target/arm/neon/vRshls32.c deleted file mode 100644 index 8da59185c1a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshls32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vrshl_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vrshl\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls64.c b/gcc/testsuite/gcc.target/arm/neon/vRshls64.c deleted file mode 100644 index 2e732ee12de..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshls64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshls64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshls64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vrshl_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vrshl\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls8.c b/gcc/testsuite/gcc.target/arm/neon/vRshls8.c deleted file mode 100644 index f0c351d4850..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshls8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vrshl_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vrshl\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c deleted file mode 100644 index 1a7751b43ce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vrshl_u16 (arg0_uint16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vrshl\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c deleted file mode 100644 index 198b13c4369..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vrshl_u32 (arg0_uint32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vrshl\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c deleted file mode 100644 index 3f67aaaa4b6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - int64x1_t arg1_int64x1_t; - - out_uint64x1_t = vrshl_u64 (arg0_uint64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vrshl\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c deleted file mode 100644 index 439948224a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRshlu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshlu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vrshl_u8 (arg0_uint8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vrshl\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c deleted file mode 100644 index a89842b4001..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vrshrq_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c deleted file mode 100644 index 00ec911743b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vrshrq_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c deleted file mode 100644 index 0b1851e7e00..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - - out_int64x2_t = vrshrq_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c deleted file mode 100644 index 80084d02dc6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vrshrq_n_s8 (arg0_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c deleted file mode 100644 index a24ea19a1a9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x8_t = vrshrq_n_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c deleted file mode 100644 index fa4e20da18f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vrshrq_n_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c deleted file mode 100644 index 9e61a6916ce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint64x2_t = vrshrq_n_u64 (arg0_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c deleted file mode 100644 index 3445c8dcd53..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vrshrq_n_u8 (arg0_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c deleted file mode 100644 index 5445d5945e0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshr_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshr_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vrshr_n_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c deleted file mode 100644 index 8b3f60daead..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshr_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshr_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vrshr_n_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c deleted file mode 100644 index 1d3735a8795..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshr_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshr_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - - out_int64x1_t = vrshr_n_s64 (arg0_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c deleted file mode 100644 index dc011d95380..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshr_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshr_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vrshr_n_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c deleted file mode 100644 index 890c88664e3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshr_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshr_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vrshr_n_u16 (arg0_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c deleted file mode 100644 index 5994f6be64f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshr_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshr_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vrshr_n_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c deleted file mode 100644 index 03047707dc9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshr_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshr_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - - out_uint64x1_t = vrshr_n_u64 (arg0_uint64x1_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c deleted file mode 100644 index 4df95c24b24..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshr_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshr_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vrshr_n_u8 (arg0_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vrshr\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c deleted file mode 100644 index 7f423036c3d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrn_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrn_ns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - - out_int8x8_t = vrshrn_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vrshrn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c deleted file mode 100644 index 6c0559fc583..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrn_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrn_ns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - - out_int16x4_t = vrshrn_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vrshrn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c deleted file mode 100644 index 0f223c9377e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrn_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrn_ns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - - out_int32x2_t = vrshrn_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vrshrn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c deleted file mode 100644 index 12ba6252a02..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrn_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrn_nu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint8x8_t = vrshrn_n_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vrshrn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c deleted file mode 100644 index 8b2014f3485..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrn_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrn_nu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint16x4_t = vrshrn_n_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vrshrn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c deleted file mode 100644 index f3bf7566375..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vRshrn_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRshrn_nu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint32x2_t = vrshrn_n_u64 (arg0_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vrshrn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c deleted file mode 100644 index 66e2ea0e974..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsraQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsraQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vrsraq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c deleted file mode 100644 index b6c3cb8f40d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsraQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsraQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vrsraq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c deleted file mode 100644 index 8d68b1ae89a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsraQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsraQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vrsraq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c deleted file mode 100644 index 413f49ef820..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsraQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsraQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vrsraq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c deleted file mode 100644 index d9e668011a7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsraQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsraQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vrsraq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c deleted file mode 100644 index 56ae88612a2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsraQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsraQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vrsraq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c deleted file mode 100644 index 2ce4af3bcc9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsraQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsraQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vrsraq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c deleted file mode 100644 index 53078a0464e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsraQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsraQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vrsraq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c deleted file mode 100644 index bc68117af1b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsra_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsra_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vrsra_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c deleted file mode 100644 index caeb45b22dc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsra_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsra_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vrsra_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c deleted file mode 100644 index b9ea8c88a43..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsra_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsra_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vrsra_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c deleted file mode 100644 index f32ae16bd5a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsra_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsra_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vrsra_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c deleted file mode 100644 index b6d2ccee8f9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsra_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsra_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vrsra_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c deleted file mode 100644 index 99c217b1909..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsra_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsra_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vrsra_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c deleted file mode 100644 index 6eaa2ae4302..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsra_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsra_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vrsra_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c deleted file mode 100644 index 6ae17f7e2e1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsra_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsra_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vrsra_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vrsra\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c deleted file mode 100644 index b0a5cb00957..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsubhns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsubhns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int8x8_t = vrsubhn_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vrsubhn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c deleted file mode 100644 index 31e01e0f20a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsubhns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsubhns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int16x4_t = vrsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vrsubhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c deleted file mode 100644 index e1c8c9ec751..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsubhns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsubhns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int32x2_t = vrsubhn_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vrsubhn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c deleted file mode 100644 index 58368f444e5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsubhnu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsubhnu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint8x8_t = vrsubhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vrsubhn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c deleted file mode 100644 index edb7b4f4199..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsubhnu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsubhnu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint16x4_t = vrsubhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vrsubhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c deleted file mode 100644 index 2b1c77f10a5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vRsubhnu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vRsubhnu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint32x2_t = vrsubhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vrsubhn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c deleted file mode 100644 index f0c69713434..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabaQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabaQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - int16x8_t arg2_int16x8_t; - - out_int16x8_t = vabaq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t); -} - -/* { dg-final { scan-assembler "vaba\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c deleted file mode 100644 index cc68f6f6034..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabaQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabaQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - int32x4_t arg2_int32x4_t; - - out_int32x4_t = vabaq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t); -} - -/* { dg-final { scan-assembler "vaba\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c deleted file mode 100644 index 7b1bfeb30ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabaQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabaQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - int8x16_t arg2_int8x16_t; - - out_int8x16_t = vabaq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t); -} - -/* { dg-final { scan-assembler "vaba\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c deleted file mode 100644 index 3b5ba07643e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabaQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabaQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - uint16x8_t arg2_uint16x8_t; - - out_uint16x8_t = vabaq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t); -} - -/* { dg-final { scan-assembler "vaba\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c deleted file mode 100644 index cf526e9b7d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabaQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabaQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - uint32x4_t arg2_uint32x4_t; - - out_uint32x4_t = vabaq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t); -} - -/* { dg-final { scan-assembler "vaba\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c deleted file mode 100644 index 484fb7fc79e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabaQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabaQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - uint8x16_t arg2_uint8x16_t; - - out_uint8x16_t = vabaq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t); -} - -/* { dg-final { scan-assembler "vaba\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals16.c b/gcc/testsuite/gcc.target/arm/neon/vabals16.c deleted file mode 100644 index 6617e2e68db..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabals16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabals16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabals16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vabal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "vabal\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals32.c b/gcc/testsuite/gcc.target/arm/neon/vabals32.c deleted file mode 100644 index 2110dee6b48..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabals32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabals32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabals32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vabal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "vabal\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals8.c b/gcc/testsuite/gcc.target/arm/neon/vabals8.c deleted file mode 100644 index c313a11a5a0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabals8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabals8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabals8 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int8x8_t arg1_int8x8_t; - int8x8_t arg2_int8x8_t; - - out_int16x8_t = vabal_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vabal\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu16.c b/gcc/testsuite/gcc.target/arm/neon/vabalu16.c deleted file mode 100644 index f43c8ed30c7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabalu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabalu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabalu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint32x4_t = vabal_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t); -} - -/* { dg-final { scan-assembler "vabal\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu32.c b/gcc/testsuite/gcc.target/arm/neon/vabalu32.c deleted file mode 100644 index 12af07299ee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabalu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabalu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabalu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint64x2_t = vabal_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t); -} - -/* { dg-final { scan-assembler "vabal\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu8.c b/gcc/testsuite/gcc.target/arm/neon/vabalu8.c deleted file mode 100644 index 05ba74760a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabalu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabalu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabalu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint8x8_t arg1_uint8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_uint16x8_t = vabal_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vabal\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas16.c b/gcc/testsuite/gcc.target/arm/neon/vabas16.c deleted file mode 100644 index 9094ecb2a07..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabas16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabas16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabas16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int16x4_t = vaba_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "vaba\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas32.c b/gcc/testsuite/gcc.target/arm/neon/vabas32.c deleted file mode 100644 index 184fc9553ca..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabas32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabas32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabas32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int32x2_t = vaba_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "vaba\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas8.c b/gcc/testsuite/gcc.target/arm/neon/vabas8.c deleted file mode 100644 index b9bc8130665..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabas8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabas8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabas8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - int8x8_t arg2_int8x8_t; - - out_int8x8_t = vaba_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vaba\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau16.c b/gcc/testsuite/gcc.target/arm/neon/vabau16.c deleted file mode 100644 index d3b8c4ef6e2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabau16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabau16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabau16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint16x4_t = vaba_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t); -} - -/* { dg-final { scan-assembler "vaba\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau32.c b/gcc/testsuite/gcc.target/arm/neon/vabau32.c deleted file mode 100644 index 2c65f1b7269..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabau32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabau32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabau32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint32x2_t = vaba_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t); -} - -/* { dg-final { scan-assembler "vaba\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau8.c b/gcc/testsuite/gcc.target/arm/neon/vabau8.c deleted file mode 100644 index 665410ced81..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabau8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vabau8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabau8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_uint8x8_t = vaba_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vaba\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c deleted file mode 100644 index 682736ff263..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vabdq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vabd\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c deleted file mode 100644 index 37349e91f32..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vabdq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vabd\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c deleted file mode 100644 index 961b4cab2a1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vabdq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vabd\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c deleted file mode 100644 index b6d6eaf292e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vabdq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vabd\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c deleted file mode 100644 index 1c86be1c6ed..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vabdq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vabd\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c deleted file mode 100644 index a263b65505c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vabdq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vabd\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c deleted file mode 100644 index d217f48c43f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vabdq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vabd\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdf32.c b/gcc/testsuite/gcc.target/arm/neon/vabdf32.c deleted file mode 100644 index 9454282c004..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vabd_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vabd\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls16.c b/gcc/testsuite/gcc.target/arm/neon/vabdls16.c deleted file mode 100644 index 63ac7e3706d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdls16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vabdl_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vabdl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls32.c b/gcc/testsuite/gcc.target/arm/neon/vabdls32.c deleted file mode 100644 index 7d51343a2bf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdls32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vabdl_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vabdl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls8.c b/gcc/testsuite/gcc.target/arm/neon/vabdls8.c deleted file mode 100644 index 0d9ac62a5ee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdls8 (void) -{ - int16x8_t out_int16x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int16x8_t = vabdl_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vabdl\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c deleted file mode 100644 index 6f19e672016..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdlu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdlu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint32x4_t = vabdl_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vabdl\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c deleted file mode 100644 index 0ec3f93f2ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdlu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdlu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint64x2_t = vabdl_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vabdl\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c deleted file mode 100644 index 0d981fae277..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdlu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdlu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint16x8_t = vabdl_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vabdl\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds16.c b/gcc/testsuite/gcc.target/arm/neon/vabds16.c deleted file mode 100644 index a13ee8865c4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabds16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabds16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabds16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vabd_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vabd\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds32.c b/gcc/testsuite/gcc.target/arm/neon/vabds32.c deleted file mode 100644 index fdbfdb656c2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabds32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabds32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabds32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vabd_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vabd\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds8.c b/gcc/testsuite/gcc.target/arm/neon/vabds8.c deleted file mode 100644 index 2b0fe0abb07..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabds8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabds8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabds8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vabd_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vabd\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdu16.c deleted file mode 100644 index ca599ac56af..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vabd_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vabd\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdu32.c deleted file mode 100644 index cdd83429cc7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vabd_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vabd\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdu8.c deleted file mode 100644 index 1d939185ed0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabdu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vabdu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabdu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vabd_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vabd\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c deleted file mode 100644 index f77af2a5d04..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vabsQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabsQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vabsq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vabs\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c deleted file mode 100644 index 5b3a3578fb9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vabsQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabsQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vabsq_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vabs\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c deleted file mode 100644 index a0ad4030496..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vabsQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabsQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vabsq_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vabs\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c deleted file mode 100644 index 786d2004413..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vabsQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabsQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vabsq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vabs\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsf32.c b/gcc/testsuite/gcc.target/arm/neon/vabsf32.c deleted file mode 100644 index b1845da54f6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabsf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vabsf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabsf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vabs_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vabs\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss16.c b/gcc/testsuite/gcc.target/arm/neon/vabss16.c deleted file mode 100644 index ad370648898..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabss16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vabss16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabss16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vabs_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vabs\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss32.c b/gcc/testsuite/gcc.target/arm/neon/vabss32.c deleted file mode 100644 index 38066982fcf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabss32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vabss32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabss32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vabs_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vabs\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss8.c b/gcc/testsuite/gcc.target/arm/neon/vabss8.c deleted file mode 100644 index a36a2a7669a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vabss8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vabss8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vabss8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vabs_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vabs\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c deleted file mode 100644 index dd2c06abba0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vaddq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vadd\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c deleted file mode 100644 index ec000faa3b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vaddq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vadd\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c deleted file mode 100644 index 34ead8ca80f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vaddq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vadd\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c deleted file mode 100644 index 77942deee66..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vaddq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vadd\.i64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c deleted file mode 100644 index 42bcdf9ae74..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vaddq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vadd\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c deleted file mode 100644 index 983bb35f6b8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vadd\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c deleted file mode 100644 index c98772e9389..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vadd\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c deleted file mode 100644 index 95756c64671..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vaddq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vadd\.i64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c deleted file mode 100644 index e52524eb00a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vadd\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddf32.c b/gcc/testsuite/gcc.target/arm/neon/vaddf32.c deleted file mode 100644 index 6afb8c195fe..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vadd_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vadd\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c deleted file mode 100644 index f3f35e4ecce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddhns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddhns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int8x8_t = vaddhn_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vaddhn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c deleted file mode 100644 index 028f431944d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddhns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddhns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int16x4_t = vaddhn_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vaddhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c deleted file mode 100644 index f139a6da1e7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddhns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddhns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int32x2_t = vaddhn_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vaddhn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c deleted file mode 100644 index 6c770621e91..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddhnu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddhnu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint8x8_t = vaddhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vaddhn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c deleted file mode 100644 index 5315f91c1c7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddhnu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddhnu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint16x4_t = vaddhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vaddhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c deleted file mode 100644 index 6aa25609e16..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddhnu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddhnu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint32x2_t = vaddhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vaddhn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls16.c b/gcc/testsuite/gcc.target/arm/neon/vaddls16.c deleted file mode 100644 index 4b84ae89e6a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddls16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vaddl_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vaddl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls32.c b/gcc/testsuite/gcc.target/arm/neon/vaddls32.c deleted file mode 100644 index 3f267cc5ad7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddls32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vaddl_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vaddl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls8.c b/gcc/testsuite/gcc.target/arm/neon/vaddls8.c deleted file mode 100644 index c2136109316..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddls8 (void) -{ - int16x8_t out_int16x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int16x8_t = vaddl_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vaddl\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c deleted file mode 100644 index 6e5341c27cb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddlu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddlu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint32x4_t = vaddl_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vaddl\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c deleted file mode 100644 index bc4359beae5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddlu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddlu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint64x2_t = vaddl_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vaddl\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c deleted file mode 100644 index 9ec110e5a73..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddlu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddlu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint16x8_t = vaddl_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vaddl\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds16.c b/gcc/testsuite/gcc.target/arm/neon/vadds16.c deleted file mode 100644 index 1c2f70b31fb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vadds16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vadds16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vadds16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vadd_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vadd\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds32.c b/gcc/testsuite/gcc.target/arm/neon/vadds32.c deleted file mode 100644 index 8889228215d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vadds32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vadds32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vadds32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vadd_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vadd\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds64.c b/gcc/testsuite/gcc.target/arm/neon/vadds64.c deleted file mode 100644 index 8b6bb5b9ca9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vadds64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vadds64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vadds64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vadd_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds8.c b/gcc/testsuite/gcc.target/arm/neon/vadds8.c deleted file mode 100644 index 6165e628728..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vadds8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vadds8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vadds8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vadd_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vadd\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddu16.c deleted file mode 100644 index c3469152564..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vadd\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddu32.c deleted file mode 100644 index 8436c129aed..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vadd\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddu64.c deleted file mode 100644 index 4cf9fcf2b6a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vaddu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddu8.c deleted file mode 100644 index 8435a7b74c0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vadd\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws16.c b/gcc/testsuite/gcc.target/arm/neon/vaddws16.c deleted file mode 100644 index 8021483d6aa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddws16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddws16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddws16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vaddw_s16 (arg0_int32x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vaddw\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws32.c b/gcc/testsuite/gcc.target/arm/neon/vaddws32.c deleted file mode 100644 index 5691af3df9a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddws32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddws32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddws32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vaddw_s32 (arg0_int64x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vaddw\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws8.c b/gcc/testsuite/gcc.target/arm/neon/vaddws8.c deleted file mode 100644 index 0a774c05945..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddws8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddws8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddws8 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int8x8_t arg1_int8x8_t; - - out_int16x8_t = vaddw_s8 (arg0_int16x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vaddw\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c deleted file mode 100644 index a7cfc65cbc3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddwu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddwu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint32x4_t = vaddw_u16 (arg0_uint32x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vaddw\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c deleted file mode 100644 index 40f86f1454f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddwu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddwu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint64x2_t = vaddw_u32 (arg0_uint64x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vaddw\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c deleted file mode 100644 index bb6d0fbdbe3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vaddwu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vaddwu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint16x8_t = vaddw_u8 (arg0_uint16x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vaddw\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs16.c b/gcc/testsuite/gcc.target/arm/neon/vandQs16.c deleted file mode 100644 index bfc9a214da7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vandq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs32.c b/gcc/testsuite/gcc.target/arm/neon/vandQs32.c deleted file mode 100644 index feeca564124..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vandq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs64.c b/gcc/testsuite/gcc.target/arm/neon/vandQs64.c deleted file mode 100644 index 6c67c142445..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vandq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs8.c b/gcc/testsuite/gcc.target/arm/neon/vandQs8.c deleted file mode 100644 index 7411c335822..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vandq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu16.c b/gcc/testsuite/gcc.target/arm/neon/vandQu16.c deleted file mode 100644 index 710312d64aa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vandq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu32.c b/gcc/testsuite/gcc.target/arm/neon/vandQu32.c deleted file mode 100644 index 64a956d19f2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vandq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu64.c b/gcc/testsuite/gcc.target/arm/neon/vandQu64.c deleted file mode 100644 index 832d83c7fb5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vandq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu8.c b/gcc/testsuite/gcc.target/arm/neon/vandQu8.c deleted file mode 100644 index 4820aa40573..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vandq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vands16.c b/gcc/testsuite/gcc.target/arm/neon/vands16.c deleted file mode 100644 index 0e17817b832..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vands16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vands16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vands16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vand_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vands32.c b/gcc/testsuite/gcc.target/arm/neon/vands32.c deleted file mode 100644 index d56529e96f1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vands32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vands32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vands32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vand_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vands64.c b/gcc/testsuite/gcc.target/arm/neon/vands64.c deleted file mode 100644 index 164159419c1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vands64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vands64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vands64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vand_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vands8.c b/gcc/testsuite/gcc.target/arm/neon/vands8.c deleted file mode 100644 index 961e3d83fda..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vands8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vands8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vands8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vand_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu16.c b/gcc/testsuite/gcc.target/arm/neon/vandu16.c deleted file mode 100644 index d60a0a15ee3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vand_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu32.c b/gcc/testsuite/gcc.target/arm/neon/vandu32.c deleted file mode 100644 index 79f57736a9d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vand_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu64.c b/gcc/testsuite/gcc.target/arm/neon/vandu64.c deleted file mode 100644 index 40172e96128..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vandu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vand_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu8.c b/gcc/testsuite/gcc.target/arm/neon/vandu8.c deleted file mode 100644 index 1244ecace2a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vandu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vandu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vandu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vand_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vand\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c deleted file mode 100644 index ff6625525ff..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int16x8_t out_int16x8_t; -int16x8_t arg0_int16x8_t; -int16x8_t arg1_int16x8_t; -void test_vbicQs16 (void) -{ - - out_int16x8_t = vbicq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c deleted file mode 100644 index 4a691bd5915..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int32x4_t out_int32x4_t; -int32x4_t arg0_int32x4_t; -int32x4_t arg1_int32x4_t; -void test_vbicQs32 (void) -{ - - out_int32x4_t = vbicq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c deleted file mode 100644 index 403098f5fd0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int64x2_t out_int64x2_t; -int64x2_t arg0_int64x2_t; -int64x2_t arg1_int64x2_t; -void test_vbicQs64 (void) -{ - - out_int64x2_t = vbicq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c deleted file mode 100644 index 576769c3cd5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int8x16_t out_int8x16_t; -int8x16_t arg0_int8x16_t; -int8x16_t arg1_int8x16_t; -void test_vbicQs8 (void) -{ - - out_int8x16_t = vbicq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c deleted file mode 100644 index 3504a2685c8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint16x8_t out_uint16x8_t; -uint16x8_t arg0_uint16x8_t; -uint16x8_t arg1_uint16x8_t; -void test_vbicQu16 (void) -{ - - out_uint16x8_t = vbicq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c deleted file mode 100644 index 993280b2be3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint32x4_t out_uint32x4_t; -uint32x4_t arg0_uint32x4_t; -uint32x4_t arg1_uint32x4_t; -void test_vbicQu32 (void) -{ - - out_uint32x4_t = vbicq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c deleted file mode 100644 index fb27c629208..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint64x2_t out_uint64x2_t; -uint64x2_t arg0_uint64x2_t; -uint64x2_t arg1_uint64x2_t; -void test_vbicQu64 (void) -{ - - out_uint64x2_t = vbicq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c deleted file mode 100644 index 65f0e403304..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint8x16_t out_uint8x16_t; -uint8x16_t arg0_uint8x16_t; -uint8x16_t arg1_uint8x16_t; -void test_vbicQu8 (void) -{ - - out_uint8x16_t = vbicq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics16.c b/gcc/testsuite/gcc.target/arm/neon/vbics16.c deleted file mode 100644 index 95aed5b08df..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbics16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbics16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int16x4_t out_int16x4_t; -int16x4_t arg0_int16x4_t; -int16x4_t arg1_int16x4_t; -void test_vbics16 (void) -{ - - out_int16x4_t = vbic_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics32.c b/gcc/testsuite/gcc.target/arm/neon/vbics32.c deleted file mode 100644 index 925d7483c1d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbics32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbics32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int32x2_t out_int32x2_t; -int32x2_t arg0_int32x2_t; -int32x2_t arg1_int32x2_t; -void test_vbics32 (void) -{ - - out_int32x2_t = vbic_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics64.c b/gcc/testsuite/gcc.target/arm/neon/vbics64.c deleted file mode 100644 index c7ab6cbb006..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbics64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vbics64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int64x1_t out_int64x1_t; -int64x1_t arg0_int64x1_t; -int64x1_t arg1_int64x1_t; -void test_vbics64 (void) -{ - - out_int64x1_t = vbic_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics8.c b/gcc/testsuite/gcc.target/arm/neon/vbics8.c deleted file mode 100644 index 22e2a12fe86..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbics8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbics8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int8x8_t out_int8x8_t; -int8x8_t arg0_int8x8_t; -int8x8_t arg1_int8x8_t; -void test_vbics8 (void) -{ - - out_int8x8_t = vbic_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu16.c b/gcc/testsuite/gcc.target/arm/neon/vbicu16.c deleted file mode 100644 index cfa96c10a4a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint16x4_t out_uint16x4_t; -uint16x4_t arg0_uint16x4_t; -uint16x4_t arg1_uint16x4_t; -void test_vbicu16 (void) -{ - - out_uint16x4_t = vbic_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu32.c b/gcc/testsuite/gcc.target/arm/neon/vbicu32.c deleted file mode 100644 index 65f49a53bfe..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint32x2_t out_uint32x2_t; -uint32x2_t arg0_uint32x2_t; -uint32x2_t arg1_uint32x2_t; -void test_vbicu32 (void) -{ - - out_uint32x2_t = vbic_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu64.c b/gcc/testsuite/gcc.target/arm/neon/vbicu64.c deleted file mode 100644 index 89c8a5e1748..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vbicu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint64x1_t out_uint64x1_t; -uint64x1_t arg0_uint64x1_t; -uint64x1_t arg1_uint64x1_t; -void test_vbicu64 (void) -{ - - out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu8.c b/gcc/testsuite/gcc.target/arm/neon/vbicu8.c deleted file mode 100644 index 930eb36acf4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbicu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vbicu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint8x8_t out_uint8x8_t; -uint8x8_t arg0_uint8x8_t; -uint8x8_t arg1_uint8x8_t; -void test_vbicu8 (void) -{ - - out_uint8x8_t = vbic_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vbic\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c deleted file mode 100644 index 6db03f35a62..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQf32 (void) -{ - float32x4_t out_float32x4_t; - uint32x4_t arg0_uint32x4_t; - float32x4_t arg1_float32x4_t; - float32x4_t arg2_float32x4_t; - - out_float32x4_t = vbslq_f32 (arg0_uint32x4_t, arg1_float32x4_t, arg2_float32x4_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c deleted file mode 100644 index 0c0c88dd1cf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQp16 (void) -{ - poly16x8_t out_poly16x8_t; - uint16x8_t arg0_uint16x8_t; - poly16x8_t arg1_poly16x8_t; - poly16x8_t arg2_poly16x8_t; - - out_poly16x8_t = vbslq_p16 (arg0_uint16x8_t, arg1_poly16x8_t, arg2_poly16x8_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c deleted file mode 100644 index 50d8180b17a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vbslQp64 (void) -{ - poly64x2_t out_poly64x2_t; - uint64x2_t arg0_uint64x2_t; - poly64x2_t arg1_poly64x2_t; - poly64x2_t arg2_poly64x2_t; - - out_poly64x2_t = vbslq_p64 (arg0_uint64x2_t, arg1_poly64x2_t, arg2_poly64x2_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c deleted file mode 100644 index 2d09700186c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQp8 (void) -{ - poly8x16_t out_poly8x16_t; - uint8x16_t arg0_uint8x16_t; - poly8x16_t arg1_poly8x16_t; - poly8x16_t arg2_poly8x16_t; - - out_poly8x16_t = vbslq_p8 (arg0_uint8x16_t, arg1_poly8x16_t, arg2_poly8x16_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c deleted file mode 100644 index 28031941b62..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQs16 (void) -{ - int16x8_t out_int16x8_t; - uint16x8_t arg0_uint16x8_t; - int16x8_t arg1_int16x8_t; - int16x8_t arg2_int16x8_t; - - out_int16x8_t = vbslq_s16 (arg0_uint16x8_t, arg1_int16x8_t, arg2_int16x8_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c deleted file mode 100644 index 637895d1c49..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQs32 (void) -{ - int32x4_t out_int32x4_t; - uint32x4_t arg0_uint32x4_t; - int32x4_t arg1_int32x4_t; - int32x4_t arg2_int32x4_t; - - out_int32x4_t = vbslq_s32 (arg0_uint32x4_t, arg1_int32x4_t, arg2_int32x4_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c deleted file mode 100644 index d329d194392..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQs64 (void) -{ - int64x2_t out_int64x2_t; - uint64x2_t arg0_uint64x2_t; - int64x2_t arg1_int64x2_t; - int64x2_t arg2_int64x2_t; - - out_int64x2_t = vbslq_s64 (arg0_uint64x2_t, arg1_int64x2_t, arg2_int64x2_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c deleted file mode 100644 index 5e78bbcf09e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQs8 (void) -{ - int8x16_t out_int8x16_t; - uint8x16_t arg0_uint8x16_t; - int8x16_t arg1_int8x16_t; - int8x16_t arg2_int8x16_t; - - out_int8x16_t = vbslq_s8 (arg0_uint8x16_t, arg1_int8x16_t, arg2_int8x16_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c deleted file mode 100644 index 2446349a294..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - uint16x8_t arg2_uint16x8_t; - - out_uint16x8_t = vbslq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c deleted file mode 100644 index a8c32a429e8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - uint32x4_t arg2_uint32x4_t; - - out_uint32x4_t = vbslq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c deleted file mode 100644 index fd00ae87c31..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - uint64x2_t arg2_uint64x2_t; - - out_uint64x2_t = vbslq_u64 (arg0_uint64x2_t, arg1_uint64x2_t, arg2_uint64x2_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c deleted file mode 100644 index 123584360f2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - uint8x16_t arg2_uint8x16_t; - - out_uint8x16_t = vbslq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslf32.c b/gcc/testsuite/gcc.target/arm/neon/vbslf32.c deleted file mode 100644 index 345f1c89dff..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslf32 (void) -{ - float32x2_t out_float32x2_t; - uint32x2_t arg0_uint32x2_t; - float32x2_t arg1_float32x2_t; - float32x2_t arg2_float32x2_t; - - out_float32x2_t = vbsl_f32 (arg0_uint32x2_t, arg1_float32x2_t, arg2_float32x2_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp16.c b/gcc/testsuite/gcc.target/arm/neon/vbslp16.c deleted file mode 100644 index 6ce42b31eb7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslp16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslp16 (void) -{ - poly16x4_t out_poly16x4_t; - uint16x4_t arg0_uint16x4_t; - poly16x4_t arg1_poly16x4_t; - poly16x4_t arg2_poly16x4_t; - - out_poly16x4_t = vbsl_p16 (arg0_uint16x4_t, arg1_poly16x4_t, arg2_poly16x4_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp64.c b/gcc/testsuite/gcc.target/arm/neon/vbslp64.c deleted file mode 100644 index 0ff4cfc3833..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslp64.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vbslp64 (void) -{ - poly64x1_t out_poly64x1_t; - uint64x1_t arg0_uint64x1_t; - poly64x1_t arg1_poly64x1_t; - poly64x1_t arg2_poly64x1_t; - - out_poly64x1_t = vbsl_p64 (arg0_uint64x1_t, arg1_poly64x1_t, arg2_poly64x1_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp8.c b/gcc/testsuite/gcc.target/arm/neon/vbslp8.c deleted file mode 100644 index 6e1f1871bf8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslp8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslp8 (void) -{ - poly8x8_t out_poly8x8_t; - uint8x8_t arg0_uint8x8_t; - poly8x8_t arg1_poly8x8_t; - poly8x8_t arg2_poly8x8_t; - - out_poly8x8_t = vbsl_p8 (arg0_uint8x8_t, arg1_poly8x8_t, arg2_poly8x8_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls16.c b/gcc/testsuite/gcc.target/arm/neon/vbsls16.c deleted file mode 100644 index 3368f99c391..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbsls16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbsls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbsls16 (void) -{ - int16x4_t out_int16x4_t; - uint16x4_t arg0_uint16x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int16x4_t = vbsl_s16 (arg0_uint16x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls32.c b/gcc/testsuite/gcc.target/arm/neon/vbsls32.c deleted file mode 100644 index 40bc0ad1b8b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbsls32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbsls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbsls32 (void) -{ - int32x2_t out_int32x2_t; - uint32x2_t arg0_uint32x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int32x2_t = vbsl_s32 (arg0_uint32x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls64.c b/gcc/testsuite/gcc.target/arm/neon/vbsls64.c deleted file mode 100644 index 8249a62d0c1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbsls64.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbsls64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbsls64 (void) -{ - int64x1_t out_int64x1_t; - uint64x1_t arg0_uint64x1_t; - int64x1_t arg1_int64x1_t; - int64x1_t arg2_int64x1_t; - - out_int64x1_t = vbsl_s64 (arg0_uint64x1_t, arg1_int64x1_t, arg2_int64x1_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls8.c b/gcc/testsuite/gcc.target/arm/neon/vbsls8.c deleted file mode 100644 index 914a1d6871b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbsls8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbsls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbsls8 (void) -{ - int8x8_t out_int8x8_t; - uint8x8_t arg0_uint8x8_t; - int8x8_t arg1_int8x8_t; - int8x8_t arg2_int8x8_t; - - out_int8x8_t = vbsl_s8 (arg0_uint8x8_t, arg1_int8x8_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu16.c b/gcc/testsuite/gcc.target/arm/neon/vbslu16.c deleted file mode 100644 index 7106ffcf045..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint16x4_t = vbsl_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu32.c b/gcc/testsuite/gcc.target/arm/neon/vbslu32.c deleted file mode 100644 index f6922e6f675..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint32x2_t = vbsl_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu64.c b/gcc/testsuite/gcc.target/arm/neon/vbslu64.c deleted file mode 100644 index 724fdb32dda..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslu64.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - uint64x1_t arg2_uint64x1_t; - - out_uint64x1_t = vbsl_u64 (arg0_uint64x1_t, arg1_uint64x1_t, arg2_uint64x1_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu8.c b/gcc/testsuite/gcc.target/arm/neon/vbslu8.c deleted file mode 100644 index a27bc640bc4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vbslu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vbslu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vbslu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_uint8x8_t = vbsl_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c deleted file mode 100644 index 48e8e790424..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcageQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcageQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vcageq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vacge\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagef32.c b/gcc/testsuite/gcc.target/arm/neon/vcagef32.c deleted file mode 100644 index 52084e7e711..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcagef32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcagef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcagef32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vcage_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vacge\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c deleted file mode 100644 index e7290ed807f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcagtQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcagtQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vcagtq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vacgt\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c b/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c deleted file mode 100644 index ce8969bdc88..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcagtf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcagtf32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vcagt_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vacgt\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c deleted file mode 100644 index b429bba7eab..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcaleQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcaleQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vcaleq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vacge\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcalef32.c b/gcc/testsuite/gcc.target/arm/neon/vcalef32.c deleted file mode 100644 index a8340655b45..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcalef32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcalef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcalef32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vcale_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vacge\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c deleted file mode 100644 index dbebe489e63..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcaltQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcaltQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vcaltq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vacgt\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c deleted file mode 100644 index 004edc6e0ad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcaltf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcaltf32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vcalt_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vacgt\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c deleted file mode 100644 index 6a537219c14..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vceqq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vceq\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c deleted file mode 100644 index 556fbdf35be..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqQp8 (void) -{ - uint8x16_t out_uint8x16_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_uint8x16_t = vceqq_p8 (arg0_poly8x16_t, arg1_poly8x16_t); -} - -/* { dg-final { scan-assembler "vceq\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c deleted file mode 100644 index cfbf64a48f2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqQs16 (void) -{ - uint16x8_t out_uint16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vceqq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vceq\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c deleted file mode 100644 index 1b75729f594..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqQs32 (void) -{ - uint32x4_t out_uint32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vceqq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vceq\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c deleted file mode 100644 index d6d6d30dc54..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqQs8 (void) -{ - uint8x16_t out_uint8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vceqq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vceq\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c deleted file mode 100644 index 6f33d9d9712..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vceqq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vceq\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c deleted file mode 100644 index df2d47b7f8c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vceqq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vceq\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c deleted file mode 100644 index 80d56ffe424..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vceqq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vceq\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqf32.c b/gcc/testsuite/gcc.target/arm/neon/vceqf32.c deleted file mode 100644 index 046a5052004..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqf32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vceq_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vceq\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqp8.c b/gcc/testsuite/gcc.target/arm/neon/vceqp8.c deleted file mode 100644 index 5758ebaf81a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqp8 (void) -{ - uint8x8_t out_uint8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_uint8x8_t = vceq_p8 (arg0_poly8x8_t, arg1_poly8x8_t); -} - -/* { dg-final { scan-assembler "vceq\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs16.c b/gcc/testsuite/gcc.target/arm/neon/vceqs16.c deleted file mode 100644 index 11337b0e173..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqs16 (void) -{ - uint16x4_t out_uint16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vceq_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vceq\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs32.c b/gcc/testsuite/gcc.target/arm/neon/vceqs32.c deleted file mode 100644 index 506c9800d36..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqs32 (void) -{ - uint32x2_t out_uint32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vceq_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vceq\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs8.c b/gcc/testsuite/gcc.target/arm/neon/vceqs8.c deleted file mode 100644 index c76e2b4b102..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vceqs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vceqs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vceqs8 (void) -{ - uint8x8_t out_uint8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vceq_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vceq\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ16.c b/gcc/testsuite/gcc.target/arm/neon/vcequ16.c deleted file mode 100644 index dda7ab79798..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcequ16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcequ16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcequ16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vceq_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vceq\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ32.c b/gcc/testsuite/gcc.target/arm/neon/vcequ32.c deleted file mode 100644 index 4ee8c5f6a02..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcequ32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcequ32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcequ32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vceq_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vceq\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ8.c b/gcc/testsuite/gcc.target/arm/neon/vcequ8.c deleted file mode 100644 index 60134cf63cb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcequ8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcequ8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcequ8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vceq_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vceq\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c deleted file mode 100644 index 93a5e3ca86d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vcgeq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vcge\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c deleted file mode 100644 index f60344f4f3d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeQs16 (void) -{ - uint16x8_t out_uint16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vcgeq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vcge\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c deleted file mode 100644 index 1d8caccfa71..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeQs32 (void) -{ - uint32x4_t out_uint32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vcgeq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vcge\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c deleted file mode 100644 index b5bb84e2b41..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeQs8 (void) -{ - uint8x16_t out_uint8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vcgeq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vcge\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c deleted file mode 100644 index 62f060f8f3d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vcgeq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vcge\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c deleted file mode 100644 index a86dfa216d4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vcgeq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vcge\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c deleted file mode 100644 index fbf678c175b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vcgeq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vcge\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgef32.c b/gcc/testsuite/gcc.target/arm/neon/vcgef32.c deleted file mode 100644 index f12259aecc2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgef32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgef32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vcge_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vcge\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges16.c b/gcc/testsuite/gcc.target/arm/neon/vcges16.c deleted file mode 100644 index d420dec6094..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcges16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcges16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcges16 (void) -{ - uint16x4_t out_uint16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vcge_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vcge\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges32.c b/gcc/testsuite/gcc.target/arm/neon/vcges32.c deleted file mode 100644 index c4e731588c6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcges32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcges32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcges32 (void) -{ - uint32x2_t out_uint32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vcge_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vcge\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges8.c b/gcc/testsuite/gcc.target/arm/neon/vcges8.c deleted file mode 100644 index 0484e247748..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcges8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcges8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcges8 (void) -{ - uint8x8_t out_uint8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vcge_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vcge\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c deleted file mode 100644 index 89874e040aa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vcge_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vcge\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c deleted file mode 100644 index cb907fd3fa5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vcge_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vcge\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c deleted file mode 100644 index 01af80920b7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgeu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgeu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vcge_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vcge\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c deleted file mode 100644 index ab5f92d6e8a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vcgtq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c deleted file mode 100644 index 5e966f74edb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtQs16 (void) -{ - uint16x8_t out_uint16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vcgtq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vcgt\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c deleted file mode 100644 index 3db41766825..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtQs32 (void) -{ - uint32x4_t out_uint32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vcgtq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c deleted file mode 100644 index a092e21927b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtQs8 (void) -{ - uint8x16_t out_uint8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vcgtq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vcgt\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c deleted file mode 100644 index 2239331c40d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vcgtq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vcgt\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c deleted file mode 100644 index 430f3ca07be..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vcgtq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c deleted file mode 100644 index bb38a0ec54d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vcgtq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vcgt\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c deleted file mode 100644 index 171780725cb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtf32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vcgt_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vcgt\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts16.c b/gcc/testsuite/gcc.target/arm/neon/vcgts16.c deleted file mode 100644 index 05088830c6b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgts16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgts16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgts16 (void) -{ - uint16x4_t out_uint16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vcgt_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts32.c b/gcc/testsuite/gcc.target/arm/neon/vcgts32.c deleted file mode 100644 index 09dc2b5ca4a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgts32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgts32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgts32 (void) -{ - uint32x2_t out_uint32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vcgt_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vcgt\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts8.c b/gcc/testsuite/gcc.target/arm/neon/vcgts8.c deleted file mode 100644 index 1cb6b028bc4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgts8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgts8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgts8 (void) -{ - uint8x8_t out_uint8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vcgt_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vcgt\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c deleted file mode 100644 index 0c76d53e06e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vcgt_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c deleted file mode 100644 index ae6aae5a27c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vcgt_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vcgt\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c deleted file mode 100644 index 3ed6bcc19f5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcgtu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcgtu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vcgt_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vcgt\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c deleted file mode 100644 index cc24025fc30..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vcleq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vcge\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c deleted file mode 100644 index e4efae94673..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleQs16 (void) -{ - uint16x8_t out_uint16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vcleq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vcge\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c deleted file mode 100644 index a432421a7c2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleQs32 (void) -{ - uint32x4_t out_uint32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vcleq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vcge\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c deleted file mode 100644 index a6d2d779c01..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleQs8 (void) -{ - uint8x16_t out_uint8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vcleq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vcge\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c deleted file mode 100644 index 72dccdc0acf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vcleq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vcge\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c deleted file mode 100644 index c057a4f252c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vcleq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vcge\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c deleted file mode 100644 index 618232e3be8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vcleq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vcge\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclef32.c b/gcc/testsuite/gcc.target/arm/neon/vclef32.c deleted file mode 100644 index e4ef97382b7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclef32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vclef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclef32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vcle_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vcge\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles16.c b/gcc/testsuite/gcc.target/arm/neon/vcles16.c deleted file mode 100644 index 8b835b3b4ce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcles16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcles16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcles16 (void) -{ - uint16x4_t out_uint16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vcle_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vcge\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles32.c b/gcc/testsuite/gcc.target/arm/neon/vcles32.c deleted file mode 100644 index f5035d2cbcc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcles32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcles32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcles32 (void) -{ - uint32x2_t out_uint32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vcle_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vcge\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles8.c b/gcc/testsuite/gcc.target/arm/neon/vcles8.c deleted file mode 100644 index 65b5962190c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcles8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcles8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcles8 (void) -{ - uint8x8_t out_uint8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vcle_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vcge\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu16.c b/gcc/testsuite/gcc.target/arm/neon/vcleu16.c deleted file mode 100644 index a51824173c7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vcle_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vcge\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu32.c b/gcc/testsuite/gcc.target/arm/neon/vcleu32.c deleted file mode 100644 index f1d83e893ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vcle_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vcge\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu8.c b/gcc/testsuite/gcc.target/arm/neon/vcleu8.c deleted file mode 100644 index 3a394543281..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcleu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcleu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcleu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vcle_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vcge\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c deleted file mode 100644 index 5c878526259..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclsQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclsQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vclsq_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vcls\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c deleted file mode 100644 index c44d5a7d1c6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclsQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclsQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vclsq_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vcls\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c deleted file mode 100644 index a4c7cfe1787..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclsQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclsQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vclsq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vcls\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss16.c b/gcc/testsuite/gcc.target/arm/neon/vclss16.c deleted file mode 100644 index 5b43faec23a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclss16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclss16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclss16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vcls_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vcls\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss32.c b/gcc/testsuite/gcc.target/arm/neon/vclss32.c deleted file mode 100644 index e60c1c0957a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclss32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclss32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclss32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vcls_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vcls\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss8.c b/gcc/testsuite/gcc.target/arm/neon/vclss8.c deleted file mode 100644 index 272ef8d039d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclss8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclss8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclss8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vcls_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vcls\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c deleted file mode 100644 index 95234124339..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltQf32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_uint32x4_t = vcltq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c deleted file mode 100644 index fc67ae1ae90..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltQs16 (void) -{ - uint16x8_t out_uint16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vcltq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vcgt\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c deleted file mode 100644 index 58da373a455..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltQs32 (void) -{ - uint32x4_t out_uint32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vcltq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c deleted file mode 100644 index 800a50220c9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltQs8 (void) -{ - uint8x16_t out_uint8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vcltq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vcgt\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c deleted file mode 100644 index b6435de6b3f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vcltq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vcgt\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c deleted file mode 100644 index 43205b77ec3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vcltq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c deleted file mode 100644 index d65a8259f00..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vcltq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vcgt\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltf32.c b/gcc/testsuite/gcc.target/arm/neon/vcltf32.c deleted file mode 100644 index f18e000c56b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltf32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_uint32x2_t = vclt_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vcgt\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts16.c b/gcc/testsuite/gcc.target/arm/neon/vclts16.c deleted file mode 100644 index 115675ea850..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclts16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vclts16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclts16 (void) -{ - uint16x4_t out_uint16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vclt_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts32.c b/gcc/testsuite/gcc.target/arm/neon/vclts32.c deleted file mode 100644 index 99771d24101..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclts32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vclts32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclts32 (void) -{ - uint32x2_t out_uint32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vclt_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vcgt\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts8.c b/gcc/testsuite/gcc.target/arm/neon/vclts8.c deleted file mode 100644 index 372b4afaafd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclts8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vclts8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclts8 (void) -{ - uint8x8_t out_uint8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vclt_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vcgt\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu16.c b/gcc/testsuite/gcc.target/arm/neon/vcltu16.c deleted file mode 100644 index 2a3012e9069..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vclt_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vcgt\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu32.c b/gcc/testsuite/gcc.target/arm/neon/vcltu32.c deleted file mode 100644 index 51426a5c07a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vclt_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vcgt\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu8.c b/gcc/testsuite/gcc.target/arm/neon/vcltu8.c deleted file mode 100644 index 0606a32073b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcltu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vcltu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcltu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vclt_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vcgt\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c deleted file mode 100644 index 6652d3d2a40..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vclzq_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vclz\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c deleted file mode 100644 index 8eb1f6ce6bc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vclzq_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vclz\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c deleted file mode 100644 index e1bc052d87f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vclzq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vclz\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c deleted file mode 100644 index 4f92e4a6a1e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x8_t = vclzq_u16 (arg0_uint16x8_t); -} - -/* { dg-final { scan-assembler "vclz\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c deleted file mode 100644 index 67936cb3ad4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vclzq_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vclz\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c deleted file mode 100644 index b889cb7da12..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vclzq_u8 (arg0_uint8x16_t); -} - -/* { dg-final { scan-assembler "vclz\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs16.c b/gcc/testsuite/gcc.target/arm/neon/vclzs16.c deleted file mode 100644 index 4c9cee39ebb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vclz_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vclz\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs32.c b/gcc/testsuite/gcc.target/arm/neon/vclzs32.c deleted file mode 100644 index 9827d90e1b5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vclz_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vclz\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs8.c b/gcc/testsuite/gcc.target/arm/neon/vclzs8.c deleted file mode 100644 index bb262c24f66..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vclz_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vclz\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu16.c b/gcc/testsuite/gcc.target/arm/neon/vclzu16.c deleted file mode 100644 index ee8dd309c6b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vclz_u16 (arg0_uint16x4_t); -} - -/* { dg-final { scan-assembler "vclz\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu32.c b/gcc/testsuite/gcc.target/arm/neon/vclzu32.c deleted file mode 100644 index 963248d13dc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vclz_u32 (arg0_uint32x2_t); -} - -/* { dg-final { scan-assembler "vclz\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu8.c b/gcc/testsuite/gcc.target/arm/neon/vclzu8.c deleted file mode 100644 index a71042f56b9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vclzu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vclzu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vclzu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vclz_u8 (arg0_uint8x8_t); -} - -/* { dg-final { scan-assembler "vclz\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c deleted file mode 100644 index 5598f4d9c2a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcntQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcntQp8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - - out_poly8x16_t = vcntq_p8 (arg0_poly8x16_t); -} - -/* { dg-final { scan-assembler "vcnt\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c deleted file mode 100644 index 5e0710ed4c9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcntQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcntQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vcntq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vcnt\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c deleted file mode 100644 index a6541486dcb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcntQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcntQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vcntq_u8 (arg0_uint8x16_t); -} - -/* { dg-final { scan-assembler "vcnt\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntp8.c b/gcc/testsuite/gcc.target/arm/neon/vcntp8.c deleted file mode 100644 index a75dfa55fbb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcntp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcntp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcntp8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - - out_poly8x8_t = vcnt_p8 (arg0_poly8x8_t); -} - -/* { dg-final { scan-assembler "vcnt\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcnts8.c b/gcc/testsuite/gcc.target/arm/neon/vcnts8.c deleted file mode 100644 index 348221e6e06..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcnts8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcnts8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcnts8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vcnt_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vcnt\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntu8.c b/gcc/testsuite/gcc.target/arm/neon/vcntu8.c deleted file mode 100644 index cb4428dfd13..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcntu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcntu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcntu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vcnt_u8 (arg0_uint8x8_t); -} - -/* { dg-final { scan-assembler "vcnt\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c b/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c deleted file mode 100644 index 8c280bf71e4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombinef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombinef32 (void) -{ - float32x4_t out_float32x4_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x4_t = vcombine_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c deleted file mode 100644 index 59a840f20d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombinep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombinep16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16x4_t arg0_poly16x4_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x8_t = vcombine_p16 (arg0_poly16x4_t, arg1_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c deleted file mode 100644 index 5d1aef3bb68..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombinep64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vcombinep64 (void) -{ - poly64x2_t out_poly64x2_t; - poly64x1_t arg0_poly64x1_t; - poly64x1_t arg1_poly64x1_t; - - out_poly64x2_t = vcombine_p64 (arg0_poly64x1_t, arg1_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c deleted file mode 100644 index 9784f587887..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombinep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombinep8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x16_t = vcombine_p8 (arg0_poly8x8_t, arg1_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines16.c b/gcc/testsuite/gcc.target/arm/neon/vcombines16.c deleted file mode 100644 index 520c013846d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombines16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombines16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombines16 (void) -{ - int16x8_t out_int16x8_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x8_t = vcombine_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines32.c b/gcc/testsuite/gcc.target/arm/neon/vcombines32.c deleted file mode 100644 index b2a49acd79f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombines32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombines32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombines32 (void) -{ - int32x4_t out_int32x4_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x4_t = vcombine_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines64.c b/gcc/testsuite/gcc.target/arm/neon/vcombines64.c deleted file mode 100644 index 292a89277af..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombines64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombines64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombines64 (void) -{ - int64x2_t out_int64x2_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x2_t = vcombine_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines8.c b/gcc/testsuite/gcc.target/arm/neon/vcombines8.c deleted file mode 100644 index b3bf943768b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombines8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombines8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombines8 (void) -{ - int8x16_t out_int8x16_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x16_t = vcombine_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c deleted file mode 100644 index 053944bf5a4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombineu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombineu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x8_t = vcombine_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c deleted file mode 100644 index 18aa30ca471..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombineu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombineu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x4_t = vcombine_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c deleted file mode 100644 index 8e4881c5c29..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombineu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombineu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x2_t = vcombine_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c deleted file mode 100644 index 9d4989cb9cc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcombineu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcombineu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x16_t = vcombine_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c b/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c deleted file mode 100644 index f9213570dbc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreatef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreatef32 (void) -{ - float32x2_t out_float32x2_t; - uint64_t arg0_uint64_t; - - out_float32x2_t = vcreate_f32 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c deleted file mode 100644 index 4e1363be525..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreatep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreatep16 (void) -{ - poly16x4_t out_poly16x4_t; - uint64_t arg0_uint64_t; - - out_poly16x4_t = vcreate_p16 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c deleted file mode 100644 index 0ad84d4e8b9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreatep64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vcreatep64 (void) -{ - poly64x1_t out_poly64x1_t; - uint64_t arg0_uint64_t; - - out_poly64x1_t = vcreate_p64 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c deleted file mode 100644 index 79b70f0abc3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreatep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreatep8 (void) -{ - poly8x8_t out_poly8x8_t; - uint64_t arg0_uint64_t; - - out_poly8x8_t = vcreate_p8 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates16.c b/gcc/testsuite/gcc.target/arm/neon/vcreates16.c deleted file mode 100644 index c9f652e7f98..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreates16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreates16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreates16 (void) -{ - int16x4_t out_int16x4_t; - uint64_t arg0_uint64_t; - - out_int16x4_t = vcreate_s16 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates32.c b/gcc/testsuite/gcc.target/arm/neon/vcreates32.c deleted file mode 100644 index fd21c4d3008..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreates32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreates32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreates32 (void) -{ - int32x2_t out_int32x2_t; - uint64_t arg0_uint64_t; - - out_int32x2_t = vcreate_s32 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates64.c b/gcc/testsuite/gcc.target/arm/neon/vcreates64.c deleted file mode 100644 index d5e818707fb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreates64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreates64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreates64 (void) -{ - int64x1_t out_int64x1_t; - uint64_t arg0_uint64_t; - - out_int64x1_t = vcreate_s64 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates8.c b/gcc/testsuite/gcc.target/arm/neon/vcreates8.c deleted file mode 100644 index 79280e644e7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreates8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreates8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreates8 (void) -{ - int8x8_t out_int8x8_t; - uint64_t arg0_uint64_t; - - out_int8x8_t = vcreate_s8 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c deleted file mode 100644 index a36258d7791..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreateu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreateu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint64_t arg0_uint64_t; - - out_uint16x4_t = vcreate_u16 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c deleted file mode 100644 index 94d8252536d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreateu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreateu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint64_t arg0_uint64_t; - - out_uint32x2_t = vcreate_u32 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c deleted file mode 100644 index dc3e151ea46..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreateu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreateu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64_t arg0_uint64_t; - - out_uint64x1_t = vcreate_u64 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c deleted file mode 100644 index 397fdddf42c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vcreateu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcreateu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint64_t arg0_uint64_t; - - out_uint8x8_t = vcreate_u8 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c deleted file mode 100644 index 4bb0b658552..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtQ_nf32_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtQ_nf32_s32 (void) -{ - float32x4_t out_float32x4_t; - int32x4_t arg0_int32x4_t; - - out_float32x4_t = vcvtq_n_f32_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vcvt\.f32.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c deleted file mode 100644 index 6e24051547a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtQ_nf32_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtQ_nf32_u32 (void) -{ - float32x4_t out_float32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_float32x4_t = vcvtq_n_f32_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vcvt\.f32.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c deleted file mode 100644 index 5f906ae0087..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtQ_ns32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtQ_ns32_f32 (void) -{ - int32x4_t out_int32x4_t; - float32x4_t arg0_float32x4_t; - - out_int32x4_t = vcvtq_n_s32_f32 (arg0_float32x4_t, 1); -} - -/* { dg-final { scan-assembler "vcvt\.s32.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c deleted file mode 100644 index 29f2c5e474e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtQ_nu32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtQ_nu32_f32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - - out_uint32x4_t = vcvtq_n_u32_f32 (arg0_float32x4_t, 1); -} - -/* { dg-final { scan-assembler "vcvt\.u32.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c deleted file mode 100644 index de3d1b82b58..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtQf32_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtQf32_s32 (void) -{ - float32x4_t out_float32x4_t; - int32x4_t arg0_int32x4_t; - - out_float32x4_t = vcvtq_f32_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vcvt\.f32.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c deleted file mode 100644 index 64b462dddff..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtQf32_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtQf32_u32 (void) -{ - float32x4_t out_float32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_float32x4_t = vcvtq_f32_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vcvt\.f32.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c deleted file mode 100644 index 97cb7e763d6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtQs32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtQs32_f32 (void) -{ - int32x4_t out_int32x4_t; - float32x4_t arg0_float32x4_t; - - out_int32x4_t = vcvtq_s32_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vcvt\.s32.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c deleted file mode 100644 index c7aa7a1ebdf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtQu32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtQu32_f32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - - out_uint32x4_t = vcvtq_u32_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vcvt\.u32.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c deleted file mode 100644 index f86b4de49e3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvt_nf32_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvt_nf32_s32 (void) -{ - float32x2_t out_float32x2_t; - int32x2_t arg0_int32x2_t; - - out_float32x2_t = vcvt_n_f32_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vcvt\.f32.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c deleted file mode 100644 index fa3bf1770f4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvt_nf32_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvt_nf32_u32 (void) -{ - float32x2_t out_float32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_float32x2_t = vcvt_n_f32_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vcvt\.f32.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c deleted file mode 100644 index de253e7d550..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvt_ns32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvt_ns32_f32 (void) -{ - int32x2_t out_int32x2_t; - float32x2_t arg0_float32x2_t; - - out_int32x2_t = vcvt_n_s32_f32 (arg0_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vcvt\.s32.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c deleted file mode 100644 index 23bdbdf3a48..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvt_nu32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvt_nu32_f32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - - out_uint32x2_t = vcvt_n_u32_f32 (arg0_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vcvt\.u32.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c deleted file mode 100644 index 45b3a72eab4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtf16_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon_fp16 } */ - -#include "arm_neon.h" - -void test_vcvtf16_f32 (void) -{ - float16x4_t out_float16x4_t; - float32x4_t arg0_float32x4_t; - - out_float16x4_t = vcvt_f16_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vcvt\.f16.f32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c deleted file mode 100644 index 6bade5403fc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtf32_f16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_fp16_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon_fp16 } */ - -#include "arm_neon.h" - -void test_vcvtf32_f16 (void) -{ - float32x4_t out_float32x4_t; - float16x4_t arg0_float16x4_t; - - out_float32x4_t = vcvt_f32_f16 (arg0_float16x4_t); -} - -/* { dg-final { scan-assembler "vcvt\.f32.f16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c deleted file mode 100644 index 28715234b15..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtf32_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtf32_s32 (void) -{ - float32x2_t out_float32x2_t; - int32x2_t arg0_int32x2_t; - - out_float32x2_t = vcvt_f32_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vcvt\.f32.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c deleted file mode 100644 index 1680271ce25..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtf32_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtf32_u32 (void) -{ - float32x2_t out_float32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_float32x2_t = vcvt_f32_u32 (arg0_uint32x2_t); -} - -/* { dg-final { scan-assembler "vcvt\.f32.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c deleted file mode 100644 index f3b49125758..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvts32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvts32_f32 (void) -{ - int32x2_t out_int32x2_t; - float32x2_t arg0_float32x2_t; - - out_int32x2_t = vcvt_s32_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vcvt\.s32.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c deleted file mode 100644 index c60cd069f31..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vcvtu32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vcvtu32_f32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - - out_uint32x2_t = vcvt_u32_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vcvt\.u32.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c deleted file mode 100644 index 2b2c7f0758c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_lanef32 (void) -{ - float32x4_t out_float32x4_t; - float32x2_t arg0_float32x2_t; - - out_float32x4_t = vdupq_lane_f32 (arg0_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c deleted file mode 100644 index 8b73edb29ed..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_lanep16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16x4_t arg0_poly16x4_t; - - out_poly16x8_t = vdupq_lane_p16 (arg0_poly16x4_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c deleted file mode 100644 index 85181686dd5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdupQ_lanep64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vdupQ_lanep64 (void) -{ - poly64x2_t out_poly64x2_t; - poly64x1_t arg0_poly64x1_t; - - out_poly64x2_t = vdupq_lane_p64 (arg0_poly64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c deleted file mode 100644 index 6c0356456a6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_lanep8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x8_t arg0_poly8x8_t; - - out_poly8x16_t = vdupq_lane_p8 (arg0_poly8x8_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c deleted file mode 100644 index 54c278cdc7b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_lanes16 (void) -{ - int16x8_t out_int16x8_t; - int16x4_t arg0_int16x4_t; - - out_int16x8_t = vdupq_lane_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c deleted file mode 100644 index eb6b05b6de5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_lanes32 (void) -{ - int32x4_t out_int32x4_t; - int32x2_t arg0_int32x2_t; - - out_int32x4_t = vdupq_lane_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c deleted file mode 100644 index 99551d4328d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdupQ_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_lanes64 (void) -{ - int64x2_t out_int64x2_t; - int64x1_t arg0_int64x1_t; - - out_int64x2_t = vdupq_lane_s64 (arg0_int64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c deleted file mode 100644 index 5840142c6aa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_lanes8 (void) -{ - int8x16_t out_int8x16_t; - int8x8_t arg0_int8x8_t; - - out_int8x16_t = vdupq_lane_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c deleted file mode 100644 index 6bc5e3a7949..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_laneu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x8_t = vdupq_lane_u16 (arg0_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c deleted file mode 100644 index f8cdeb291fe..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_laneu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x4_t = vdupq_lane_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c deleted file mode 100644 index 2f3970359e0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdupQ_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_laneu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x1_t arg0_uint64x1_t; - - out_uint64x2_t = vdupq_lane_u64 (arg0_uint64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c deleted file mode 100644 index e581efaac36..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_laneu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x16_t = vdupq_lane_u8 (arg0_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c deleted file mode 100644 index c817c610fd9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_nf32 (void) -{ - float32x4_t out_float32x4_t; - float32_t arg0_float32_t; - - out_float32x4_t = vdupq_n_f32 (arg0_float32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c deleted file mode 100644 index 57f8c2e8205..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_np16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_np16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16_t arg0_poly16_t; - - out_poly16x8_t = vdupq_n_p16 (arg0_poly16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c deleted file mode 100644 index 1f8527c8000..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdupQ_np64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vdupQ_np64 (void) -{ - poly64x2_t out_poly64x2_t; - poly64_t arg0_poly64_t; - - out_poly64x2_t = vdupq_n_p64 (arg0_poly64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c deleted file mode 100644 index 4b67c623f0d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_np8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_np8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8_t arg0_poly8_t; - - out_poly8x16_t = vdupq_n_p8 (arg0_poly8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c deleted file mode 100644 index 2e30bc3ad63..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16_t arg0_int16_t; - - out_int16x8_t = vdupq_n_s16 (arg0_int16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c deleted file mode 100644 index 9b6a004a815..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32_t arg0_int32_t; - - out_int32x4_t = vdupq_n_s32 (arg0_int32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c deleted file mode 100644 index 221c85f47f5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdupQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64_t arg0_int64_t; - - out_int64x2_t = vdupq_n_s64 (arg0_int64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c deleted file mode 100644 index 931300c8347..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8_t arg0_int8_t; - - out_int8x16_t = vdupq_n_s8 (arg0_int8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c deleted file mode 100644 index f70a188fafa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16_t arg0_uint16_t; - - out_uint16x8_t = vdupq_n_u16 (arg0_uint16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c deleted file mode 100644 index 312efd811f0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32_t arg0_uint32_t; - - out_uint32x4_t = vdupq_n_u32 (arg0_uint32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c deleted file mode 100644 index 0bf62cdcdf6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdupQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64_t arg0_uint64_t; - - out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c deleted file mode 100644 index 3493dcbf700..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdupQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdupQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8_t arg0_uint8_t; - - out_uint8x16_t = vdupq_n_u8 (arg0_uint8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c deleted file mode 100644 index 3fd980a062d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_lanef32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vdup_lane_f32 (arg0_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c deleted file mode 100644 index 7f6d4aada7b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_lanep16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16x4_t arg0_poly16x4_t; - - out_poly16x4_t = vdup_lane_p16 (arg0_poly16x4_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c deleted file mode 100644 index f0d46d013b2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdup_lanep64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vdup_lanep64 (void) -{ - poly64x1_t out_poly64x1_t; - poly64x1_t arg0_poly64x1_t; - - out_poly64x1_t = vdup_lane_p64 (arg0_poly64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c deleted file mode 100644 index a1396d68278..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_lanep8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - - out_poly8x8_t = vdup_lane_p8 (arg0_poly8x8_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c deleted file mode 100644 index deb0160992a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_lanes16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vdup_lane_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c deleted file mode 100644 index e0b2d074284..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_lanes32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vdup_lane_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c deleted file mode 100644 index 9bec51a48b9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdup_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_lanes64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - - out_int64x1_t = vdup_lane_s64 (arg0_int64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c deleted file mode 100644 index a442fd278b7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_lanes8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vdup_lane_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c deleted file mode 100644 index d9b5fd9fd02..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_laneu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vdup_lane_u16 (arg0_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c deleted file mode 100644 index db14a1cd79a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_laneu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vdup_lane_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c deleted file mode 100644 index 6a65eb0d148..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdup_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_laneu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - - out_uint64x1_t = vdup_lane_u64 (arg0_uint64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c deleted file mode 100644 index 99fb193f5ff..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_laneu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vdup_lane_u8 (arg0_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c deleted file mode 100644 index 448894bdf55..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_nf32 (void) -{ - float32x2_t out_float32x2_t; - float32_t arg0_float32_t; - - out_float32x2_t = vdup_n_f32 (arg0_float32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c deleted file mode 100644 index 9b56707b931..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_np16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_np16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16_t arg0_poly16_t; - - out_poly16x4_t = vdup_n_p16 (arg0_poly16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c deleted file mode 100644 index 25552dc85e7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdup_np64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vdup_np64 (void) -{ - poly64x1_t out_poly64x1_t; - poly64_t arg0_poly64_t; - - out_poly64x1_t = vdup_n_p64 (arg0_poly64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c deleted file mode 100644 index ad8a0a6d894..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_np8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_np8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8_t arg0_poly8_t; - - out_poly8x8_t = vdup_n_p8 (arg0_poly8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c deleted file mode 100644 index c3cc4d02850..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16_t arg0_int16_t; - - out_int16x4_t = vdup_n_s16 (arg0_int16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c deleted file mode 100644 index ddfeaec90d7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32_t arg0_int32_t; - - out_int32x2_t = vdup_n_s32 (arg0_int32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c deleted file mode 100644 index 30560887bc3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdup_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64_t arg0_int64_t; - - out_int64x1_t = vdup_n_s64 (arg0_int64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c deleted file mode 100644 index 38017a13e6e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8_t arg0_int8_t; - - out_int8x8_t = vdup_n_s8 (arg0_int8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c deleted file mode 100644 index 6150b61b203..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16_t arg0_uint16_t; - - out_uint16x4_t = vdup_n_u16 (arg0_uint16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c deleted file mode 100644 index 404c8b06e5e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32_t arg0_uint32_t; - - out_uint32x2_t = vdup_n_u32 (arg0_uint32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c deleted file mode 100644 index c89072dda85..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vdup_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64_t arg0_uint64_t; - - out_uint64x1_t = vdup_n_u64 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c deleted file mode 100644 index 09db0eb1ab1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vdup_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vdup_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8_t arg0_uint8_t; - - out_uint8x8_t = vdup_n_u8 (arg0_uint8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs16.c b/gcc/testsuite/gcc.target/arm/neon/veorQs16.c deleted file mode 100644 index b246900b0ce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veorQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veorQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veorQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = veorq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs32.c b/gcc/testsuite/gcc.target/arm/neon/veorQs32.c deleted file mode 100644 index d9cd2f8fef3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veorQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veorQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veorQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = veorq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs64.c b/gcc/testsuite/gcc.target/arm/neon/veorQs64.c deleted file mode 100644 index 926b1e46ef4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veorQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veorQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veorQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = veorq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs8.c b/gcc/testsuite/gcc.target/arm/neon/veorQs8.c deleted file mode 100644 index 272c6ed9d12..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veorQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veorQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veorQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = veorq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu16.c b/gcc/testsuite/gcc.target/arm/neon/veorQu16.c deleted file mode 100644 index dcd3921bc53..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veorQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veorQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veorQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = veorq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu32.c b/gcc/testsuite/gcc.target/arm/neon/veorQu32.c deleted file mode 100644 index 9b34d9ac304..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veorQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veorQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veorQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = veorq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu64.c b/gcc/testsuite/gcc.target/arm/neon/veorQu64.c deleted file mode 100644 index b98db788cd1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veorQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veorQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veorQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = veorq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu8.c b/gcc/testsuite/gcc.target/arm/neon/veorQu8.c deleted file mode 100644 index c985acd1c48..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veorQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veorQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veorQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = veorq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veors16.c b/gcc/testsuite/gcc.target/arm/neon/veors16.c deleted file mode 100644 index 2b839037e21..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veors16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veors16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veors16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = veor_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veors32.c b/gcc/testsuite/gcc.target/arm/neon/veors32.c deleted file mode 100644 index 45403b830ef..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veors32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veors32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veors32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = veor_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veors64.c b/gcc/testsuite/gcc.target/arm/neon/veors64.c deleted file mode 100644 index b102c7b30b3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veors64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `veors64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veors64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = veor_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/veors8.c b/gcc/testsuite/gcc.target/arm/neon/veors8.c deleted file mode 100644 index 0ae7a66175e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veors8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veors8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veors8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = veor_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru16.c b/gcc/testsuite/gcc.target/arm/neon/veoru16.c deleted file mode 100644 index f3b419255d6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veoru16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veoru16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veoru16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = veor_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru32.c b/gcc/testsuite/gcc.target/arm/neon/veoru32.c deleted file mode 100644 index 8b6be9e5926..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veoru32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veoru32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veoru32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = veor_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru64.c b/gcc/testsuite/gcc.target/arm/neon/veoru64.c deleted file mode 100644 index 3b865fe1e63..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veoru64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `veoru64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veoru64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = veor_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru8.c b/gcc/testsuite/gcc.target/arm/neon/veoru8.c deleted file mode 100644 index 3511a77f5a8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/veoru8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `veoru8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_veoru8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = veor_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "veor\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQf32.c b/gcc/testsuite/gcc.target/arm/neon/vextQf32.c deleted file mode 100644 index 0b5239dc6c0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vextq_f32 (arg0_float32x4_t, arg1_float32x4_t, 0); -} - -/* { dg-final { scan-assembler "vext\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp16.c b/gcc/testsuite/gcc.target/arm/neon/vextQp16.c deleted file mode 100644 index f2e68799b1c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQp16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16x8_t arg0_poly16x8_t; - poly16x8_t arg1_poly16x8_t; - - out_poly16x8_t = vextq_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 0); -} - -/* { dg-final { scan-assembler "vext\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp64.c b/gcc/testsuite/gcc.target/arm/neon/vextQp64.c deleted file mode 100644 index 2ae223a700f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQp64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vextQp64 (void) -{ - poly64x2_t out_poly64x2_t; - poly64x2_t arg0_poly64x2_t; - poly64x2_t arg1_poly64x2_t; - - out_poly64x2_t = vextq_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 0); -} - -/* { dg-final { scan-assembler "vext\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp8.c b/gcc/testsuite/gcc.target/arm/neon/vextQp8.c deleted file mode 100644 index fbfde397f91..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQp8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16_t = vextq_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 0); -} - -/* { dg-final { scan-assembler "vext\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs16.c b/gcc/testsuite/gcc.target/arm/neon/vextQs16.c deleted file mode 100644 index 2b0ae8684e6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vextq_s16 (arg0_int16x8_t, arg1_int16x8_t, 0); -} - -/* { dg-final { scan-assembler "vext\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs32.c b/gcc/testsuite/gcc.target/arm/neon/vextQs32.c deleted file mode 100644 index cca20535383..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vextq_s32 (arg0_int32x4_t, arg1_int32x4_t, 0); -} - -/* { dg-final { scan-assembler "vext\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs64.c b/gcc/testsuite/gcc.target/arm/neon/vextQs64.c deleted file mode 100644 index a489638ac50..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vextq_s64 (arg0_int64x2_t, arg1_int64x2_t, 0); -} - -/* { dg-final { scan-assembler "vext\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs8.c b/gcc/testsuite/gcc.target/arm/neon/vextQs8.c deleted file mode 100644 index 0e3b8a239ae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vextq_s8 (arg0_int8x16_t, arg1_int8x16_t, 0); -} - -/* { dg-final { scan-assembler "vext\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu16.c b/gcc/testsuite/gcc.target/arm/neon/vextQu16.c deleted file mode 100644 index c21c4824388..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vextq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 0); -} - -/* { dg-final { scan-assembler "vext\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu32.c b/gcc/testsuite/gcc.target/arm/neon/vextQu32.c deleted file mode 100644 index a19950dff96..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vextq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 0); -} - -/* { dg-final { scan-assembler "vext\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu64.c b/gcc/testsuite/gcc.target/arm/neon/vextQu64.c deleted file mode 100644 index d52e37fcf4a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vextq_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 0); -} - -/* { dg-final { scan-assembler "vext\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu8.c b/gcc/testsuite/gcc.target/arm/neon/vextQu8.c deleted file mode 100644 index 49e4de6505c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vextq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 0); -} - -/* { dg-final { scan-assembler "vext\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextf32.c b/gcc/testsuite/gcc.target/arm/neon/vextf32.c deleted file mode 100644 index 012dd4874d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vext_f32 (arg0_float32x2_t, arg1_float32x2_t, 0); -} - -/* { dg-final { scan-assembler "vext\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp16.c b/gcc/testsuite/gcc.target/arm/neon/vextp16.c deleted file mode 100644 index 94f601ac022..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextp16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16x4_t arg0_poly16x4_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x4_t = vext_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 0); -} - -/* { dg-final { scan-assembler "vext\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp64.c b/gcc/testsuite/gcc.target/arm/neon/vextp64.c deleted file mode 100644 index abf5c0ccdc0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextp64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vextp64 (void) -{ - poly64x1_t out_poly64x1_t; - poly64x1_t arg0_poly64x1_t; - poly64x1_t arg1_poly64x1_t; - - out_poly64x1_t = vext_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 0); -} - -/* { dg-final { scan-assembler "vext\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp8.c b/gcc/testsuite/gcc.target/arm/neon/vextp8.c deleted file mode 100644 index 58728cf0858..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextp8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8_t = vext_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 0); -} - -/* { dg-final { scan-assembler "vext\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts16.c b/gcc/testsuite/gcc.target/arm/neon/vexts16.c deleted file mode 100644 index 032055ead2e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vexts16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vexts16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vexts16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vext_s16 (arg0_int16x4_t, arg1_int16x4_t, 0); -} - -/* { dg-final { scan-assembler "vext\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts32.c b/gcc/testsuite/gcc.target/arm/neon/vexts32.c deleted file mode 100644 index a3c7dced54a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vexts32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vexts32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vexts32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vext_s32 (arg0_int32x2_t, arg1_int32x2_t, 0); -} - -/* { dg-final { scan-assembler "vext\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts64.c b/gcc/testsuite/gcc.target/arm/neon/vexts64.c deleted file mode 100644 index 534c8b87258..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vexts64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vexts64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vexts64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vext_s64 (arg0_int64x1_t, arg1_int64x1_t, 0); -} - -/* { dg-final { scan-assembler "vext\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts8.c b/gcc/testsuite/gcc.target/arm/neon/vexts8.c deleted file mode 100644 index 7c5dafd4e44..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vexts8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vexts8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vexts8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vext_s8 (arg0_int8x8_t, arg1_int8x8_t, 0); -} - -/* { dg-final { scan-assembler "vext\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu16.c b/gcc/testsuite/gcc.target/arm/neon/vextu16.c deleted file mode 100644 index 2b8e44c286a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vext_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 0); -} - -/* { dg-final { scan-assembler "vext\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu32.c b/gcc/testsuite/gcc.target/arm/neon/vextu32.c deleted file mode 100644 index fad2ee021f2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vext_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 0); -} - -/* { dg-final { scan-assembler "vext\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu64.c b/gcc/testsuite/gcc.target/arm/neon/vextu64.c deleted file mode 100644 index 7313c26032d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vext_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 0); -} - -/* { dg-final { scan-assembler "vext\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu8.c b/gcc/testsuite/gcc.target/arm/neon/vextu8.c deleted file mode 100644 index caab02be5bd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vextu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vextu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vextu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vext_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 0); -} - -/* { dg-final { scan-assembler "vext\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c deleted file mode 100644 index 30b4c997270..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vfmaQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neonv2_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neonv2 } */ - -#include "arm_neon.h" - -void test_vfmaQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - float32x4_t arg2_float32x4_t; - - out_float32x4_t = vfmaq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t); -} - -/* { dg-final { scan-assembler "vfma\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c deleted file mode 100644 index 8c55a0bbe90..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vfmaf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neonv2_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neonv2 } */ - -#include "arm_neon.h" - -void test_vfmaf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - float32x2_t arg2_float32x2_t; - - out_float32x2_t = vfma_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t); -} - -/* { dg-final { scan-assembler "vfma\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c deleted file mode 100644 index 37a0c640b0f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vfmsQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neonv2_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neonv2 } */ - -#include "arm_neon.h" - -void test_vfmsQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - float32x4_t arg2_float32x4_t; - - out_float32x4_t = vfmsq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t); -} - -/* { dg-final { scan-assembler "vfms\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c deleted file mode 100644 index d66e51c0142..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vfmsf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neonv2_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neonv2 } */ - -#include "arm_neon.h" - -void test_vfmsf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - float32x2_t arg2_float32x2_t; - - out_float32x2_t = vfms_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t); -} - -/* { dg-final { scan-assembler "vfms\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c deleted file mode 100644 index 2ff33ee30d3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_lanef32 (void) -{ - float32_t out_float32_t; - float32x4_t arg0_float32x4_t; - - out_float32_t = vgetq_lane_f32 (arg0_float32x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c deleted file mode 100644 index 1245a3eb461..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_lanep16 (void) -{ - poly16_t out_poly16_t; - poly16x8_t arg0_poly16x8_t; - - out_poly16_t = vgetq_lane_p16 (arg0_poly16x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.u16\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c deleted file mode 100644 index 900b3b946a1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_lanep8 (void) -{ - poly8_t out_poly8_t; - poly8x16_t arg0_poly8x16_t; - - out_poly8_t = vgetq_lane_p8 (arg0_poly8x16_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.u8\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c deleted file mode 100644 index f2cbd8d60a5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_lanes16 (void) -{ - int16_t out_int16_t; - int16x8_t arg0_int16x8_t; - - out_int16_t = vgetq_lane_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.s16\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c deleted file mode 100644 index 25c6a520993..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_lanes32 (void) -{ - int32_t out_int32_t; - int32x4_t arg0_int32x4_t; - - out_int32_t = vgetq_lane_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c deleted file mode 100644 index ef815cfb3d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_lanes64 (void) -{ - register int64_t out_int64_t asm ("r0"); - int64x2_t arg0_int64x2_t; - - out_int64_t = vgetq_lane_s64 (arg0_int64x2_t, 0); -} - -/* { dg-final { scan-assembler "((vmov)|(fmrrd))\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c deleted file mode 100644 index c4a76591c55..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_lanes8 (void) -{ - int8_t out_int8_t; - int8x16_t arg0_int8x16_t; - - out_int8_t = vgetq_lane_s8 (arg0_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.s8\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c deleted file mode 100644 index cb10ca124d6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_laneu16 (void) -{ - uint16_t out_uint16_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16_t = vgetq_lane_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.u16\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c deleted file mode 100644 index a6c4ca60341..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_laneu32 (void) -{ - uint32_t out_uint32_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32_t = vgetq_lane_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c deleted file mode 100644 index 0f02e51c79c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_laneu64 (void) -{ - register uint64_t out_uint64_t asm ("r0"); - uint64x2_t arg0_uint64x2_t; - - out_uint64_t = vgetq_lane_u64 (arg0_uint64x2_t, 0); -} - -/* { dg-final { scan-assembler "((vmov)|(fmrrd))\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c deleted file mode 100644 index 0bc72e5a563..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vgetQ_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vgetQ_laneu8 (void) -{ - uint8_t out_uint8_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8_t = vgetq_lane_u8 (arg0_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.u8\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c deleted file mode 100644 index cc7382c7046..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highf32 (void) -{ - float32x2_t out_float32x2_t; - float32x4_t arg0_float32x4_t; - - out_float32x2_t = vget_high_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c deleted file mode 100644 index 6bb2a6cae76..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highp16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16x8_t arg0_poly16x8_t; - - out_poly16x4_t = vget_high_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c deleted file mode 100644 index c69abdc0548..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vget_highp64 (void) -{ - poly64x1_t out_poly64x1_t; - poly64x2_t arg0_poly64x2_t; - - out_poly64x1_t = vget_high_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c deleted file mode 100644 index 75cfbd41f81..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highp8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x16_t arg0_poly8x16_t; - - out_poly8x8_t = vget_high_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c deleted file mode 100644 index e655eb6e4b6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highs16 (void) -{ - int16x4_t out_int16x4_t; - int16x8_t arg0_int16x8_t; - - out_int16x4_t = vget_high_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c deleted file mode 100644 index c8c2661230d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highs32 (void) -{ - int32x2_t out_int32x2_t; - int32x4_t arg0_int32x4_t; - - out_int32x2_t = vget_high_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c deleted file mode 100644 index f2d11c39967..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highs64 (void) -{ - int64x1_t out_int64x1_t; - int64x2_t arg0_int64x2_t; - - out_int64x1_t = vget_high_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c deleted file mode 100644 index ecff21351bd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highs8 (void) -{ - int8x8_t out_int8x8_t; - int8x16_t arg0_int8x16_t; - - out_int8x8_t = vget_high_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c deleted file mode 100644 index 1a7f002f395..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x4_t = vget_high_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c deleted file mode 100644 index 4899be4360a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x2_t = vget_high_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c deleted file mode 100644 index 3ff2a2b3488..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x2_t arg0_uint64x2_t; - - out_uint64x1_t = vget_high_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c deleted file mode 100644 index 132cccab1cd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_highu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_highu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x8_t = vget_high_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c deleted file mode 100644 index 300e85c4c10..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lanef32 (void) -{ - float32_t out_float32_t; - float32x2_t arg0_float32x2_t; - - out_float32_t = vget_lane_f32 (arg0_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c deleted file mode 100644 index 5d9f80bb326..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lanep16 (void) -{ - poly16_t out_poly16_t; - poly16x4_t arg0_poly16x4_t; - - out_poly16_t = vget_lane_p16 (arg0_poly16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.u16\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c deleted file mode 100644 index a172bd27ffc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lanep8 (void) -{ - poly8_t out_poly8_t; - poly8x8_t arg0_poly8x8_t; - - out_poly8_t = vget_lane_p8 (arg0_poly8x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.u8\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c deleted file mode 100644 index f8a9b020d97..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lanes16 (void) -{ - int16_t out_int16_t; - int16x4_t arg0_int16x4_t; - - out_int16_t = vget_lane_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.s16\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c deleted file mode 100644 index 3cea0bfa7f5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lanes32 (void) -{ - int32_t out_int32_t; - int32x2_t arg0_int32x2_t; - - out_int32_t = vget_lane_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c deleted file mode 100644 index f360fe3ad0f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lanes64 (void) -{ - int64_t out_int64_t; - int64x1_t arg0_int64x1_t; - - out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c deleted file mode 100644 index 064c9cdbf48..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lanes8 (void) -{ - int8_t out_int8_t; - int8x8_t arg0_int8x8_t; - - out_int8_t = vget_lane_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.s8\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c deleted file mode 100644 index 756b589ffdd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_laneu16 (void) -{ - uint16_t out_uint16_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16_t = vget_lane_u16 (arg0_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.u16\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c deleted file mode 100644 index 3f59e6ad646..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_laneu32 (void) -{ - uint32_t out_uint32_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32_t = vget_lane_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c deleted file mode 100644 index 75cef5b71df..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_laneu64 (void) -{ - uint64_t out_uint64_t; - uint64x1_t arg0_uint64x1_t; - - out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c deleted file mode 100644 index bb461a6bf59..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_laneu8 (void) -{ - uint8_t out_uint8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8_t = vget_lane_u8 (arg0_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.u8\[ \]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c deleted file mode 100644 index 970ef76cb61..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lowf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lowf32 (void) -{ - register float32x2_t out_float32x2_t asm ("d18"); - float32x4_t arg0_float32x4_t; - - out_float32x2_t = vget_low_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c deleted file mode 100644 index ab421259e92..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lowp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lowp16 (void) -{ - register poly16x4_t out_poly16x4_t asm ("d18"); - poly16x8_t arg0_poly16x8_t; - - out_poly16x4_t = vget_low_p16 (arg0_poly16x8_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c deleted file mode 100644 index 378310fefcc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_lowp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vget_lowp64 (void) -{ - poly64x1_t out_poly64x1_t; - poly64x2_t arg0_poly64x2_t; - - out_poly64x1_t = vget_low_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c deleted file mode 100644 index 462ce05dcfb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lowp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lowp8 (void) -{ - register poly8x8_t out_poly8x8_t asm ("d18"); - poly8x16_t arg0_poly8x16_t; - - out_poly8x8_t = vget_low_p8 (arg0_poly8x16_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c deleted file mode 100644 index 3ee2cf730d3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lows16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lows16 (void) -{ - register int16x4_t out_int16x4_t asm ("d18"); - int16x8_t arg0_int16x8_t; - - out_int16x4_t = vget_low_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c deleted file mode 100644 index 27d8e7248a2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lows32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lows32 (void) -{ - register int32x2_t out_int32x2_t asm ("d18"); - int32x4_t arg0_int32x4_t; - - out_int32x2_t = vget_low_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c deleted file mode 100644 index 6b32548ba37..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_lows64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lows64 (void) -{ - int64x1_t out_int64x1_t; - int64x2_t arg0_int64x2_t; - - out_int64x1_t = vget_low_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c deleted file mode 100644 index 077ffd75dd6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lows8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lows8 (void) -{ - register int8x8_t out_int8x8_t asm ("d18"); - int8x16_t arg0_int8x16_t; - - out_int8x8_t = vget_low_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c deleted file mode 100644 index df93c3275b9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lowu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lowu16 (void) -{ - register uint16x4_t out_uint16x4_t asm ("d18"); - uint16x8_t arg0_uint16x8_t; - - out_uint16x4_t = vget_low_u16 (arg0_uint16x8_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c deleted file mode 100644 index 3fdd5b4c5ad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lowu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lowu32 (void) -{ - register uint32x2_t out_uint32x2_t asm ("d18"); - uint32x4_t arg0_uint32x4_t; - - out_uint32x2_t = vget_low_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c deleted file mode 100644 index 0732d7c348c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vget_lowu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lowu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x2_t arg0_uint64x2_t; - - out_uint64x1_t = vget_low_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c deleted file mode 100644 index 0f59277fa4e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vget_lowu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vget_lowu8 (void) -{ - register uint8x8_t out_uint8x8_t asm ("d18"); - uint8x16_t arg0_uint8x16_t; - - out_uint8x8_t = vget_low_u8 (arg0_uint8x16_t); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c deleted file mode 100644 index bcd6a22a313..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vhaddq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vhadd\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c deleted file mode 100644 index 1f8128aa3a7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vhaddq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vhadd\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c deleted file mode 100644 index e7dd1314142..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vhaddq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vhadd\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c deleted file mode 100644 index f01237f7c1c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vhaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vhadd\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c deleted file mode 100644 index 65d2b8edd33..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vhaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vhadd\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c deleted file mode 100644 index 3fd514357de..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vhaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vhadd\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds16.c b/gcc/testsuite/gcc.target/arm/neon/vhadds16.c deleted file mode 100644 index a36a6ba4614..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhadds16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhadds16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhadds16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vhadd_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vhadd\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds32.c b/gcc/testsuite/gcc.target/arm/neon/vhadds32.c deleted file mode 100644 index 20876ec67f9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhadds32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhadds32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhadds32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vhadd_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vhadd\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds8.c b/gcc/testsuite/gcc.target/arm/neon/vhadds8.c deleted file mode 100644 index 53fcd9c7f8b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhadds8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhadds8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhadds8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vhadd_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vhadd\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c deleted file mode 100644 index 3d18e9a9dd0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vhadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vhadd\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c deleted file mode 100644 index e0b64d6b0eb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vhadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vhadd\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c deleted file mode 100644 index 9212d5b512d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhaddu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhaddu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vhadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vhadd\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c deleted file mode 100644 index 71e9afdc42a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vhsubq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vhsub\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c deleted file mode 100644 index f26f7ad945b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vhsubq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vhsub\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c deleted file mode 100644 index b2a551519fa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vhsubq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vhsub\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c deleted file mode 100644 index 2d822cf3de6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vhsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vhsub\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c deleted file mode 100644 index 0ff6d4c1e8c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vhsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vhsub\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c deleted file mode 100644 index 520d337e389..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vhsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vhsub\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c deleted file mode 100644 index 72c981603fd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vhsub_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vhsub\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c deleted file mode 100644 index 0e6fdc01331..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vhsub_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vhsub\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c deleted file mode 100644 index 7b3220b7ec0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vhsub_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vhsub\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c deleted file mode 100644 index 15beda25c51..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vhsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vhsub\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c deleted file mode 100644 index a4201eaa536..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vhsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vhsub\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c deleted file mode 100644 index 92dbeab05c8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vhsubu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vhsubu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vhsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vhsub\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c deleted file mode 100644 index 58c33d6fb98..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dupf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dupf32 (void) -{ - float32x4_t out_float32x4_t; - - out_float32x4_t = vld1q_dup_f32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c deleted file mode 100644 index 66c72ab23c0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dupp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dupp16 (void) -{ - poly16x8_t out_poly16x8_t; - - out_poly16x8_t = vld1q_dup_p16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c deleted file mode 100644 index 8c5b28e3226..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dupp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld1Q_dupp64 (void) -{ - poly64x2_t out_poly64x2_t; - - out_poly64x2_t = vld1q_dup_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c deleted file mode 100644 index 90a3388f682..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dupp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dupp8 (void) -{ - poly8x16_t out_poly8x16_t; - - out_poly8x16_t = vld1q_dup_p8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c deleted file mode 100644 index d4cfada8fb2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dups16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dups16 (void) -{ - int16x8_t out_int16x8_t; - - out_int16x8_t = vld1q_dup_s16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c deleted file mode 100644 index 2d16b12837a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dups32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dups32 (void) -{ - int32x4_t out_int32x4_t; - - out_int32x4_t = vld1q_dup_s32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c deleted file mode 100644 index 41974a64429..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dups64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dups64 (void) -{ - int64x2_t out_int64x2_t; - - out_int64x2_t = vld1q_dup_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c deleted file mode 100644 index 99475fcd41b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dups8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dups8 (void) -{ - int8x16_t out_int8x16_t; - - out_int8x16_t = vld1q_dup_s8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c deleted file mode 100644 index 584018937a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dupu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dupu16 (void) -{ - uint16x8_t out_uint16x8_t; - - out_uint16x8_t = vld1q_dup_u16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c deleted file mode 100644 index 31981ca2b58..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dupu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dupu32 (void) -{ - uint32x4_t out_uint32x4_t; - - out_uint32x4_t = vld1q_dup_u32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c deleted file mode 100644 index 5cfa03a2d25..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dupu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dupu64 (void) -{ - uint64x2_t out_uint64x2_t; - - out_uint64x2_t = vld1q_dup_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c deleted file mode 100644 index 240ad568fb0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Q_dupu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_dupu8 (void) -{ - uint8x16_t out_uint8x16_t; - - out_uint8x16_t = vld1q_dup_u8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c deleted file mode 100644 index da17545484c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_lanef32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c deleted file mode 100644 index 546e5e7adf3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_lanep16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16x8_t arg1_poly16x8_t; - - out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c deleted file mode 100644 index 18a28f4da24..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_lanep64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld1Q_lanep64 (void) -{ - poly64x2_t out_poly64x2_t; - poly64x2_t arg1_poly64x2_t; - - out_poly64x2_t = vld1q_lane_p64 (0, arg1_poly64x2_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c deleted file mode 100644 index 290a11599fa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_lanep8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c deleted file mode 100644 index 06c4b9d1551..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_lanes16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c deleted file mode 100644 index 58433ea1939..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_lanes32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c deleted file mode 100644 index bfe0dd90978..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_lanes64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c deleted file mode 100644 index ee7026dddec..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_lanes8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c deleted file mode 100644 index 0361b4f7748..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_laneu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c deleted file mode 100644 index 6317455c4e1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_laneu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c deleted file mode 100644 index 918e0df9a65..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_laneu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c deleted file mode 100644 index e96ad29c2c3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1Q_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Q_laneu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c deleted file mode 100644 index 2a5fec19bfd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qf32 (void) -{ - float32x4_t out_float32x4_t; - - out_float32x4_t = vld1q_f32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c deleted file mode 100644 index 1b0deeea08d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qp16 (void) -{ - poly16x8_t out_poly16x8_t; - - out_poly16x8_t = vld1q_p16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c deleted file mode 100644 index cd43706b50c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld1Qp64 (void) -{ - poly64x2_t out_poly64x2_t; - - out_poly64x2_t = vld1q_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c deleted file mode 100644 index 24a186b0e0b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qp8 (void) -{ - poly8x16_t out_poly8x16_t; - - out_poly8x16_t = vld1q_p8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c deleted file mode 100644 index b146b788fd8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qs16 (void) -{ - int16x8_t out_int16x8_t; - - out_int16x8_t = vld1q_s16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c deleted file mode 100644 index d1d038611e0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qs32 (void) -{ - int32x4_t out_int32x4_t; - - out_int32x4_t = vld1q_s32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c deleted file mode 100644 index be53cf330de..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qs64 (void) -{ - int64x2_t out_int64x2_t; - - out_int64x2_t = vld1q_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c deleted file mode 100644 index 58b97a17e93..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qs8 (void) -{ - int8x16_t out_int8x16_t; - - out_int8x16_t = vld1q_s8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c deleted file mode 100644 index 5c299f8c4e0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qu16 (void) -{ - uint16x8_t out_uint16x8_t; - - out_uint16x8_t = vld1q_u16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c deleted file mode 100644 index 6b4d0b0a3c5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qu32 (void) -{ - uint32x4_t out_uint32x4_t; - - out_uint32x4_t = vld1q_u32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c deleted file mode 100644 index 018bac70ac0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qu64 (void) -{ - uint64x2_t out_uint64x2_t; - - out_uint64x2_t = vld1q_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c deleted file mode 100644 index 06726dbb098..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1Qu8 (void) -{ - uint8x16_t out_uint8x16_t; - - out_uint8x16_t = vld1q_u8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c deleted file mode 100644 index 699d77bb3b1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dupf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dupf32 (void) -{ - float32x2_t out_float32x2_t; - - out_float32x2_t = vld1_dup_f32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c deleted file mode 100644 index baee8e08af2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dupp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dupp16 (void) -{ - poly16x4_t out_poly16x4_t; - - out_poly16x4_t = vld1_dup_p16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c deleted file mode 100644 index fa40f84298b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dupp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld1_dupp64 (void) -{ - poly64x1_t out_poly64x1_t; - - out_poly64x1_t = vld1_dup_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c deleted file mode 100644 index adde412a137..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dupp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dupp8 (void) -{ - poly8x8_t out_poly8x8_t; - - out_poly8x8_t = vld1_dup_p8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c deleted file mode 100644 index f7c34478c9e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dups16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dups16 (void) -{ - int16x4_t out_int16x4_t; - - out_int16x4_t = vld1_dup_s16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c deleted file mode 100644 index 4039804956c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dups32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dups32 (void) -{ - int32x2_t out_int32x2_t; - - out_int32x2_t = vld1_dup_s32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c deleted file mode 100644 index 6784123ba53..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dups64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dups64 (void) -{ - int64x1_t out_int64x1_t; - - out_int64x1_t = vld1_dup_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c deleted file mode 100644 index d6a3a8b623e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dups8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dups8 (void) -{ - int8x8_t out_int8x8_t; - - out_int8x8_t = vld1_dup_s8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c deleted file mode 100644 index 2cd76b7cd8b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dupu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dupu16 (void) -{ - uint16x4_t out_uint16x4_t; - - out_uint16x4_t = vld1_dup_u16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c deleted file mode 100644 index 85e5122a156..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dupu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dupu32 (void) -{ - uint32x2_t out_uint32x2_t; - - out_uint32x2_t = vld1_dup_u32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c deleted file mode 100644 index 7ccb05fb61c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dupu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dupu64 (void) -{ - uint64x1_t out_uint64x1_t; - - out_uint64x1_t = vld1_dup_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c deleted file mode 100644 index 8f6734a55c7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1_dupu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_dupu8 (void) -{ - uint8x8_t out_uint8x8_t; - - out_uint8x8_t = vld1_dup_u8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c deleted file mode 100644 index 809866b0042..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_lanef32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c deleted file mode 100644 index 5cc3b754f7b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_lanep16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c deleted file mode 100644 index 874b5d0c1a5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_lanep64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld1_lanep64 (void) -{ - poly64x1_t out_poly64x1_t; - poly64x1_t arg1_poly64x1_t; - - out_poly64x1_t = vld1_lane_p64 (0, arg1_poly64x1_t, 0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c deleted file mode 100644 index 3349ed0f975..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_lanep8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c deleted file mode 100644 index fbb4c91989c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_lanes16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c deleted file mode 100644 index c623f3ad426..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_lanes32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c deleted file mode 100644 index a26cc2e5a4f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_lanes64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c deleted file mode 100644 index f5b3ae243d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_lanes8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c deleted file mode 100644 index cf97ef5ccb5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_laneu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c deleted file mode 100644 index e5f19ad19de..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_laneu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c deleted file mode 100644 index 64e353e497d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_laneu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c deleted file mode 100644 index d93859652b8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld1_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1_laneu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c b/gcc/testsuite/gcc.target/arm/neon/vld1f32.c deleted file mode 100644 index acca8542a13..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1f32 (void) -{ - float32x2_t out_float32x2_t; - - out_float32x2_t = vld1_f32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c b/gcc/testsuite/gcc.target/arm/neon/vld1p16.c deleted file mode 100644 index 59b8dc57bdc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1p16 (void) -{ - poly16x4_t out_poly16x4_t; - - out_poly16x4_t = vld1_p16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p64.c b/gcc/testsuite/gcc.target/arm/neon/vld1p64.c deleted file mode 100644 index 8322dd0e34a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld1p64 (void) -{ - poly64x1_t out_poly64x1_t; - - out_poly64x1_t = vld1_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c b/gcc/testsuite/gcc.target/arm/neon/vld1p8.c deleted file mode 100644 index 96fda65700b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1p8 (void) -{ - poly8x8_t out_poly8x8_t; - - out_poly8x8_t = vld1_p8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c b/gcc/testsuite/gcc.target/arm/neon/vld1s16.c deleted file mode 100644 index d95113eabe5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1s16 (void) -{ - int16x4_t out_int16x4_t; - - out_int16x4_t = vld1_s16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c b/gcc/testsuite/gcc.target/arm/neon/vld1s32.c deleted file mode 100644 index 6ed2a963b39..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1s32 (void) -{ - int32x2_t out_int32x2_t; - - out_int32x2_t = vld1_s32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c b/gcc/testsuite/gcc.target/arm/neon/vld1s64.c deleted file mode 100644 index 03c6cf02001..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1s64 (void) -{ - int64x1_t out_int64x1_t; - - out_int64x1_t = vld1_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c b/gcc/testsuite/gcc.target/arm/neon/vld1s8.c deleted file mode 100644 index b3bdbba3205..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1s8 (void) -{ - int8x8_t out_int8x8_t; - - out_int8x8_t = vld1_s8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c b/gcc/testsuite/gcc.target/arm/neon/vld1u16.c deleted file mode 100644 index 7ec982837e0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1u16 (void) -{ - uint16x4_t out_uint16x4_t; - - out_uint16x4_t = vld1_u16 (0); -} - -/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c b/gcc/testsuite/gcc.target/arm/neon/vld1u32.c deleted file mode 100644 index 8039822d0b9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1u32 (void) -{ - uint32x2_t out_uint32x2_t; - - out_uint32x2_t = vld1_u32 (0); -} - -/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c b/gcc/testsuite/gcc.target/arm/neon/vld1u64.c deleted file mode 100644 index f4e4cc95f1b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1u64 (void) -{ - uint64x1_t out_uint64x1_t; - - out_uint64x1_t = vld1_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c b/gcc/testsuite/gcc.target/arm/neon/vld1u8.c deleted file mode 100644 index 3133ddb78ae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld1u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld1u8 (void) -{ - uint8x8_t out_uint8x8_t; - - out_uint8x8_t = vld1_u8 (0); -} - -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c deleted file mode 100644 index 0cccd0f384c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Q_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Q_lanef32 (void) -{ - float32x4x2_t out_float32x4x2_t; - float32x4x2_t arg1_float32x4x2_t; - - out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c deleted file mode 100644 index 2187a7f7d5d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Q_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Q_lanep16 (void) -{ - poly16x8x2_t out_poly16x8x2_t; - poly16x8x2_t arg1_poly16x8x2_t; - - out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c deleted file mode 100644 index 1872088acd9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Q_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Q_lanes16 (void) -{ - int16x8x2_t out_int16x8x2_t; - int16x8x2_t arg1_int16x8x2_t; - - out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c deleted file mode 100644 index 953b5181225..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Q_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Q_lanes32 (void) -{ - int32x4x2_t out_int32x4x2_t; - int32x4x2_t arg1_int32x4x2_t; - - out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c deleted file mode 100644 index 6f0f45fa3a6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Q_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Q_laneu16 (void) -{ - uint16x8x2_t out_uint16x8x2_t; - uint16x8x2_t arg1_uint16x8x2_t; - - out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c deleted file mode 100644 index 3f6565457b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Q_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Q_laneu32 (void) -{ - uint32x4x2_t out_uint32x4x2_t; - uint32x4x2_t arg1_uint32x4x2_t; - - out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c deleted file mode 100644 index a112ea26d16..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qf32 (void) -{ - float32x4x2_t out_float32x4x2_t; - - out_float32x4x2_t = vld2q_f32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c deleted file mode 100644 index bb75b7ec2f0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qp16 (void) -{ - poly16x8x2_t out_poly16x8x2_t; - - out_poly16x8x2_t = vld2q_p16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c deleted file mode 100644 index 5f4307d1ad6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qp8 (void) -{ - poly8x16x2_t out_poly8x16x2_t; - - out_poly8x16x2_t = vld2q_p8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c deleted file mode 100644 index 2b53903c678..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qs16 (void) -{ - int16x8x2_t out_int16x8x2_t; - - out_int16x8x2_t = vld2q_s16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c deleted file mode 100644 index 53bc98b7db6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qs32 (void) -{ - int32x4x2_t out_int32x4x2_t; - - out_int32x4x2_t = vld2q_s32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c deleted file mode 100644 index d056fb0f6ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qs8 (void) -{ - int8x16x2_t out_int8x16x2_t; - - out_int8x16x2_t = vld2q_s8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c deleted file mode 100644 index 1a69ee5e2ee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qu16 (void) -{ - uint16x8x2_t out_uint16x8x2_t; - - out_uint16x8x2_t = vld2q_u16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c deleted file mode 100644 index 45fe749eb92..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qu32 (void) -{ - uint32x4x2_t out_uint32x4x2_t; - - out_uint32x4x2_t = vld2q_u32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c deleted file mode 100644 index 99c935f26f0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2Qu8 (void) -{ - uint8x16x2_t out_uint8x16x2_t; - - out_uint8x16x2_t = vld2q_u8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c deleted file mode 100644 index e33dad94a73..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dupf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dupf32 (void) -{ - float32x2x2_t out_float32x2x2_t; - - out_float32x2x2_t = vld2_dup_f32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c deleted file mode 100644 index 2b9cf43b631..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dupp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dupp16 (void) -{ - poly16x4x2_t out_poly16x4x2_t; - - out_poly16x4x2_t = vld2_dup_p16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c deleted file mode 100644 index acebb9b3606..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dupp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld2_dupp64 (void) -{ - poly64x1x2_t out_poly64x1x2_t; - - out_poly64x1x2_t = vld2_dup_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c deleted file mode 100644 index 00cfd9f67c3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dupp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dupp8 (void) -{ - poly8x8x2_t out_poly8x8x2_t; - - out_poly8x8x2_t = vld2_dup_p8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c deleted file mode 100644 index 9db5388028c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dups16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dups16 (void) -{ - int16x4x2_t out_int16x4x2_t; - - out_int16x4x2_t = vld2_dup_s16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c deleted file mode 100644 index 80f186d9922..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dups32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dups32 (void) -{ - int32x2x2_t out_int32x2x2_t; - - out_int32x2x2_t = vld2_dup_s32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c deleted file mode 100644 index d6b06acdb76..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dups64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dups64 (void) -{ - int64x1x2_t out_int64x1x2_t; - - out_int64x1x2_t = vld2_dup_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c deleted file mode 100644 index 50629285659..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dups8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dups8 (void) -{ - int8x8x2_t out_int8x8x2_t; - - out_int8x8x2_t = vld2_dup_s8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c deleted file mode 100644 index 9380195ec08..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dupu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dupu16 (void) -{ - uint16x4x2_t out_uint16x4x2_t; - - out_uint16x4x2_t = vld2_dup_u16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c deleted file mode 100644 index d469691c720..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dupu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dupu32 (void) -{ - uint32x2x2_t out_uint32x2x2_t; - - out_uint32x2x2_t = vld2_dup_u32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c deleted file mode 100644 index bb92ec7722d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dupu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dupu64 (void) -{ - uint64x1x2_t out_uint64x1x2_t; - - out_uint64x1x2_t = vld2_dup_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c deleted file mode 100644 index 72dc31b2313..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2_dupu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_dupu8 (void) -{ - uint8x8x2_t out_uint8x8x2_t; - - out_uint8x8x2_t = vld2_dup_u8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c deleted file mode 100644 index 7379d3b6238..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_lanef32 (void) -{ - float32x2x2_t out_float32x2x2_t; - float32x2x2_t arg1_float32x2x2_t; - - out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c deleted file mode 100644 index 186a1c5b73a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_lanep16 (void) -{ - poly16x4x2_t out_poly16x4x2_t; - poly16x4x2_t arg1_poly16x4x2_t; - - out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c deleted file mode 100644 index 3a8201da026..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_lanep8 (void) -{ - poly8x8x2_t out_poly8x8x2_t; - poly8x8x2_t arg1_poly8x8x2_t; - - out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c deleted file mode 100644 index 08813592459..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_lanes16 (void) -{ - int16x4x2_t out_int16x4x2_t; - int16x4x2_t arg1_int16x4x2_t; - - out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c deleted file mode 100644 index 8ad919c5089..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_lanes32 (void) -{ - int32x2x2_t out_int32x2x2_t; - int32x2x2_t arg1_int32x2x2_t; - - out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c deleted file mode 100644 index d4a63070236..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_lanes8 (void) -{ - int8x8x2_t out_int8x8x2_t; - int8x8x2_t arg1_int8x8x2_t; - - out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c deleted file mode 100644 index f0c7fa0f2a6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_laneu16 (void) -{ - uint16x4x2_t out_uint16x4x2_t; - uint16x4x2_t arg1_uint16x4x2_t; - - out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c deleted file mode 100644 index f61fb515d42..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_laneu32 (void) -{ - uint32x2x2_t out_uint32x2x2_t; - uint32x2x2_t arg1_uint32x2x2_t; - - out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c deleted file mode 100644 index 8def9138c78..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld2_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2_laneu8 (void) -{ - uint8x8x2_t out_uint8x8x2_t; - uint8x8x2_t arg1_uint8x8x2_t; - - out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c b/gcc/testsuite/gcc.target/arm/neon/vld2f32.c deleted file mode 100644 index db3ff7a83a6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2f32 (void) -{ - float32x2x2_t out_float32x2x2_t; - - out_float32x2x2_t = vld2_f32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c b/gcc/testsuite/gcc.target/arm/neon/vld2p16.c deleted file mode 100644 index 7181dbf1d60..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2p16 (void) -{ - poly16x4x2_t out_poly16x4x2_t; - - out_poly16x4x2_t = vld2_p16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p64.c b/gcc/testsuite/gcc.target/arm/neon/vld2p64.c deleted file mode 100644 index e92c414fa5a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld2p64 (void) -{ - poly64x1x2_t out_poly64x1x2_t; - - out_poly64x1x2_t = vld2_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c b/gcc/testsuite/gcc.target/arm/neon/vld2p8.c deleted file mode 100644 index 9e97b592f4f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2p8 (void) -{ - poly8x8x2_t out_poly8x8x2_t; - - out_poly8x8x2_t = vld2_p8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c b/gcc/testsuite/gcc.target/arm/neon/vld2s16.c deleted file mode 100644 index 268b62b2ba1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2s16 (void) -{ - int16x4x2_t out_int16x4x2_t; - - out_int16x4x2_t = vld2_s16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c b/gcc/testsuite/gcc.target/arm/neon/vld2s32.c deleted file mode 100644 index c65d931ed2e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2s32 (void) -{ - int32x2x2_t out_int32x2x2_t; - - out_int32x2x2_t = vld2_s32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c b/gcc/testsuite/gcc.target/arm/neon/vld2s64.c deleted file mode 100644 index 136df0561df..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2s64 (void) -{ - int64x1x2_t out_int64x1x2_t; - - out_int64x1x2_t = vld2_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c b/gcc/testsuite/gcc.target/arm/neon/vld2s8.c deleted file mode 100644 index c812b197601..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2s8 (void) -{ - int8x8x2_t out_int8x8x2_t; - - out_int8x8x2_t = vld2_s8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c b/gcc/testsuite/gcc.target/arm/neon/vld2u16.c deleted file mode 100644 index a089a6c61b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2u16 (void) -{ - uint16x4x2_t out_uint16x4x2_t; - - out_uint16x4x2_t = vld2_u16 (0); -} - -/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c b/gcc/testsuite/gcc.target/arm/neon/vld2u32.c deleted file mode 100644 index 5d5875ea4c0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2u32 (void) -{ - uint32x2x2_t out_uint32x2x2_t; - - out_uint32x2x2_t = vld2_u32 (0); -} - -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c b/gcc/testsuite/gcc.target/arm/neon/vld2u64.c deleted file mode 100644 index 6124db89569..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2u64 (void) -{ - uint64x1x2_t out_uint64x1x2_t; - - out_uint64x1x2_t = vld2_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c b/gcc/testsuite/gcc.target/arm/neon/vld2u8.c deleted file mode 100644 index fb6275558e1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld2u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld2u8 (void) -{ - uint8x8x2_t out_uint8x8x2_t; - - out_uint8x8x2_t = vld2_u8 (0); -} - -/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c deleted file mode 100644 index 0b36c4e37d1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Q_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Q_lanef32 (void) -{ - float32x4x3_t out_float32x4x3_t; - float32x4x3_t arg1_float32x4x3_t; - - out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c deleted file mode 100644 index 88123f57b50..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Q_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Q_lanep16 (void) -{ - poly16x8x3_t out_poly16x8x3_t; - poly16x8x3_t arg1_poly16x8x3_t; - - out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c deleted file mode 100644 index 3349522e9f3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Q_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Q_lanes16 (void) -{ - int16x8x3_t out_int16x8x3_t; - int16x8x3_t arg1_int16x8x3_t; - - out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c deleted file mode 100644 index a669441d9d0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Q_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Q_lanes32 (void) -{ - int32x4x3_t out_int32x4x3_t; - int32x4x3_t arg1_int32x4x3_t; - - out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c deleted file mode 100644 index 68cb436692e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Q_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Q_laneu16 (void) -{ - uint16x8x3_t out_uint16x8x3_t; - uint16x8x3_t arg1_uint16x8x3_t; - - out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c deleted file mode 100644 index 0392513a4ca..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Q_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Q_laneu32 (void) -{ - uint32x4x3_t out_uint32x4x3_t; - uint32x4x3_t arg1_uint32x4x3_t; - - out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c deleted file mode 100644 index c45e1b27d5e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qf32 (void) -{ - float32x4x3_t out_float32x4x3_t; - - out_float32x4x3_t = vld3q_f32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c deleted file mode 100644 index 9658954ae7b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qp16 (void) -{ - poly16x8x3_t out_poly16x8x3_t; - - out_poly16x8x3_t = vld3q_p16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c deleted file mode 100644 index bb5469378ad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qp8 (void) -{ - poly8x16x3_t out_poly8x16x3_t; - - out_poly8x16x3_t = vld3q_p8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c deleted file mode 100644 index 8864f687d1b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qs16 (void) -{ - int16x8x3_t out_int16x8x3_t; - - out_int16x8x3_t = vld3q_s16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c deleted file mode 100644 index d33e8820b52..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qs32 (void) -{ - int32x4x3_t out_int32x4x3_t; - - out_int32x4x3_t = vld3q_s32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c deleted file mode 100644 index 1df9c831024..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qs8 (void) -{ - int8x16x3_t out_int8x16x3_t; - - out_int8x16x3_t = vld3q_s8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c deleted file mode 100644 index c6422ed5d62..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qu16 (void) -{ - uint16x8x3_t out_uint16x8x3_t; - - out_uint16x8x3_t = vld3q_u16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c deleted file mode 100644 index 0632ef35a52..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qu32 (void) -{ - uint32x4x3_t out_uint32x4x3_t; - - out_uint32x4x3_t = vld3q_u32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c deleted file mode 100644 index d41c469a37d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3Qu8 (void) -{ - uint8x16x3_t out_uint8x16x3_t; - - out_uint8x16x3_t = vld3q_u8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c deleted file mode 100644 index 0f0c420daa2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dupf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dupf32 (void) -{ - float32x2x3_t out_float32x2x3_t; - - out_float32x2x3_t = vld3_dup_f32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c deleted file mode 100644 index 9d794da54ab..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dupp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dupp16 (void) -{ - poly16x4x3_t out_poly16x4x3_t; - - out_poly16x4x3_t = vld3_dup_p16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c deleted file mode 100644 index ab34f1b7ca4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dupp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld3_dupp64 (void) -{ - poly64x1x3_t out_poly64x1x3_t; - - out_poly64x1x3_t = vld3_dup_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c deleted file mode 100644 index 0132d404f62..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dupp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dupp8 (void) -{ - poly8x8x3_t out_poly8x8x3_t; - - out_poly8x8x3_t = vld3_dup_p8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c deleted file mode 100644 index c5ba76857b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dups16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dups16 (void) -{ - int16x4x3_t out_int16x4x3_t; - - out_int16x4x3_t = vld3_dup_s16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c deleted file mode 100644 index 6d069b5956e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dups32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dups32 (void) -{ - int32x2x3_t out_int32x2x3_t; - - out_int32x2x3_t = vld3_dup_s32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c deleted file mode 100644 index 31267b6b5f9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dups64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dups64 (void) -{ - int64x1x3_t out_int64x1x3_t; - - out_int64x1x3_t = vld3_dup_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c deleted file mode 100644 index c6c0935aaf9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dups8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dups8 (void) -{ - int8x8x3_t out_int8x8x3_t; - - out_int8x8x3_t = vld3_dup_s8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c deleted file mode 100644 index ed49e0a045c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dupu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dupu16 (void) -{ - uint16x4x3_t out_uint16x4x3_t; - - out_uint16x4x3_t = vld3_dup_u16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c deleted file mode 100644 index 04eb017afec..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dupu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dupu32 (void) -{ - uint32x2x3_t out_uint32x2x3_t; - - out_uint32x2x3_t = vld3_dup_u32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c deleted file mode 100644 index 7bb5b6285b8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dupu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dupu64 (void) -{ - uint64x1x3_t out_uint64x1x3_t; - - out_uint64x1x3_t = vld3_dup_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c deleted file mode 100644 index f315786aff9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3_dupu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_dupu8 (void) -{ - uint8x8x3_t out_uint8x8x3_t; - - out_uint8x8x3_t = vld3_dup_u8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c deleted file mode 100644 index 4d7835313db..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_lanef32 (void) -{ - float32x2x3_t out_float32x2x3_t; - float32x2x3_t arg1_float32x2x3_t; - - out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c deleted file mode 100644 index 6a3b87ac94e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_lanep16 (void) -{ - poly16x4x3_t out_poly16x4x3_t; - poly16x4x3_t arg1_poly16x4x3_t; - - out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c deleted file mode 100644 index 41ac97d95d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_lanep8 (void) -{ - poly8x8x3_t out_poly8x8x3_t; - poly8x8x3_t arg1_poly8x8x3_t; - - out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c deleted file mode 100644 index f74ffcea897..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_lanes16 (void) -{ - int16x4x3_t out_int16x4x3_t; - int16x4x3_t arg1_int16x4x3_t; - - out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c deleted file mode 100644 index bc41477c1a6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_lanes32 (void) -{ - int32x2x3_t out_int32x2x3_t; - int32x2x3_t arg1_int32x2x3_t; - - out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c deleted file mode 100644 index 995db24348e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_lanes8 (void) -{ - int8x8x3_t out_int8x8x3_t; - int8x8x3_t arg1_int8x8x3_t; - - out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c deleted file mode 100644 index 63d22ca9cee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_laneu16 (void) -{ - uint16x4x3_t out_uint16x4x3_t; - uint16x4x3_t arg1_uint16x4x3_t; - - out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c deleted file mode 100644 index 486db6dced7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_laneu32 (void) -{ - uint32x2x3_t out_uint32x2x3_t; - uint32x2x3_t arg1_uint32x2x3_t; - - out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c deleted file mode 100644 index b5ea2fb30cb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld3_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3_laneu8 (void) -{ - uint8x8x3_t out_uint8x8x3_t; - uint8x8x3_t arg1_uint8x8x3_t; - - out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c b/gcc/testsuite/gcc.target/arm/neon/vld3f32.c deleted file mode 100644 index 79e1a4ac860..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3f32 (void) -{ - float32x2x3_t out_float32x2x3_t; - - out_float32x2x3_t = vld3_f32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c b/gcc/testsuite/gcc.target/arm/neon/vld3p16.c deleted file mode 100644 index 5e053a2dbe2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3p16 (void) -{ - poly16x4x3_t out_poly16x4x3_t; - - out_poly16x4x3_t = vld3_p16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p64.c b/gcc/testsuite/gcc.target/arm/neon/vld3p64.c deleted file mode 100644 index 8fbc95e35d5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld3p64 (void) -{ - poly64x1x3_t out_poly64x1x3_t; - - out_poly64x1x3_t = vld3_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c b/gcc/testsuite/gcc.target/arm/neon/vld3p8.c deleted file mode 100644 index f15b9685086..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3p8 (void) -{ - poly8x8x3_t out_poly8x8x3_t; - - out_poly8x8x3_t = vld3_p8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c b/gcc/testsuite/gcc.target/arm/neon/vld3s16.c deleted file mode 100644 index ed5e24d41df..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3s16 (void) -{ - int16x4x3_t out_int16x4x3_t; - - out_int16x4x3_t = vld3_s16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c b/gcc/testsuite/gcc.target/arm/neon/vld3s32.c deleted file mode 100644 index 6ad2b9a7266..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3s32 (void) -{ - int32x2x3_t out_int32x2x3_t; - - out_int32x2x3_t = vld3_s32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c b/gcc/testsuite/gcc.target/arm/neon/vld3s64.c deleted file mode 100644 index 14f8aa17fe0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3s64 (void) -{ - int64x1x3_t out_int64x1x3_t; - - out_int64x1x3_t = vld3_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c b/gcc/testsuite/gcc.target/arm/neon/vld3s8.c deleted file mode 100644 index 2192499d16a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3s8 (void) -{ - int8x8x3_t out_int8x8x3_t; - - out_int8x8x3_t = vld3_s8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c b/gcc/testsuite/gcc.target/arm/neon/vld3u16.c deleted file mode 100644 index 5fd1a01f53f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3u16 (void) -{ - uint16x4x3_t out_uint16x4x3_t; - - out_uint16x4x3_t = vld3_u16 (0); -} - -/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c b/gcc/testsuite/gcc.target/arm/neon/vld3u32.c deleted file mode 100644 index 4ae8217bdf9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3u32 (void) -{ - uint32x2x3_t out_uint32x2x3_t; - - out_uint32x2x3_t = vld3_u32 (0); -} - -/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c b/gcc/testsuite/gcc.target/arm/neon/vld3u64.c deleted file mode 100644 index c6d76268027..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3u64 (void) -{ - uint64x1x3_t out_uint64x1x3_t; - - out_uint64x1x3_t = vld3_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c b/gcc/testsuite/gcc.target/arm/neon/vld3u8.c deleted file mode 100644 index e3363393cf5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld3u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld3u8 (void) -{ - uint8x8x3_t out_uint8x8x3_t; - - out_uint8x8x3_t = vld3_u8 (0); -} - -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c deleted file mode 100644 index dfac62755fa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Q_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Q_lanef32 (void) -{ - float32x4x4_t out_float32x4x4_t; - float32x4x4_t arg1_float32x4x4_t; - - out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c deleted file mode 100644 index 6ed339d6406..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Q_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Q_lanep16 (void) -{ - poly16x8x4_t out_poly16x8x4_t; - poly16x8x4_t arg1_poly16x8x4_t; - - out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c deleted file mode 100644 index 3683e7e295d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Q_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Q_lanes16 (void) -{ - int16x8x4_t out_int16x8x4_t; - int16x8x4_t arg1_int16x8x4_t; - - out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c deleted file mode 100644 index 1d25eb113c6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Q_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Q_lanes32 (void) -{ - int32x4x4_t out_int32x4x4_t; - int32x4x4_t arg1_int32x4x4_t; - - out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c deleted file mode 100644 index 75848c3bb43..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Q_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Q_laneu16 (void) -{ - uint16x8x4_t out_uint16x8x4_t; - uint16x8x4_t arg1_uint16x8x4_t; - - out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c deleted file mode 100644 index 9201bdc9068..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Q_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Q_laneu32 (void) -{ - uint32x4x4_t out_uint32x4x4_t; - uint32x4x4_t arg1_uint32x4x4_t; - - out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c deleted file mode 100644 index 199c4bb7f77..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qf32 (void) -{ - float32x4x4_t out_float32x4x4_t; - - out_float32x4x4_t = vld4q_f32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c deleted file mode 100644 index f6638a17c60..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qp16 (void) -{ - poly16x8x4_t out_poly16x8x4_t; - - out_poly16x8x4_t = vld4q_p16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c deleted file mode 100644 index a9a8c52edae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qp8 (void) -{ - poly8x16x4_t out_poly8x16x4_t; - - out_poly8x16x4_t = vld4q_p8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c deleted file mode 100644 index 6f7e84df767..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qs16 (void) -{ - int16x8x4_t out_int16x8x4_t; - - out_int16x8x4_t = vld4q_s16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c deleted file mode 100644 index e71d6fedddb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qs32 (void) -{ - int32x4x4_t out_int32x4x4_t; - - out_int32x4x4_t = vld4q_s32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c deleted file mode 100644 index 30d4dea4bef..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qs8 (void) -{ - int8x16x4_t out_int8x16x4_t; - - out_int8x16x4_t = vld4q_s8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c deleted file mode 100644 index 9d737bac4c8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qu16 (void) -{ - uint16x8x4_t out_uint16x8x4_t; - - out_uint16x8x4_t = vld4q_u16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c deleted file mode 100644 index 7d46e2f82e5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qu32 (void) -{ - uint32x4x4_t out_uint32x4x4_t; - - out_uint32x4x4_t = vld4q_u32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c deleted file mode 100644 index 4484cda621e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4Qu8 (void) -{ - uint8x16x4_t out_uint8x16x4_t; - - out_uint8x16x4_t = vld4q_u8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c deleted file mode 100644 index e59fb125133..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dupf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dupf32 (void) -{ - float32x2x4_t out_float32x2x4_t; - - out_float32x2x4_t = vld4_dup_f32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c deleted file mode 100644 index 4426298d512..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dupp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dupp16 (void) -{ - poly16x4x4_t out_poly16x4x4_t; - - out_poly16x4x4_t = vld4_dup_p16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c deleted file mode 100644 index da0691189b7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dupp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld4_dupp64 (void) -{ - poly64x1x4_t out_poly64x1x4_t; - - out_poly64x1x4_t = vld4_dup_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c deleted file mode 100644 index 936c91e675b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dupp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dupp8 (void) -{ - poly8x8x4_t out_poly8x8x4_t; - - out_poly8x8x4_t = vld4_dup_p8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c deleted file mode 100644 index f7a35e94f0d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dups16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dups16 (void) -{ - int16x4x4_t out_int16x4x4_t; - - out_int16x4x4_t = vld4_dup_s16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c deleted file mode 100644 index 7ead80ca82e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dups32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dups32 (void) -{ - int32x2x4_t out_int32x2x4_t; - - out_int32x2x4_t = vld4_dup_s32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c deleted file mode 100644 index 4420628e374..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dups64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dups64 (void) -{ - int64x1x4_t out_int64x1x4_t; - - out_int64x1x4_t = vld4_dup_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c deleted file mode 100644 index 03f3d884a00..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dups8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dups8 (void) -{ - int8x8x4_t out_int8x8x4_t; - - out_int8x8x4_t = vld4_dup_s8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c deleted file mode 100644 index 3d084933da5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dupu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dupu16 (void) -{ - uint16x4x4_t out_uint16x4x4_t; - - out_uint16x4x4_t = vld4_dup_u16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c deleted file mode 100644 index 0f61908f7d5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dupu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dupu32 (void) -{ - uint32x2x4_t out_uint32x2x4_t; - - out_uint32x2x4_t = vld4_dup_u32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c deleted file mode 100644 index c2f00ff29dc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dupu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dupu64 (void) -{ - uint64x1x4_t out_uint64x1x4_t; - - out_uint64x1x4_t = vld4_dup_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c deleted file mode 100644 index ee4c67412e2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4_dupu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_dupu8 (void) -{ - uint8x8x4_t out_uint8x8x4_t; - - out_uint8x8x4_t = vld4_dup_u8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c deleted file mode 100644 index 3f293d1e2b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_lanef32 (void) -{ - float32x2x4_t out_float32x2x4_t; - float32x2x4_t arg1_float32x2x4_t; - - out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c deleted file mode 100644 index 94d24af3c3c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_lanep16 (void) -{ - poly16x4x4_t out_poly16x4x4_t; - poly16x4x4_t arg1_poly16x4x4_t; - - out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c deleted file mode 100644 index 1bcb3e12190..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_lanep8 (void) -{ - poly8x8x4_t out_poly8x8x4_t; - poly8x8x4_t arg1_poly8x8x4_t; - - out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c deleted file mode 100644 index fbaeadbb0ad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_lanes16 (void) -{ - int16x4x4_t out_int16x4x4_t; - int16x4x4_t arg1_int16x4x4_t; - - out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c deleted file mode 100644 index 7f9cc0c55fd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_lanes32 (void) -{ - int32x2x4_t out_int32x2x4_t; - int32x2x4_t arg1_int32x2x4_t; - - out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c deleted file mode 100644 index 637361c3ffa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_lanes8 (void) -{ - int8x8x4_t out_int8x8x4_t; - int8x8x4_t arg1_int8x8x4_t; - - out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c deleted file mode 100644 index a0d98a42116..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_laneu16 (void) -{ - uint16x4x4_t out_uint16x4x4_t; - uint16x4x4_t arg1_uint16x4x4_t; - - out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c deleted file mode 100644 index a6913987059..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_laneu32 (void) -{ - uint32x2x4_t out_uint32x2x4_t; - uint32x2x4_t arg1_uint32x2x4_t; - - out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c deleted file mode 100644 index 48a60b3d05d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vld4_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4_laneu8 (void) -{ - uint8x8x4_t out_uint8x8x4_t; - uint8x8x4_t arg1_uint8x8x4_t; - - out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c b/gcc/testsuite/gcc.target/arm/neon/vld4f32.c deleted file mode 100644 index c3de78f020b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4f32 (void) -{ - float32x2x4_t out_float32x2x4_t; - - out_float32x2x4_t = vld4_f32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c b/gcc/testsuite/gcc.target/arm/neon/vld4p16.c deleted file mode 100644 index 8909bd498dd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4p16 (void) -{ - poly16x4x4_t out_poly16x4x4_t; - - out_poly16x4x4_t = vld4_p16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p64.c b/gcc/testsuite/gcc.target/arm/neon/vld4p64.c deleted file mode 100644 index eda3bc5bb50..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vld4p64 (void) -{ - poly64x1x4_t out_poly64x1x4_t; - - out_poly64x1x4_t = vld4_p64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c b/gcc/testsuite/gcc.target/arm/neon/vld4p8.c deleted file mode 100644 index c77b2231349..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4p8 (void) -{ - poly8x8x4_t out_poly8x8x4_t; - - out_poly8x8x4_t = vld4_p8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c b/gcc/testsuite/gcc.target/arm/neon/vld4s16.c deleted file mode 100644 index 052a84319e6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4s16 (void) -{ - int16x4x4_t out_int16x4x4_t; - - out_int16x4x4_t = vld4_s16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c b/gcc/testsuite/gcc.target/arm/neon/vld4s32.c deleted file mode 100644 index ce9bbaacc40..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4s32 (void) -{ - int32x2x4_t out_int32x2x4_t; - - out_int32x2x4_t = vld4_s32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c b/gcc/testsuite/gcc.target/arm/neon/vld4s64.c deleted file mode 100644 index 537ece0b83a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4s64 (void) -{ - int64x1x4_t out_int64x1x4_t; - - out_int64x1x4_t = vld4_s64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c b/gcc/testsuite/gcc.target/arm/neon/vld4s8.c deleted file mode 100644 index c7c33e693da..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4s8 (void) -{ - int8x8x4_t out_int8x8x4_t; - - out_int8x8x4_t = vld4_s8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c b/gcc/testsuite/gcc.target/arm/neon/vld4u16.c deleted file mode 100644 index bb602fa5275..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4u16 (void) -{ - uint16x4x4_t out_uint16x4x4_t; - - out_uint16x4x4_t = vld4_u16 (0); -} - -/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c b/gcc/testsuite/gcc.target/arm/neon/vld4u32.c deleted file mode 100644 index 680d1f0914f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4u32 (void) -{ - uint32x2x4_t out_uint32x2x4_t; - - out_uint32x2x4_t = vld4_u32 (0); -} - -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c b/gcc/testsuite/gcc.target/arm/neon/vld4u64.c deleted file mode 100644 index 304aff0ed28..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4u64 (void) -{ - uint64x1x4_t out_uint64x1x4_t; - - out_uint64x1x4_t = vld4_u64 (0); -} - -/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c b/gcc/testsuite/gcc.target/arm/neon/vld4u8.c deleted file mode 100644 index 8972de14d48..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vld4u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vld4u8 (void) -{ - uint8x8x4_t out_uint8x8x4_t; - - out_uint8x8x4_t = vld4_u8 (0); -} - -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c deleted file mode 100644 index c39fef34147..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vmaxq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vmax\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c deleted file mode 100644 index 57359f4584a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vmaxq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vmax\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c deleted file mode 100644 index bf2853fa13a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vmaxq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vmax\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c deleted file mode 100644 index f25da0183b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vmaxq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vmax\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c deleted file mode 100644 index 58707fd63b5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vmaxq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vmax\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c deleted file mode 100644 index 3b9a02e6e59..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vmaxq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vmax\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c deleted file mode 100644 index 1543c942240..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vmaxq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vmax\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c deleted file mode 100644 index c9edda1c890..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vmax_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vmax\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c deleted file mode 100644 index cb262e93017..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vmax_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vmax\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c deleted file mode 100644 index 0078e3ef140..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vmax_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vmax\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c deleted file mode 100644 index b60efd2d172..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vmax_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vmax\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c deleted file mode 100644 index 0c31be4ebd1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vmax_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmax\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c deleted file mode 100644 index 6ed09a8bd4a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vmax_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmax\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c deleted file mode 100644 index 4041d8753a7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmaxu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmaxu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vmax_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmax\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQf32.c b/gcc/testsuite/gcc.target/arm/neon/vminQf32.c deleted file mode 100644 index a8138931bae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vminq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vmin\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs16.c b/gcc/testsuite/gcc.target/arm/neon/vminQs16.c deleted file mode 100644 index 56b3dfa1c49..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vminq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vmin\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs32.c b/gcc/testsuite/gcc.target/arm/neon/vminQs32.c deleted file mode 100644 index 6a4b9ff3646..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vminq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vmin\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs8.c b/gcc/testsuite/gcc.target/arm/neon/vminQs8.c deleted file mode 100644 index aa4269c51a2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vminq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vmin\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu16.c b/gcc/testsuite/gcc.target/arm/neon/vminQu16.c deleted file mode 100644 index 81c4578f83d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vminq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vmin\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu32.c b/gcc/testsuite/gcc.target/arm/neon/vminQu32.c deleted file mode 100644 index 7bd31afd5e7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vminq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vmin\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu8.c b/gcc/testsuite/gcc.target/arm/neon/vminQu8.c deleted file mode 100644 index aeb5d44e702..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vminq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vmin\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminf32.c b/gcc/testsuite/gcc.target/arm/neon/vminf32.c deleted file mode 100644 index ded40aa8b54..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vmin_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vmin\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins16.c b/gcc/testsuite/gcc.target/arm/neon/vmins16.c deleted file mode 100644 index 0cc84017398..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmins16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmins16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmins16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vmin_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vmin\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins32.c b/gcc/testsuite/gcc.target/arm/neon/vmins32.c deleted file mode 100644 index c8f86afda36..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmins32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmins32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmins32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vmin_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vmin\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins8.c b/gcc/testsuite/gcc.target/arm/neon/vmins8.c deleted file mode 100644 index 6ed9d82b4a0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmins8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmins8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmins8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vmin_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vmin\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu16.c b/gcc/testsuite/gcc.target/arm/neon/vminu16.c deleted file mode 100644 index f97165882be..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vmin_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmin\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu32.c b/gcc/testsuite/gcc.target/arm/neon/vminu32.c deleted file mode 100644 index a1c84552965..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vmin_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmin\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu8.c b/gcc/testsuite/gcc.target/arm/neon/vminu8.c deleted file mode 100644 index b810e860319..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vminu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vminu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vminu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vmin_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmin\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c deleted file mode 100644 index ba2b0ebebbd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_lanef32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - float32x2_t arg2_float32x2_t; - - out_float32x4_t = vmlaq_lane_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c deleted file mode 100644 index 81b14d286f0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_lanes16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - int16x4_t arg2_int16x4_t; - - out_int16x8_t = vmlaq_lane_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c deleted file mode 100644 index f1373c713e5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_lanes32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - int32x2_t arg2_int32x2_t; - - out_int32x4_t = vmlaq_lane_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c deleted file mode 100644 index b8ec20a07f3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_laneu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - uint16x4_t arg2_uint16x4_t; - - out_uint16x8_t = vmlaq_lane_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c deleted file mode 100644 index 03f9465c7ee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_laneu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - uint32x2_t arg2_uint32x2_t; - - out_uint32x4_t = vmlaq_lane_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c deleted file mode 100644 index 0fa53da254e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_nf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - float32_t arg2_float32_t; - - out_float32x4_t = vmlaq_n_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32_t); -} - -/* { dg-final { scan-assembler "vmla\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c deleted file mode 100644 index da3ae943125..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - int16_t arg2_int16_t; - - out_int16x8_t = vmlaq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16_t); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c deleted file mode 100644 index 1f206f22d37..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - int32_t arg2_int32_t; - - out_int32x4_t = vmlaq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32_t); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c deleted file mode 100644 index 4f8da8333cf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - uint16_t arg2_uint16_t; - - out_uint16x8_t = vmlaq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16_t); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c deleted file mode 100644 index 0af4c20903f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - uint32_t arg2_uint32_t; - - out_uint32x4_t = vmlaq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32_t); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c deleted file mode 100644 index 2c4a6e7eb0b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - float32x4_t arg2_float32x4_t; - - out_float32x4_t = vmlaq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t); -} - -/* { dg-final { scan-assembler "vmla\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c deleted file mode 100644 index b28d1cac89d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - int16x8_t arg2_int16x8_t; - - out_int16x8_t = vmlaq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c deleted file mode 100644 index 9c025734e02..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - int32x4_t arg2_int32x4_t; - - out_int32x4_t = vmlaq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c deleted file mode 100644 index 6a2deca3a18..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - int8x16_t arg2_int8x16_t; - - out_int8x16_t = vmlaq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t); -} - -/* { dg-final { scan-assembler "vmla\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c deleted file mode 100644 index 7f795f66649..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - uint16x8_t arg2_uint16x8_t; - - out_uint16x8_t = vmlaq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c deleted file mode 100644 index e9765266cdd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - uint32x4_t arg2_uint32x4_t; - - out_uint32x4_t = vmlaq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c deleted file mode 100644 index ebfcd7f81cb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - uint8x16_t arg2_uint8x16_t; - - out_uint8x16_t = vmlaq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t); -} - -/* { dg-final { scan-assembler "vmla\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c deleted file mode 100644 index a58bb7072be..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_lanef32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - float32x2_t arg2_float32x2_t; - - out_float32x2_t = vmla_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c deleted file mode 100644 index 0a98e6440f2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_lanes16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int16x4_t = vmla_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c deleted file mode 100644 index 7ce690c1316..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_lanes32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int32x2_t = vmla_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c deleted file mode 100644 index c44e70f765f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_laneu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint16x4_t = vmla_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c deleted file mode 100644 index 20f637f6de9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_laneu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint32x2_t = vmla_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c deleted file mode 100644 index 7c88491bcba..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_nf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - float32_t arg2_float32_t; - - out_float32x2_t = vmla_n_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32_t); -} - -/* { dg-final { scan-assembler "vmla\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c deleted file mode 100644 index 1e6681ecc3b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - int16_t arg2_int16_t; - - out_int16x4_t = vmla_n_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16_t); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c deleted file mode 100644 index fe443758245..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - int32_t arg2_int32_t; - - out_int32x2_t = vmla_n_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32_t); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c deleted file mode 100644 index c39c7b46b7e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - uint16_t arg2_uint16_t; - - out_uint16x4_t = vmla_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16_t); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c deleted file mode 100644 index b87366f78be..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmla_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmla_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - uint32_t arg2_uint32_t; - - out_uint32x2_t = vmla_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32_t); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c deleted file mode 100644 index 827d4db32c9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlaf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlaf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - float32x2_t arg2_float32x2_t; - - out_float32x2_t = vmla_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t); -} - -/* { dg-final { scan-assembler "vmla\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c deleted file mode 100644 index f4bbe55910c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlal_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlal_lanes16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vmlal_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmlal\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c deleted file mode 100644 index 24b581c9ffa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlal_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlal_lanes32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vmlal_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmlal\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c deleted file mode 100644 index ea828b0562b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlal_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlal_laneu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint32x4_t = vmlal_lane_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmlal\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c deleted file mode 100644 index 4641f9befb7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlal_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlal_laneu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint64x2_t = vmlal_lane_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmlal\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c deleted file mode 100644 index 96f1429417b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlal_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlal_ns16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16_t arg2_int16_t; - - out_int32x4_t = vmlal_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t); -} - -/* { dg-final { scan-assembler "vmlal\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c deleted file mode 100644 index 24f10163840..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlal_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlal_ns32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32_t arg2_int32_t; - - out_int64x2_t = vmlal_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t); -} - -/* { dg-final { scan-assembler "vmlal\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c deleted file mode 100644 index 54bbdea073a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlal_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlal_nu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - uint16_t arg2_uint16_t; - - out_uint32x4_t = vmlal_n_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16_t); -} - -/* { dg-final { scan-assembler "vmlal\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c deleted file mode 100644 index 02909bbaff0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlal_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlal_nu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - uint32_t arg2_uint32_t; - - out_uint64x2_t = vmlal_n_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32_t); -} - -/* { dg-final { scan-assembler "vmlal\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals16.c b/gcc/testsuite/gcc.target/arm/neon/vmlals16.c deleted file mode 100644 index 777078d06e0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlals16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlals16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlals16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vmlal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "vmlal\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals32.c b/gcc/testsuite/gcc.target/arm/neon/vmlals32.c deleted file mode 100644 index 65d964ea26a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlals32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlals32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlals32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vmlal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "vmlal\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals8.c b/gcc/testsuite/gcc.target/arm/neon/vmlals8.c deleted file mode 100644 index 806a44988e1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlals8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlals8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlals8 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int8x8_t arg1_int8x8_t; - int8x8_t arg2_int8x8_t; - - out_int16x8_t = vmlal_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vmlal\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c deleted file mode 100644 index a7cb797ef9b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlalu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlalu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint32x4_t = vmlal_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmlal\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c deleted file mode 100644 index bb71b9f77a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlalu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlalu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint64x2_t = vmlal_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmlal\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c deleted file mode 100644 index 0a191d88628..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlalu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlalu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint8x8_t arg1_uint8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_uint16x8_t = vmlal_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmlal\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas16.c b/gcc/testsuite/gcc.target/arm/neon/vmlas16.c deleted file mode 100644 index e36c5be2a14..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlas16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlas16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlas16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int16x4_t = vmla_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas32.c b/gcc/testsuite/gcc.target/arm/neon/vmlas32.c deleted file mode 100644 index c2d1fe6207e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlas32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlas32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlas32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int32x2_t = vmla_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas8.c b/gcc/testsuite/gcc.target/arm/neon/vmlas8.c deleted file mode 100644 index 9ec20016753..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlas8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlas8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlas8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - int8x8_t arg2_int8x8_t; - - out_int8x8_t = vmla_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vmla\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau16.c b/gcc/testsuite/gcc.target/arm/neon/vmlau16.c deleted file mode 100644 index 7f4bd11f25d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlau16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlau16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlau16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint16x4_t = vmla_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmla\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau32.c b/gcc/testsuite/gcc.target/arm/neon/vmlau32.c deleted file mode 100644 index 12e524f3983..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlau32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlau32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlau32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint32x2_t = vmla_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmla\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau8.c b/gcc/testsuite/gcc.target/arm/neon/vmlau8.c deleted file mode 100644 index f55e11b6a55..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlau8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlau8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlau8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_uint8x8_t = vmla_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmla\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c deleted file mode 100644 index 24a20cd9d4f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_lanef32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - float32x2_t arg2_float32x2_t; - - out_float32x4_t = vmlsq_lane_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c deleted file mode 100644 index feb4178c3b2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_lanes16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - int16x4_t arg2_int16x4_t; - - out_int16x8_t = vmlsq_lane_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c deleted file mode 100644 index eb15872bceb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_lanes32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - int32x2_t arg2_int32x2_t; - - out_int32x4_t = vmlsq_lane_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c deleted file mode 100644 index 8a432ef9bc7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_laneu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - uint16x4_t arg2_uint16x4_t; - - out_uint16x8_t = vmlsq_lane_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c deleted file mode 100644 index 2aa122fc66a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_laneu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - uint32x2_t arg2_uint32x2_t; - - out_uint32x4_t = vmlsq_lane_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c deleted file mode 100644 index 41244639bfd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_nf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - float32_t arg2_float32_t; - - out_float32x4_t = vmlsq_n_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32_t); -} - -/* { dg-final { scan-assembler "vmls\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c deleted file mode 100644 index 0c76e047c0c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - int16_t arg2_int16_t; - - out_int16x8_t = vmlsq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16_t); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c deleted file mode 100644 index 62d13ca0b17..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - int32_t arg2_int32_t; - - out_int32x4_t = vmlsq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32_t); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c deleted file mode 100644 index cf31a92be28..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - uint16_t arg2_uint16_t; - - out_uint16x8_t = vmlsq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16_t); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c deleted file mode 100644 index 9788edc2c43..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - uint32_t arg2_uint32_t; - - out_uint32x4_t = vmlsq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32_t); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c deleted file mode 100644 index db405aba65e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - float32x4_t arg2_float32x4_t; - - out_float32x4_t = vmlsq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t); -} - -/* { dg-final { scan-assembler "vmls\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c deleted file mode 100644 index 5830224810a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - int16x8_t arg2_int16x8_t; - - out_int16x8_t = vmlsq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c deleted file mode 100644 index a331c399170..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - int32x4_t arg2_int32x4_t; - - out_int32x4_t = vmlsq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c deleted file mode 100644 index ab6844f52da..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - int8x16_t arg2_int8x16_t; - - out_int8x16_t = vmlsq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t); -} - -/* { dg-final { scan-assembler "vmls\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c deleted file mode 100644 index f7c160e87a7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - uint16x8_t arg2_uint16x8_t; - - out_uint16x8_t = vmlsq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c deleted file mode 100644 index 37b0bc7b031..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - uint32x4_t arg2_uint32x4_t; - - out_uint32x4_t = vmlsq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c deleted file mode 100644 index ea4b5fa30f4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - uint8x16_t arg2_uint8x16_t; - - out_uint8x16_t = vmlsq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t); -} - -/* { dg-final { scan-assembler "vmls\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c deleted file mode 100644 index 9b1d38acc8a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_lanef32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - float32x2_t arg2_float32x2_t; - - out_float32x2_t = vmls_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c deleted file mode 100644 index 312d6ab4c08..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_lanes16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int16x4_t = vmls_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c deleted file mode 100644 index 21645d3202f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_lanes32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int32x2_t = vmls_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c deleted file mode 100644 index 8f78c0dee6c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_laneu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint16x4_t = vmls_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c deleted file mode 100644 index c947edd3b52..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_laneu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint32x2_t = vmls_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c deleted file mode 100644 index b99b4975eff..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_nf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - float32_t arg2_float32_t; - - out_float32x2_t = vmls_n_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32_t); -} - -/* { dg-final { scan-assembler "vmls\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c deleted file mode 100644 index 97dda122307..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - int16_t arg2_int16_t; - - out_int16x4_t = vmls_n_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16_t); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c deleted file mode 100644 index d0cd7f464b1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - int32_t arg2_int32_t; - - out_int32x2_t = vmls_n_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32_t); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c deleted file mode 100644 index bee00e37764..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - uint16_t arg2_uint16_t; - - out_uint16x4_t = vmls_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16_t); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c deleted file mode 100644 index 94d6c0448d4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmls_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmls_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - uint32_t arg2_uint32_t; - - out_uint32x2_t = vmls_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32_t); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c deleted file mode 100644 index 49652319294..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - float32x2_t arg2_float32x2_t; - - out_float32x2_t = vmls_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t); -} - -/* { dg-final { scan-assembler "vmls\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c deleted file mode 100644 index fb065e8e5ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsl_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsl_lanes16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vmlsl_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmlsl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c deleted file mode 100644 index e89cd117c2f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsl_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsl_lanes32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vmlsl_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmlsl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c deleted file mode 100644 index c22f00bf9c5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsl_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsl_laneu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint32x4_t = vmlsl_lane_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmlsl\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c deleted file mode 100644 index 1bb52ab5e96..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsl_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsl_laneu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint64x2_t = vmlsl_lane_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmlsl\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c deleted file mode 100644 index 65644f21f2a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsl_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsl_ns16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16_t arg2_int16_t; - - out_int32x4_t = vmlsl_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t); -} - -/* { dg-final { scan-assembler "vmlsl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c deleted file mode 100644 index 42688624e1d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsl_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsl_ns32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32_t arg2_int32_t; - - out_int64x2_t = vmlsl_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t); -} - -/* { dg-final { scan-assembler "vmlsl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c deleted file mode 100644 index 841ab448370..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsl_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsl_nu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - uint16_t arg2_uint16_t; - - out_uint32x4_t = vmlsl_n_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16_t); -} - -/* { dg-final { scan-assembler "vmlsl\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c deleted file mode 100644 index 2595b7186a2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsl_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsl_nu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - uint32_t arg2_uint32_t; - - out_uint64x2_t = vmlsl_n_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32_t); -} - -/* { dg-final { scan-assembler "vmlsl\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c deleted file mode 100644 index cec5695d5ed..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsls16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vmlsl_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "vmlsl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c deleted file mode 100644 index f5fe87a0535..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsls32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vmlsl_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "vmlsl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c deleted file mode 100644 index 39754dfd65a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsls8 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int8x8_t arg1_int8x8_t; - int8x8_t arg2_int8x8_t; - - out_int16x8_t = vmlsl_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vmlsl\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c deleted file mode 100644 index e5bebde8588..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlslu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlslu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint32x4_t = vmlsl_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmlsl\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c deleted file mode 100644 index 90f342d8e58..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlslu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlslu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint64x2_t = vmlsl_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmlsl\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c deleted file mode 100644 index 08a8e17e40a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlslu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlslu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint8x8_t arg1_uint8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_uint16x8_t = vmlsl_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmlsl\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss16.c b/gcc/testsuite/gcc.target/arm/neon/vmlss16.c deleted file mode 100644 index f2e3c3e4335..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlss16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlss16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlss16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int16x4_t = vmls_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss32.c b/gcc/testsuite/gcc.target/arm/neon/vmlss32.c deleted file mode 100644 index 49f0a4e553c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlss32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlss32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlss32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int32x2_t = vmls_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss8.c b/gcc/testsuite/gcc.target/arm/neon/vmlss8.c deleted file mode 100644 index 049d046160c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlss8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlss8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlss8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - int8x8_t arg2_int8x8_t; - - out_int8x8_t = vmls_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vmls\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c deleted file mode 100644 index e8ff81668f0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - uint16x4_t arg2_uint16x4_t; - - out_uint16x4_t = vmls_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmls\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c deleted file mode 100644 index 31b24b22f76..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - uint32x2_t arg2_uint32x2_t; - - out_uint32x2_t = vmls_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmls\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c deleted file mode 100644 index 2221aa20168..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vmlsu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmlsu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_uint8x8_t = vmls_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmls\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c deleted file mode 100644 index bc72ec491a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_nf32 (void) -{ - float32x4_t out_float32x4_t; - float32_t arg0_float32_t; - - out_float32x4_t = vmovq_n_f32 (arg0_float32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c deleted file mode 100644 index 13566e5ec4d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_np16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_np16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16_t arg0_poly16_t; - - out_poly16x8_t = vmovq_n_p16 (arg0_poly16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c deleted file mode 100644 index eacd0aeeee8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_np8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_np8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8_t arg0_poly8_t; - - out_poly8x16_t = vmovq_n_p8 (arg0_poly8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c deleted file mode 100644 index 2a214391de4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16_t arg0_int16_t; - - out_int16x8_t = vmovq_n_s16 (arg0_int16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c deleted file mode 100644 index ede6b1507e4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32_t arg0_int32_t; - - out_int32x4_t = vmovq_n_s32 (arg0_int32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c deleted file mode 100644 index 8cfd2d1b001..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vmovQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64_t arg0_int64_t; - - out_int64x2_t = vmovq_n_s64 (arg0_int64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c deleted file mode 100644 index 1fb2af86864..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8_t arg0_int8_t; - - out_int8x16_t = vmovq_n_s8 (arg0_int8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c deleted file mode 100644 index 0e339459340..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16_t arg0_uint16_t; - - out_uint16x8_t = vmovq_n_u16 (arg0_uint16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c deleted file mode 100644 index fe7bef183c5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32_t arg0_uint32_t; - - out_uint32x4_t = vmovq_n_u32 (arg0_uint32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c deleted file mode 100644 index 6092b324385..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vmovQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64_t arg0_uint64_t; - - out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c deleted file mode 100644 index ce2f2991028..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8_t arg0_uint8_t; - - out_uint8x16_t = vmovq_n_u8 (arg0_uint8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c deleted file mode 100644 index 3b3368c0724..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_nf32 (void) -{ - float32x2_t out_float32x2_t; - float32_t arg0_float32_t; - - out_float32x2_t = vmov_n_f32 (arg0_float32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c deleted file mode 100644 index 1a3ae252479..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_np16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_np16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16_t arg0_poly16_t; - - out_poly16x4_t = vmov_n_p16 (arg0_poly16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c deleted file mode 100644 index 8d4347b9ccb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_np8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_np8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8_t arg0_poly8_t; - - out_poly8x8_t = vmov_n_p8 (arg0_poly8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c deleted file mode 100644 index b0e1b09ee6d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16_t arg0_int16_t; - - out_int16x4_t = vmov_n_s16 (arg0_int16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c deleted file mode 100644 index cb1ae8746dd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32_t arg0_int32_t; - - out_int32x2_t = vmov_n_s32 (arg0_int32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c deleted file mode 100644 index 2a11d2dbd77..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vmov_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64_t arg0_int64_t; - - out_int64x1_t = vmov_n_s64 (arg0_int64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c deleted file mode 100644 index c825eb126b1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8_t arg0_int8_t; - - out_int8x8_t = vmov_n_s8 (arg0_int8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c deleted file mode 100644 index f17f837bfb7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16_t arg0_uint16_t; - - out_uint16x4_t = vmov_n_u16 (arg0_uint16_t); -} - -/* { dg-final { scan-assembler "vdup\.16\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c deleted file mode 100644 index 80f948f7450..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32_t arg0_uint32_t; - - out_uint32x2_t = vmov_n_u32 (arg0_uint32_t); -} - -/* { dg-final { scan-assembler "vdup\.32\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c deleted file mode 100644 index d9b9e601e69..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vmov_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64_t arg0_uint64_t; - - out_uint64x1_t = vmov_n_u64 (arg0_uint64_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c deleted file mode 100644 index d3e3780a711..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmov_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmov_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8_t arg0_uint8_t; - - out_uint8x8_t = vmov_n_u8 (arg0_uint8_t); -} - -/* { dg-final { scan-assembler "vdup\.8\[ \]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls16.c b/gcc/testsuite/gcc.target/arm/neon/vmovls16.c deleted file mode 100644 index a9de06b122b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovls16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovls16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - - out_int32x4_t = vmovl_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vmovl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls32.c b/gcc/testsuite/gcc.target/arm/neon/vmovls32.c deleted file mode 100644 index cf9572edb12..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovls32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovls32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - - out_int64x2_t = vmovl_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vmovl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls8.c b/gcc/testsuite/gcc.target/arm/neon/vmovls8.c deleted file mode 100644 index 156a81d9514..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovls8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovls8 (void) -{ - int16x8_t out_int16x8_t; - int8x8_t arg0_int8x8_t; - - out_int16x8_t = vmovl_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vmovl\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c deleted file mode 100644 index d19e416dc15..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovlu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovlu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint32x4_t = vmovl_u16 (arg0_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmovl\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c deleted file mode 100644 index decb3a2b0f4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovlu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovlu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint64x2_t = vmovl_u32 (arg0_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmovl\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c deleted file mode 100644 index 7623ad6b6f4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovlu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovlu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint16x8_t = vmovl_u8 (arg0_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmovl\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns16.c b/gcc/testsuite/gcc.target/arm/neon/vmovns16.c deleted file mode 100644 index 91a30d1b6c3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - - out_int8x8_t = vmovn_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vmovn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns32.c b/gcc/testsuite/gcc.target/arm/neon/vmovns32.c deleted file mode 100644 index 66c5f87c88d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - - out_int16x4_t = vmovn_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vmovn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns64.c b/gcc/testsuite/gcc.target/arm/neon/vmovns64.c deleted file mode 100644 index 03e10ec2ba8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - - out_int32x2_t = vmovn_s64 (arg0_int64x2_t); -} - -/* { dg-final { scan-assembler "vmovn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c deleted file mode 100644 index c391e884eb6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovnu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovnu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint8x8_t = vmovn_u16 (arg0_uint16x8_t); -} - -/* { dg-final { scan-assembler "vmovn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c deleted file mode 100644 index f0105da6558..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovnu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovnu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint16x4_t = vmovn_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vmovn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c deleted file mode 100644 index 9809feccbb4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmovnu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmovnu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint32x2_t = vmovn_u64 (arg0_uint64x2_t); -} - -/* { dg-final { scan-assembler "vmovn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c deleted file mode 100644 index 1cc15bf9341..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_lanef32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x2_t arg1_float32x2_t; - - out_float32x4_t = vmulq_lane_f32 (arg0_float32x4_t, arg1_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c deleted file mode 100644 index a78b272e803..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_lanes16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x4_t arg1_int16x4_t; - - out_int16x8_t = vmulq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c deleted file mode 100644 index 7b953cb57f7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_lanes32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x2_t arg1_int32x2_t; - - out_int32x4_t = vmulq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c deleted file mode 100644 index 4b9a0504030..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_laneu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x8_t = vmulq_lane_u16 (arg0_uint16x8_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c deleted file mode 100644 index f1ff8d1df21..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_laneu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x4_t = vmulq_lane_u32 (arg0_uint32x4_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c deleted file mode 100644 index f55bb7da986..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_nf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32_t arg1_float32_t; - - out_float32x4_t = vmulq_n_f32 (arg0_float32x4_t, arg1_float32_t); -} - -/* { dg-final { scan-assembler "vmul\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c deleted file mode 100644 index e98e23c93dd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16_t arg1_int16_t; - - out_int16x8_t = vmulq_n_s16 (arg0_int16x8_t, arg1_int16_t); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c deleted file mode 100644 index 0c5d582041e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32_t arg1_int32_t; - - out_int32x4_t = vmulq_n_s32 (arg0_int32x4_t, arg1_int32_t); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c deleted file mode 100644 index 3ee2feeac74..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16_t arg1_uint16_t; - - out_uint16x8_t = vmulq_n_u16 (arg0_uint16x8_t, arg1_uint16_t); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c deleted file mode 100644 index fb60d596c15..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32_t arg1_uint32_t; - - out_uint32x4_t = vmulq_n_u32 (arg0_uint32x4_t, arg1_uint32_t); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c deleted file mode 100644 index f23e081f05c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vmulq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vmul\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c deleted file mode 100644 index 104f2969b4b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQp8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16_t = vmulq_p8 (arg0_poly8x16_t, arg1_poly8x16_t); -} - -/* { dg-final { scan-assembler "vmul\.p8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c deleted file mode 100644 index 9c8c42fb5e2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vmulq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c deleted file mode 100644 index c775f2f8a70..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vmulq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c deleted file mode 100644 index bc9ff895d97..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vmulq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vmul\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c deleted file mode 100644 index 02df7228f8d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vmulq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c deleted file mode 100644 index 003fcf0a5ed..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vmulq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c deleted file mode 100644 index cf6f980ebe9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vmulq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vmul\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c deleted file mode 100644 index 8270c62d6c1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_lanef32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vmul_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c deleted file mode 100644 index 676bd96803c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_lanes16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vmul_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c deleted file mode 100644 index dd16c2186af..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_lanes32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vmul_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c deleted file mode 100644 index 79a1c75feb2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_laneu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vmul_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c deleted file mode 100644 index cd27886c03b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_laneu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vmul_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c deleted file mode 100644 index bd60e74a2d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_nf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_nf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32_t arg1_float32_t; - - out_float32x2_t = vmul_n_f32 (arg0_float32x2_t, arg1_float32_t); -} - -/* { dg-final { scan-assembler "vmul\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c deleted file mode 100644 index eb0c768d7de..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16_t arg1_int16_t; - - out_int16x4_t = vmul_n_s16 (arg0_int16x4_t, arg1_int16_t); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c deleted file mode 100644 index ba74d4e1b76..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32_t arg1_int32_t; - - out_int32x2_t = vmul_n_s32 (arg0_int32x2_t, arg1_int32_t); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c deleted file mode 100644 index 4048ff53987..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16_t arg1_uint16_t; - - out_uint16x4_t = vmul_n_u16 (arg0_uint16x4_t, arg1_uint16_t); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c deleted file mode 100644 index 58f7e956c4d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmul_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmul_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32_t arg1_uint32_t; - - out_uint32x2_t = vmul_n_u32 (arg0_uint32x2_t, arg1_uint32_t); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulf32.c deleted file mode 100644 index 14a7ad4bc6f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vmul_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vmul\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c deleted file mode 100644 index 8a58638ead9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmull_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmull_lanes16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vmull_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmull\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c deleted file mode 100644 index 6f19bd9bcc0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmull_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmull_lanes32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vmull_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmull\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c deleted file mode 100644 index 97a723b12fa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmull_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmull_laneu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint32x4_t = vmull_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmull\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c deleted file mode 100644 index c70fdd849de..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmull_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmull_laneu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint64x2_t = vmull_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmull\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c deleted file mode 100644 index 7ee4335a61a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmull_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmull_ns16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16_t arg1_int16_t; - - out_int32x4_t = vmull_n_s16 (arg0_int16x4_t, arg1_int16_t); -} - -/* { dg-final { scan-assembler "vmull\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c deleted file mode 100644 index 7a7673cc996..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmull_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmull_ns32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32_t arg1_int32_t; - - out_int64x2_t = vmull_n_s32 (arg0_int32x2_t, arg1_int32_t); -} - -/* { dg-final { scan-assembler "vmull\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c deleted file mode 100644 index 8e4f3f9881e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmull_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmull_nu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x4_t arg0_uint16x4_t; - uint16_t arg1_uint16_t; - - out_uint32x4_t = vmull_n_u16 (arg0_uint16x4_t, arg1_uint16_t); -} - -/* { dg-final { scan-assembler "vmull\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c deleted file mode 100644 index 1af7c551327..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmull_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmull_nu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x2_t arg0_uint32x2_t; - uint32_t arg1_uint32_t; - - out_uint64x2_t = vmull_n_u32 (arg0_uint32x2_t, arg1_uint32_t); -} - -/* { dg-final { scan-assembler "vmull\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullp8.c b/gcc/testsuite/gcc.target/arm/neon/vmullp8.c deleted file mode 100644 index 7d160612fb8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmullp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmullp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmullp8 (void) -{ - poly16x8_t out_poly16x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly16x8_t = vmull_p8 (arg0_poly8x8_t, arg1_poly8x8_t); -} - -/* { dg-final { scan-assembler "vmull\.p8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls16.c b/gcc/testsuite/gcc.target/arm/neon/vmulls16.c deleted file mode 100644 index dcbcf26b96e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulls16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vmull_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vmull\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls32.c b/gcc/testsuite/gcc.target/arm/neon/vmulls32.c deleted file mode 100644 index 7b001493bdc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulls32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vmull_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vmull\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls8.c b/gcc/testsuite/gcc.target/arm/neon/vmulls8.c deleted file mode 100644 index 926549c5015..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulls8 (void) -{ - int16x8_t out_int16x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int16x8_t = vmull_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vmull\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu16.c b/gcc/testsuite/gcc.target/arm/neon/vmullu16.c deleted file mode 100644 index 08677927b37..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmullu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmullu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmullu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint32x4_t = vmull_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmull\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu32.c b/gcc/testsuite/gcc.target/arm/neon/vmullu32.c deleted file mode 100644 index e2ff1126b3a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmullu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmullu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmullu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint64x2_t = vmull_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmull\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu8.c b/gcc/testsuite/gcc.target/arm/neon/vmullu8.c deleted file mode 100644 index 1e893ab77bc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmullu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmullu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmullu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint16x8_t = vmull_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmull\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulp8.c b/gcc/testsuite/gcc.target/arm/neon/vmulp8.c deleted file mode 100644 index 3b7505abe4b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulp8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8_t = vmul_p8 (arg0_poly8x8_t, arg1_poly8x8_t); -} - -/* { dg-final { scan-assembler "vmul\.p8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls16.c b/gcc/testsuite/gcc.target/arm/neon/vmuls16.c deleted file mode 100644 index 9eea7a60113..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmuls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmuls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmuls16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vmul_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls32.c b/gcc/testsuite/gcc.target/arm/neon/vmuls32.c deleted file mode 100644 index fd53ac7b938..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmuls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmuls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmuls32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vmul_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls8.c b/gcc/testsuite/gcc.target/arm/neon/vmuls8.c deleted file mode 100644 index 4359a2024bd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmuls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmuls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmuls8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vmul_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vmul\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulu16.c deleted file mode 100644 index be192274892..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vmul_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmul\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulu32.c deleted file mode 100644 index 476b9eeb054..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vmul_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmul\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu8.c b/gcc/testsuite/gcc.target/arm/neon/vmulu8.c deleted file mode 100644 index 0252b8fd2c0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmulu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vmulu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmulu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vmul_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmul\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c deleted file mode 100644 index 11665978ffa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnQp8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - - out_poly8x16_t = vmvnq_p8 (arg0_poly8x16_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c deleted file mode 100644 index d8f5e1eb4ce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vmvnq_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c deleted file mode 100644 index f737af5ae41..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vmvnq_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c deleted file mode 100644 index 126c74db73a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vmvnq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c deleted file mode 100644 index a0cc6be20f6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x8_t = vmvnq_u16 (arg0_uint16x8_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c deleted file mode 100644 index 0c2881b22b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vmvnq_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c deleted file mode 100644 index d9730643eb9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vmvnq_u8 (arg0_uint8x16_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c deleted file mode 100644 index a1139960f17..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnp8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - - out_poly8x8_t = vmvn_p8 (arg0_poly8x8_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns16.c b/gcc/testsuite/gcc.target/arm/neon/vmvns16.c deleted file mode 100644 index c9399c97798..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vmvn_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns32.c b/gcc/testsuite/gcc.target/arm/neon/vmvns32.c deleted file mode 100644 index fe3e522acd4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vmvn_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns8.c b/gcc/testsuite/gcc.target/arm/neon/vmvns8.c deleted file mode 100644 index 3c394a3ccf3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vmvn_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c deleted file mode 100644 index 5b71863e778..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vmvn_u16 (arg0_uint16x4_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c deleted file mode 100644 index 58413f8923e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vmvn_u32 (arg0_uint32x2_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c deleted file mode 100644 index 44b2e8ca2d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vmvnu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vmvnu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vmvn_u8 (arg0_uint8x8_t); -} - -/* { dg-final { scan-assembler "vmvn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c b/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c deleted file mode 100644 index 66e6729b0e0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vnegQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vnegQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vnegq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vneg\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c deleted file mode 100644 index cddcab6007a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vnegQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vnegQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vnegq_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vneg\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c deleted file mode 100644 index 439bf1b6866..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vnegQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vnegQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vnegq_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vneg\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c deleted file mode 100644 index 95db560d82d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vnegQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vnegQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vnegq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vneg\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegf32.c b/gcc/testsuite/gcc.target/arm/neon/vnegf32.c deleted file mode 100644 index f2423dcb26f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vnegf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vnegf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vnegf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vneg_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vneg\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs16.c b/gcc/testsuite/gcc.target/arm/neon/vnegs16.c deleted file mode 100644 index 4c9bec22786..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vnegs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vnegs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vnegs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vneg_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vneg\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs32.c b/gcc/testsuite/gcc.target/arm/neon/vnegs32.c deleted file mode 100644 index 91f311afea6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vnegs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vnegs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vnegs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vneg_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vneg\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs8.c b/gcc/testsuite/gcc.target/arm/neon/vnegs8.c deleted file mode 100644 index 45a7a9e5960..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vnegs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vnegs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vnegs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vneg_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vneg\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs16.c b/gcc/testsuite/gcc.target/arm/neon/vornQs16.c deleted file mode 100644 index aad296607dc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int16x8_t out_int16x8_t; -int16x8_t arg0_int16x8_t; -int16x8_t arg1_int16x8_t; -void test_vornQs16 (void) -{ - - out_int16x8_t = vornq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs32.c b/gcc/testsuite/gcc.target/arm/neon/vornQs32.c deleted file mode 100644 index 61e22a95971..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int32x4_t out_int32x4_t; -int32x4_t arg0_int32x4_t; -int32x4_t arg1_int32x4_t; -void test_vornQs32 (void) -{ - - out_int32x4_t = vornq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs64.c b/gcc/testsuite/gcc.target/arm/neon/vornQs64.c deleted file mode 100644 index 0d5d62dd528..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int64x2_t out_int64x2_t; -int64x2_t arg0_int64x2_t; -int64x2_t arg1_int64x2_t; -void test_vornQs64 (void) -{ - - out_int64x2_t = vornq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs8.c b/gcc/testsuite/gcc.target/arm/neon/vornQs8.c deleted file mode 100644 index e68f760d36b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int8x16_t out_int8x16_t; -int8x16_t arg0_int8x16_t; -int8x16_t arg1_int8x16_t; -void test_vornQs8 (void) -{ - - out_int8x16_t = vornq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu16.c b/gcc/testsuite/gcc.target/arm/neon/vornQu16.c deleted file mode 100644 index fe52b81ff40..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint16x8_t out_uint16x8_t; -uint16x8_t arg0_uint16x8_t; -uint16x8_t arg1_uint16x8_t; -void test_vornQu16 (void) -{ - - out_uint16x8_t = vornq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu32.c b/gcc/testsuite/gcc.target/arm/neon/vornQu32.c deleted file mode 100644 index f311b77340f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint32x4_t out_uint32x4_t; -uint32x4_t arg0_uint32x4_t; -uint32x4_t arg1_uint32x4_t; -void test_vornQu32 (void) -{ - - out_uint32x4_t = vornq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu64.c b/gcc/testsuite/gcc.target/arm/neon/vornQu64.c deleted file mode 100644 index f5bfdacfa2c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint64x2_t out_uint64x2_t; -uint64x2_t arg0_uint64x2_t; -uint64x2_t arg1_uint64x2_t; -void test_vornQu64 (void) -{ - - out_uint64x2_t = vornq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu8.c b/gcc/testsuite/gcc.target/arm/neon/vornQu8.c deleted file mode 100644 index cb318c56e8d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint8x16_t out_uint8x16_t; -uint8x16_t arg0_uint8x16_t; -uint8x16_t arg1_uint8x16_t; -void test_vornQu8 (void) -{ - - out_uint8x16_t = vornq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns16.c b/gcc/testsuite/gcc.target/arm/neon/vorns16.c deleted file mode 100644 index a47fcf426b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int16x4_t out_int16x4_t; -int16x4_t arg0_int16x4_t; -int16x4_t arg1_int16x4_t; -void test_vorns16 (void) -{ - - out_int16x4_t = vorn_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns32.c b/gcc/testsuite/gcc.target/arm/neon/vorns32.c deleted file mode 100644 index dd86cab348b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int32x2_t out_int32x2_t; -int32x2_t arg0_int32x2_t; -int32x2_t arg1_int32x2_t; -void test_vorns32 (void) -{ - - out_int32x2_t = vorn_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns64.c b/gcc/testsuite/gcc.target/arm/neon/vorns64.c deleted file mode 100644 index 0419574946c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vorns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int64x1_t out_int64x1_t; -int64x1_t arg0_int64x1_t; -int64x1_t arg1_int64x1_t; -void test_vorns64 (void) -{ - - out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns8.c b/gcc/testsuite/gcc.target/arm/neon/vorns8.c deleted file mode 100644 index 76fd7e6afc7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -int8x8_t out_int8x8_t; -int8x8_t arg0_int8x8_t; -int8x8_t arg1_int8x8_t; -void test_vorns8 (void) -{ - - out_int8x8_t = vorn_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu16.c b/gcc/testsuite/gcc.target/arm/neon/vornu16.c deleted file mode 100644 index a3a33ad0736..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint16x4_t out_uint16x4_t; -uint16x4_t arg0_uint16x4_t; -uint16x4_t arg1_uint16x4_t; -void test_vornu16 (void) -{ - - out_uint16x4_t = vorn_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu32.c b/gcc/testsuite/gcc.target/arm/neon/vornu32.c deleted file mode 100644 index 649b26c28d1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint32x2_t out_uint32x2_t; -uint32x2_t arg0_uint32x2_t; -uint32x2_t arg1_uint32x2_t; -void test_vornu32 (void) -{ - - out_uint32x2_t = vorn_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu64.c b/gcc/testsuite/gcc.target/arm/neon/vornu64.c deleted file mode 100644 index 9bf3936b146..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vornu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint64x1_t out_uint64x1_t; -uint64x1_t arg0_uint64x1_t; -uint64x1_t arg1_uint64x1_t; -void test_vornu64 (void) -{ - - out_uint64x1_t = vorn_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu8.c b/gcc/testsuite/gcc.target/arm/neon/vornu8.c deleted file mode 100644 index 6a04641ee95..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vornu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vornu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O2" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -uint8x8_t out_uint8x8_t; -uint8x8_t arg0_uint8x8_t; -uint8x8_t arg1_uint8x8_t; -void test_vornu8 (void) -{ - - out_uint8x8_t = vorn_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vorn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c deleted file mode 100644 index b7318d5d780..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vorrq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c deleted file mode 100644 index 3b0ffb79f31..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vorrq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c deleted file mode 100644 index e0fde9e3307..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vorrq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c deleted file mode 100644 index bd1e41120ff..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vorrq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c deleted file mode 100644 index 7df1c163b46..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vorrq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c deleted file mode 100644 index 1846888e211..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vorrq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c deleted file mode 100644 index a3b68973d03..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vorrq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c deleted file mode 100644 index 43850cc515e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vorrq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs16.c b/gcc/testsuite/gcc.target/arm/neon/vorrs16.c deleted file mode 100644 index 7b6ec0bfc31..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vorr_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs32.c b/gcc/testsuite/gcc.target/arm/neon/vorrs32.c deleted file mode 100644 index 42201599188..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vorr_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs64.c b/gcc/testsuite/gcc.target/arm/neon/vorrs64.c deleted file mode 100644 index 48237795c04..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrs64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vorrs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrs64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vorr_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs8.c b/gcc/testsuite/gcc.target/arm/neon/vorrs8.c deleted file mode 100644 index fc0c7b9d682..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorrs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorrs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorrs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vorr_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru16.c b/gcc/testsuite/gcc.target/arm/neon/vorru16.c deleted file mode 100644 index c9e4cba7afb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorru16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorru16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorru16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vorr_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru32.c b/gcc/testsuite/gcc.target/arm/neon/vorru32.c deleted file mode 100644 index 8683e217911..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorru32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorru32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorru32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vorr_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru64.c b/gcc/testsuite/gcc.target/arm/neon/vorru64.c deleted file mode 100644 index d04471338eb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorru64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vorru64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorru64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vorr_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru8.c b/gcc/testsuite/gcc.target/arm/neon/vorru8.c deleted file mode 100644 index 7422b5fa107..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vorru8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vorru8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vorru8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vorr_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vorr\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c deleted file mode 100644 index 2a69afc8dac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalQs16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x8_t arg1_int16x8_t; - - out_int32x4_t = vpadalq_s16 (arg0_int32x4_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vpadal\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c deleted file mode 100644 index 76d0b6e73c5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalQs32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x4_t arg1_int32x4_t; - - out_int64x2_t = vpadalq_s32 (arg0_int64x2_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vpadal\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c deleted file mode 100644 index 4d3bf1db902..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalQs8 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int8x16_t arg1_int8x16_t; - - out_int16x8_t = vpadalq_s8 (arg0_int16x8_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vpadal\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c deleted file mode 100644 index f7ef5366322..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalQu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x8_t arg1_uint16x8_t; - - out_uint32x4_t = vpadalq_u16 (arg0_uint32x4_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vpadal\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c deleted file mode 100644 index 2a0f8218330..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalQu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x4_t arg1_uint32x4_t; - - out_uint64x2_t = vpadalq_u32 (arg0_uint64x2_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vpadal\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c deleted file mode 100644 index d4c233b307b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalQu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint8x16_t arg1_uint8x16_t; - - out_uint16x8_t = vpadalq_u8 (arg0_uint16x8_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vpadal\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals16.c b/gcc/testsuite/gcc.target/arm/neon/vpadals16.c deleted file mode 100644 index d49c2ff8941..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadals16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadals16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadals16 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int16x4_t arg1_int16x4_t; - - out_int32x2_t = vpadal_s16 (arg0_int32x2_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vpadal\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals32.c b/gcc/testsuite/gcc.target/arm/neon/vpadals32.c deleted file mode 100644 index b79746e339d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadals32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadals32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadals32 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int32x2_t arg1_int32x2_t; - - out_int64x1_t = vpadal_s32 (arg0_int64x1_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vpadal\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals8.c b/gcc/testsuite/gcc.target/arm/neon/vpadals8.c deleted file mode 100644 index cfde84939b5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadals8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadals8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadals8 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int8x8_t arg1_int8x8_t; - - out_int16x4_t = vpadal_s8 (arg0_int16x4_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vpadal\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c deleted file mode 100644 index 4b1777dd8ed..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalu16 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint16x4_t arg1_uint16x4_t; - - out_uint32x2_t = vpadal_u16 (arg0_uint32x2_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vpadal\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c deleted file mode 100644 index 772f0cb3813..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalu32 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint32x2_t arg1_uint32x2_t; - - out_uint64x1_t = vpadal_u32 (arg0_uint64x1_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vpadal\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c deleted file mode 100644 index 700bf26305b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadalu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadalu8 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint8x8_t arg1_uint8x8_t; - - out_uint16x4_t = vpadal_u8 (arg0_uint16x4_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vpadal\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c deleted file mode 100644 index d6f78464808..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpaddf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vpadd_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vpadd\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c deleted file mode 100644 index f08fa8356f2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlQs16 (void) -{ - int32x4_t out_int32x4_t; - int16x8_t arg0_int16x8_t; - - out_int32x4_t = vpaddlq_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vpaddl\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c deleted file mode 100644 index 06305eb0184..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlQs32 (void) -{ - int64x2_t out_int64x2_t; - int32x4_t arg0_int32x4_t; - - out_int64x2_t = vpaddlq_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vpaddl\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c deleted file mode 100644 index ef17b07f342..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlQs8 (void) -{ - int16x8_t out_int16x8_t; - int8x16_t arg0_int8x16_t; - - out_int16x8_t = vpaddlq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vpaddl\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c deleted file mode 100644 index b301c91669e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlQu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x8_t arg0_uint16x8_t; - - out_uint32x4_t = vpaddlq_u16 (arg0_uint16x8_t); -} - -/* { dg-final { scan-assembler "vpaddl\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c deleted file mode 100644 index 77eaf83971f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlQu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x4_t arg0_uint32x4_t; - - out_uint64x2_t = vpaddlq_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vpaddl\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c deleted file mode 100644 index 06a99027a8e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlQu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint8x16_t arg0_uint8x16_t; - - out_uint16x8_t = vpaddlq_u8 (arg0_uint8x16_t); -} - -/* { dg-final { scan-assembler "vpaddl\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c deleted file mode 100644 index 28e0cfa2afe..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddls16 (void) -{ - int32x2_t out_int32x2_t; - int16x4_t arg0_int16x4_t; - - out_int32x2_t = vpaddl_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vpaddl\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c deleted file mode 100644 index 32de704f56e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddls32 (void) -{ - int64x1_t out_int64x1_t; - int32x2_t arg0_int32x2_t; - - out_int64x1_t = vpaddl_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vpaddl\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c deleted file mode 100644 index c31ce4d16a4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddls8 (void) -{ - int16x4_t out_int16x4_t; - int8x8_t arg0_int8x8_t; - - out_int16x4_t = vpaddl_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vpaddl\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c deleted file mode 100644 index 575b93e2b9d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlu16 (void) -{ - uint32x2_t out_uint32x2_t; - uint16x4_t arg0_uint16x4_t; - - out_uint32x2_t = vpaddl_u16 (arg0_uint16x4_t); -} - -/* { dg-final { scan-assembler "vpaddl\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c deleted file mode 100644 index 58f7b56cd20..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlu32 (void) -{ - uint64x1_t out_uint64x1_t; - uint32x2_t arg0_uint32x2_t; - - out_uint64x1_t = vpaddl_u32 (arg0_uint32x2_t); -} - -/* { dg-final { scan-assembler "vpaddl\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c deleted file mode 100644 index 458a4ecf692..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vpaddlu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddlu8 (void) -{ - uint16x4_t out_uint16x4_t; - uint8x8_t arg0_uint8x8_t; - - out_uint16x4_t = vpaddl_u8 (arg0_uint8x8_t); -} - -/* { dg-final { scan-assembler "vpaddl\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds16.c b/gcc/testsuite/gcc.target/arm/neon/vpadds16.c deleted file mode 100644 index 962f82796ce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadds16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadds16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadds16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vpadd_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vpadd\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds32.c b/gcc/testsuite/gcc.target/arm/neon/vpadds32.c deleted file mode 100644 index 983f67cd253..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadds32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadds32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadds32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vpadd_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vpadd\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds8.c b/gcc/testsuite/gcc.target/arm/neon/vpadds8.c deleted file mode 100644 index 4985bd1d3bc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpadds8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpadds8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpadds8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vpadd_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vpadd\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c deleted file mode 100644 index aa8942d7d43..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpaddu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vpadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vpadd\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c deleted file mode 100644 index 84b8573e821..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpaddu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vpadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vpadd\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c deleted file mode 100644 index c59f99e56eb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpaddu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpaddu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vpadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vpadd\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c deleted file mode 100644 index 4f329f06744..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmaxf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmaxf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vpmax_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vpmax\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c deleted file mode 100644 index 42c06c1d4f3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmaxs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmaxs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vpmax_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vpmax\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c deleted file mode 100644 index 3f8b31e1671..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmaxs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmaxs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vpmax_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vpmax\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c deleted file mode 100644 index 3162b496805..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmaxs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmaxs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vpmax_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vpmax\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c deleted file mode 100644 index 195a0ba524a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmaxu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmaxu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vpmax_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vpmax\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c deleted file mode 100644 index 263b9be27f6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmaxu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmaxu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vpmax_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vpmax\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c deleted file mode 100644 index ba4202ea82a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmaxu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmaxu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vpmax_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vpmax\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminf32.c b/gcc/testsuite/gcc.target/arm/neon/vpminf32.c deleted file mode 100644 index f754a16858b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpminf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpminf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpminf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vpmin_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vpmin\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins16.c b/gcc/testsuite/gcc.target/arm/neon/vpmins16.c deleted file mode 100644 index 14da69509c2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmins16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmins16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmins16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vpmin_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vpmin\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins32.c b/gcc/testsuite/gcc.target/arm/neon/vpmins32.c deleted file mode 100644 index 324c5246d0a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmins32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmins32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmins32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vpmin_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vpmin\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins8.c b/gcc/testsuite/gcc.target/arm/neon/vpmins8.c deleted file mode 100644 index f8fecafebb3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpmins8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpmins8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpmins8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vpmin_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vpmin\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu16.c b/gcc/testsuite/gcc.target/arm/neon/vpminu16.c deleted file mode 100644 index 06e18d193df..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpminu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpminu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpminu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vpmin_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vpmin\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu32.c b/gcc/testsuite/gcc.target/arm/neon/vpminu32.c deleted file mode 100644 index b256311ff6e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpminu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpminu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpminu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vpmin_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vpmin\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu8.c b/gcc/testsuite/gcc.target/arm/neon/vpminu8.c deleted file mode 100644 index 04a3afafcc9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vpminu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vpminu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vpminu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vpmin_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vpmin\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c deleted file mode 100644 index e4b3b2b3347..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulhQ_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulhQ_lanes16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x4_t arg1_int16x4_t; - - out_int16x8_t = vqrdmulhq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c deleted file mode 100644 index 9191d332d34..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulhQ_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulhQ_lanes32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x2_t arg1_int32x2_t; - - out_int32x4_t = vqrdmulhq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c deleted file mode 100644 index fb30e260fbc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulhQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulhQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16_t arg1_int16_t; - - out_int16x8_t = vqrdmulhq_n_s16 (arg0_int16x8_t, arg1_int16_t); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c deleted file mode 100644 index 827b323ee30..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulhQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulhQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32_t arg1_int32_t; - - out_int32x4_t = vqrdmulhq_n_s32 (arg0_int32x4_t, arg1_int32_t); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c deleted file mode 100644 index 30f71f01211..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulhQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulhQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vqrdmulhq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c deleted file mode 100644 index 467b0c9efd9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulhQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulhQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vqrdmulhq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c deleted file mode 100644 index 5b303ad1cc2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulh_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulh_lanes16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vqrdmulh_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c deleted file mode 100644 index 3e8149a3576..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulh_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulh_lanes32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vqrdmulh_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c deleted file mode 100644 index 1495e40e88b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulh_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulh_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16_t arg1_int16_t; - - out_int16x4_t = vqrdmulh_n_s16 (arg0_int16x4_t, arg1_int16_t); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c deleted file mode 100644 index 7ecd731092e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulh_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulh_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32_t arg1_int32_t; - - out_int32x2_t = vqrdmulh_n_s32 (arg0_int32x2_t, arg1_int32_t); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c deleted file mode 100644 index be260b45c47..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulhs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulhs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vqrdmulh_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c deleted file mode 100644 index 5b243538f4b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRdmulhs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRdmulhs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vqrdmulh_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqrdmulh\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c deleted file mode 100644 index 366269e3a58..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vqrshlq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vqrshl\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c deleted file mode 100644 index 084e760b657..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vqrshlq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vqrshl\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c deleted file mode 100644 index e74623f16d5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vqrshlq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vqrshl\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c deleted file mode 100644 index b347ab9de5d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vqrshlq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vqrshl\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c deleted file mode 100644 index 34c3c140404..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vqrshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vqrshl\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c deleted file mode 100644 index 7006ce02bc6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vqrshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vqrshl\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c deleted file mode 100644 index d3354021776..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - int64x2_t arg1_int64x2_t; - - out_uint64x2_t = vqrshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vqrshl\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c deleted file mode 100644 index 5252754efcb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vqrshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vqrshl\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c deleted file mode 100644 index 498c7883d79..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshls16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vqrshl_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqrshl\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c deleted file mode 100644 index b46fd76ca1c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshls32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vqrshl_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqrshl\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c deleted file mode 100644 index 844f2ed6d4f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshls64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshls64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vqrshl_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vqrshl\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c deleted file mode 100644 index c238d5bc46f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshls8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vqrshl_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vqrshl\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c deleted file mode 100644 index 24a296727d0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vqrshl_u16 (arg0_uint16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqrshl\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c deleted file mode 100644 index 10df112a135..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vqrshl_u32 (arg0_uint32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqrshl\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c deleted file mode 100644 index a0ef539ddde..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - int64x1_t arg1_int64x1_t; - - out_uint64x1_t = vqrshl_u64 (arg0_uint64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vqrshl\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c deleted file mode 100644 index b9fefe75e3b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqRshlu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshlu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vqrshl_u8 (arg0_uint8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vqrshl\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c deleted file mode 100644 index a6b9f882f38..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrn_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrn_ns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - - out_int8x8_t = vqrshrn_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrn\.s16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c deleted file mode 100644 index 30393e9fbac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrn_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrn_ns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - - out_int16x4_t = vqrshrn_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrn\.s32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c deleted file mode 100644 index 1ce5f77ca89..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrn_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrn_ns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - - out_int32x2_t = vqrshrn_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrn\.s64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c deleted file mode 100644 index d869ff91512..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrn_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrn_nu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint8x8_t = vqrshrn_n_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrn\.u16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c deleted file mode 100644 index 7281f7cb1a6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrn_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrn_nu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint16x4_t = vqrshrn_n_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrn\.u32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c deleted file mode 100644 index f7e69137ec8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrn_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrn_nu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint32x2_t = vqrshrn_n_u64 (arg0_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrn\.u64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c deleted file mode 100644 index f1355be5619..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrun_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrun_ns16 (void) -{ - uint8x8_t out_uint8x8_t; - int16x8_t arg0_int16x8_t; - - out_uint8x8_t = vqrshrun_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrun\.s16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c deleted file mode 100644 index 55991a4f501..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrun_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrun_ns32 (void) -{ - uint16x4_t out_uint16x4_t; - int32x4_t arg0_int32x4_t; - - out_uint16x4_t = vqrshrun_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrun\.s32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c deleted file mode 100644 index 80830ef20f6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqRshrun_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqRshrun_ns64 (void) -{ - uint32x2_t out_uint32x2_t; - int64x2_t arg0_int64x2_t; - - out_uint32x2_t = vqrshrun_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqrshrun\.s64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c deleted file mode 100644 index dbf857b955e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqabsQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqabsQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vqabsq_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vqabs\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c deleted file mode 100644 index ccad63a36ca..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqabsQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqabsQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vqabsq_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vqabs\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c deleted file mode 100644 index 128d93077da..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqabsQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqabsQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vqabsq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vqabs\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss16.c b/gcc/testsuite/gcc.target/arm/neon/vqabss16.c deleted file mode 100644 index 9f503f3fa0f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqabss16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqabss16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqabss16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vqabs_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vqabs\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss32.c b/gcc/testsuite/gcc.target/arm/neon/vqabss32.c deleted file mode 100644 index 4d80b1ed0e8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqabss32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqabss32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqabss32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vqabs_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vqabs\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss8.c b/gcc/testsuite/gcc.target/arm/neon/vqabss8.c deleted file mode 100644 index 28e45838eae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqabss8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqabss8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqabss8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vqabs_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vqabs\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c deleted file mode 100644 index d47b572a5f7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vqaddq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vqadd\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c deleted file mode 100644 index 5d86a1a4e08..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vqaddq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vqadd\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c deleted file mode 100644 index 39c11cf8962..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vqaddq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vqadd\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c deleted file mode 100644 index 494ba882432..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vqaddq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vqadd\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c deleted file mode 100644 index 5c99991b962..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vqaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vqadd\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c deleted file mode 100644 index 9e006a3ab7c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vqaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vqadd\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c deleted file mode 100644 index e52000a917c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vqaddq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vqadd\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c deleted file mode 100644 index b5878750c46..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vqaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vqadd\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds16.c b/gcc/testsuite/gcc.target/arm/neon/vqadds16.c deleted file mode 100644 index ddfbb2ebeb0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqadds16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqadds16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqadds16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vqadd_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqadd\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds32.c b/gcc/testsuite/gcc.target/arm/neon/vqadds32.c deleted file mode 100644 index 9155ca62478..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqadds32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqadds32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqadds32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vqadd_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqadd\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds64.c b/gcc/testsuite/gcc.target/arm/neon/vqadds64.c deleted file mode 100644 index 11121d8229c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqadds64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqadds64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqadds64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vqadd_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vqadd\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds8.c b/gcc/testsuite/gcc.target/arm/neon/vqadds8.c deleted file mode 100644 index dff10c7156c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqadds8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqadds8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqadds8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vqadd_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vqadd\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c deleted file mode 100644 index 5d140c0a3ed..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vqadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vqadd\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c deleted file mode 100644 index bd1678cf03d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vqadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vqadd\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c deleted file mode 100644 index 9d57f74b8d5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vqadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - -/* { dg-final { scan-assembler "vqadd\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c deleted file mode 100644 index abf7c9c6576..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqaddu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqaddu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vqadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vqadd\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c deleted file mode 100644 index a8fa44249e2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlal_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlal_lanes16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vqdmlal_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqdmlal\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c deleted file mode 100644 index d145a42070a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlal_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlal_lanes32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vqdmlal_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqdmlal\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c deleted file mode 100644 index ce9454936b8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlal_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlal_ns16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16_t arg2_int16_t; - - out_int32x4_t = vqdmlal_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t); -} - -/* { dg-final { scan-assembler "vqdmlal\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c deleted file mode 100644 index c9506290299..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlal_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlal_ns32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32_t arg2_int32_t; - - out_int64x2_t = vqdmlal_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t); -} - -/* { dg-final { scan-assembler "vqdmlal\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c deleted file mode 100644 index a55c391b9a5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlals16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlals16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vqdmlal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "vqdmlal\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c deleted file mode 100644 index e91ef3b220e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlals32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlals32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vqdmlal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "vqdmlal\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c deleted file mode 100644 index 362e63a72fc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlsl_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlsl_lanes16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vqdmlsl_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqdmlsl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c deleted file mode 100644 index 3d8700fcf98..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlsl_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlsl_lanes32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vqdmlsl_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqdmlsl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c deleted file mode 100644 index 39b54eeeb93..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlsl_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlsl_ns16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16_t arg2_int16_t; - - out_int32x4_t = vqdmlsl_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t); -} - -/* { dg-final { scan-assembler "vqdmlsl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c deleted file mode 100644 index 440c9e6dfc9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlsl_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlsl_ns32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32_t arg2_int32_t; - - out_int64x2_t = vqdmlsl_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t); -} - -/* { dg-final { scan-assembler "vqdmlsl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c deleted file mode 100644 index d4a9d378e48..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlsls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlsls16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - int16x4_t arg2_int16x4_t; - - out_int32x4_t = vqdmlsl_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t); -} - -/* { dg-final { scan-assembler "vqdmlsl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c deleted file mode 100644 index fb20e98aa1c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vqdmlsls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmlsls32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - int32x2_t arg2_int32x2_t; - - out_int64x2_t = vqdmlsl_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t); -} - -/* { dg-final { scan-assembler "vqdmlsl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c deleted file mode 100644 index 8067154f44d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulhQ_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulhQ_lanes16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x4_t arg1_int16x4_t; - - out_int16x8_t = vqdmulhq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqdmulh\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c deleted file mode 100644 index 41902bc6e25..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulhQ_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulhQ_lanes32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x2_t arg1_int32x2_t; - - out_int32x4_t = vqdmulhq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqdmulh\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c deleted file mode 100644 index fe0c768d3d1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulhQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulhQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16_t arg1_int16_t; - - out_int16x8_t = vqdmulhq_n_s16 (arg0_int16x8_t, arg1_int16_t); -} - -/* { dg-final { scan-assembler "vqdmulh\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c deleted file mode 100644 index 7070654f904..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulhQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulhQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32_t arg1_int32_t; - - out_int32x4_t = vqdmulhq_n_s32 (arg0_int32x4_t, arg1_int32_t); -} - -/* { dg-final { scan-assembler "vqdmulh\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c deleted file mode 100644 index ddc6b08d259..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulhQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulhQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vqdmulhq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vqdmulh\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c deleted file mode 100644 index 3ae8af193c7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulhQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulhQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vqdmulhq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vqdmulh\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c deleted file mode 100644 index 648515a32c5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulh_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulh_lanes16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vqdmulh_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqdmulh\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c deleted file mode 100644 index 075e85efa30..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulh_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulh_lanes32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vqdmulh_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqdmulh\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c deleted file mode 100644 index d33cc6eeb32..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulh_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulh_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16_t arg1_int16_t; - - out_int16x4_t = vqdmulh_n_s16 (arg0_int16x4_t, arg1_int16_t); -} - -/* { dg-final { scan-assembler "vqdmulh\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c deleted file mode 100644 index 4ff7e93a286..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulh_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulh_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32_t arg1_int32_t; - - out_int32x2_t = vqdmulh_n_s32 (arg0_int32x2_t, arg1_int32_t); -} - -/* { dg-final { scan-assembler "vqdmulh\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c deleted file mode 100644 index 57403bfdaec..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulhs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulhs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vqdmulh_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqdmulh\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c deleted file mode 100644 index 6ae9d34c737..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulhs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulhs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vqdmulh_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqdmulh\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c deleted file mode 100644 index 4257793fdae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmull_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmull_lanes16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vqdmull_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqdmull\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c deleted file mode 100644 index 874f890da31..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmull_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmull_lanes32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vqdmull_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqdmull\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c deleted file mode 100644 index aa60ce34461..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmull_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmull_ns16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16_t arg1_int16_t; - - out_int32x4_t = vqdmull_n_s16 (arg0_int16x4_t, arg1_int16_t); -} - -/* { dg-final { scan-assembler "vqdmull\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c deleted file mode 100644 index 7734d76ca4b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmull_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmull_ns32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32_t arg1_int32_t; - - out_int64x2_t = vqdmull_n_s32 (arg0_int32x2_t, arg1_int32_t); -} - -/* { dg-final { scan-assembler "vqdmull\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c deleted file mode 100644 index 876bc78907c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulls16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vqdmull_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqdmull\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c deleted file mode 100644 index ebc2062e935..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqdmulls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqdmulls32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vqdmull_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqdmull\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c deleted file mode 100644 index 56d1764743b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - - out_int8x8_t = vqmovn_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vqmovn\.s16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c deleted file mode 100644 index 086290c3dea..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - - out_int16x4_t = vqmovn_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vqmovn\.s32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c deleted file mode 100644 index 4f61c28baf0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - - out_int32x2_t = vqmovn_s64 (arg0_int64x2_t); -} - -/* { dg-final { scan-assembler "vqmovn\.s64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c deleted file mode 100644 index 294963cffc4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovnu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovnu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint8x8_t = vqmovn_u16 (arg0_uint16x8_t); -} - -/* { dg-final { scan-assembler "vqmovn\.u16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c deleted file mode 100644 index a580dd60df2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovnu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovnu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint16x4_t = vqmovn_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vqmovn\.u32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c deleted file mode 100644 index e07cd8830d3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovnu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovnu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint32x2_t = vqmovn_u64 (arg0_uint64x2_t); -} - -/* { dg-final { scan-assembler "vqmovn\.u64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c deleted file mode 100644 index 82fdc20e8b3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovuns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovuns16 (void) -{ - uint8x8_t out_uint8x8_t; - int16x8_t arg0_int16x8_t; - - out_uint8x8_t = vqmovun_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vqmovun\.s16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c deleted file mode 100644 index e56d890547a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovuns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovuns32 (void) -{ - uint16x4_t out_uint16x4_t; - int32x4_t arg0_int32x4_t; - - out_uint16x4_t = vqmovun_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vqmovun\.s32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c deleted file mode 100644 index 06ad7e13f15..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqmovuns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqmovuns64 (void) -{ - uint32x2_t out_uint32x2_t; - int64x2_t arg0_int64x2_t; - - out_uint32x2_t = vqmovun_s64 (arg0_int64x2_t); -} - -/* { dg-final { scan-assembler "vqmovun\.s64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c deleted file mode 100644 index 9a6c854b507..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqnegQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqnegQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vqnegq_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vqneg\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c deleted file mode 100644 index a93366f5487..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqnegQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqnegQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vqnegq_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vqneg\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c deleted file mode 100644 index c566b49d699..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqnegQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqnegQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vqnegq_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vqneg\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c deleted file mode 100644 index dbff5c0b4c2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqnegs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqnegs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vqneg_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vqneg\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c deleted file mode 100644 index 2000358ceee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqnegs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqnegs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vqneg_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vqneg\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c deleted file mode 100644 index beb3d552db3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqnegs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqnegs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vqneg_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vqneg\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c deleted file mode 100644 index 480ead65813..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vqshlq_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c deleted file mode 100644 index 1a0c61af2f3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vqshlq_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c deleted file mode 100644 index a6723cea300..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - - out_int64x2_t = vqshlq_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c deleted file mode 100644 index 676781775fa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vqshlq_n_s8 (arg0_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c deleted file mode 100644 index 565b965fdd4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x8_t = vqshlq_n_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c deleted file mode 100644 index 5d31d8c0119..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vqshlq_n_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c deleted file mode 100644 index 4d5f88dfa79..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint64x2_t = vqshlq_n_u64 (arg0_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c deleted file mode 100644 index 2dacefea3eb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vqshlq_n_u8 (arg0_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c deleted file mode 100644 index 78681977b3c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vqshlq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vqshl\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c deleted file mode 100644 index 6de5599ee6e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vqshlq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vqshl\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c deleted file mode 100644 index 395fd1a43b4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vqshlq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vqshl\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c deleted file mode 100644 index 58e2a51f0f1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vqshlq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vqshl\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c deleted file mode 100644 index 080ce27c952..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vqshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vqshl\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c deleted file mode 100644 index cc47ed5425b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vqshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vqshl\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c deleted file mode 100644 index 98cfb5596c5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - int64x2_t arg1_int64x2_t; - - out_uint64x2_t = vqshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vqshl\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c deleted file mode 100644 index 1ff3dfa07d0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vqshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vqshl\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c deleted file mode 100644 index 4aa57606dbd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshl_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshl_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vqshl_n_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c deleted file mode 100644 index f42085df06b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshl_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshl_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vqshl_n_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c deleted file mode 100644 index 45c9b61b9b9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshl_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshl_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - - out_int64x1_t = vqshl_n_s64 (arg0_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c deleted file mode 100644 index 2263fd60327..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshl_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshl_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vqshl_n_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c deleted file mode 100644 index 926c91d2d30..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshl_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshl_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vqshl_n_u16 (arg0_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c deleted file mode 100644 index 3a4342782d4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshl_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshl_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vqshl_n_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c deleted file mode 100644 index 992b15c8fbe..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshl_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshl_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - - out_uint64x1_t = vqshl_n_u64 (arg0_uint64x1_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c deleted file mode 100644 index e0cfa5e2336..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshl_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshl_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vqshl_n_u8 (arg0_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshl\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls16.c b/gcc/testsuite/gcc.target/arm/neon/vqshls16.c deleted file mode 100644 index bd412025ba4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshls16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vqshl_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqshl\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls32.c b/gcc/testsuite/gcc.target/arm/neon/vqshls32.c deleted file mode 100644 index 487f6039237..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshls32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vqshl_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqshl\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls64.c b/gcc/testsuite/gcc.target/arm/neon/vqshls64.c deleted file mode 100644 index 2d2ebaea18e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshls64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshls64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshls64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vqshl_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vqshl\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls8.c b/gcc/testsuite/gcc.target/arm/neon/vqshls8.c deleted file mode 100644 index f9df74e285b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshls8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vqshl_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vqshl\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c deleted file mode 100644 index 75c98ca2ad4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vqshl_u16 (arg0_uint16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqshl\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c deleted file mode 100644 index 3304981c76c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vqshl_u32 (arg0_uint32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqshl\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c deleted file mode 100644 index e4ff98fc889..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - int64x1_t arg1_int64x1_t; - - out_uint64x1_t = vqshl_u64 (arg0_uint64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vqshl\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c deleted file mode 100644 index 9b61f4e49b7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqshlu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vqshl_u8 (arg0_uint8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vqshl\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c deleted file mode 100644 index 6fe58908f09..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshluQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshluQ_ns16 (void) -{ - uint16x8_t out_uint16x8_t; - int16x8_t arg0_int16x8_t; - - out_uint16x8_t = vqshluq_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshlu\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c deleted file mode 100644 index 78ae2f539e8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshluQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshluQ_ns32 (void) -{ - uint32x4_t out_uint32x4_t; - int32x4_t arg0_int32x4_t; - - out_uint32x4_t = vqshluq_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshlu\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c deleted file mode 100644 index 45f5ba0b3c8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshluQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshluQ_ns64 (void) -{ - uint64x2_t out_uint64x2_t; - int64x2_t arg0_int64x2_t; - - out_uint64x2_t = vqshluq_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshlu\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c deleted file mode 100644 index 47e1e853b74..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshluQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshluQ_ns8 (void) -{ - uint8x16_t out_uint8x16_t; - int8x16_t arg0_int8x16_t; - - out_uint8x16_t = vqshluq_n_s8 (arg0_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vqshlu\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c deleted file mode 100644 index a168eb04104..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlu_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlu_ns16 (void) -{ - uint16x4_t out_uint16x4_t; - int16x4_t arg0_int16x4_t; - - out_uint16x4_t = vqshlu_n_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshlu\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c deleted file mode 100644 index f6256526a23..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlu_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlu_ns32 (void) -{ - uint32x2_t out_uint32x2_t; - int32x2_t arg0_int32x2_t; - - out_uint32x2_t = vqshlu_n_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshlu\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c deleted file mode 100644 index a7bd8e16e16..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlu_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlu_ns64 (void) -{ - uint64x1_t out_uint64x1_t; - int64x1_t arg0_int64x1_t; - - out_uint64x1_t = vqshlu_n_s64 (arg0_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vqshlu\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c deleted file mode 100644 index f8deec120d9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshlu_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshlu_ns8 (void) -{ - uint8x8_t out_uint8x8_t; - int8x8_t arg0_int8x8_t; - - out_uint8x8_t = vqshlu_n_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshlu\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c deleted file mode 100644 index 887ed43ff7f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrn_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrn_ns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - - out_int8x8_t = vqshrn_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshrn\.s16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c deleted file mode 100644 index 3256226ed8a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrn_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrn_ns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - - out_int16x4_t = vqshrn_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshrn\.s32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c deleted file mode 100644 index 949ad14dd33..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrn_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrn_ns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - - out_int32x2_t = vqshrn_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshrn\.s64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c deleted file mode 100644 index 944dcc6ac4e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrn_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrn_nu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint8x8_t = vqshrn_n_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshrn\.u16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c deleted file mode 100644 index ef9665ec2c6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrn_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrn_nu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint16x4_t = vqshrn_n_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshrn\.u32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c deleted file mode 100644 index 20da1ccf820..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrn_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrn_nu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint32x2_t = vqshrn_n_u64 (arg0_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshrn\.u64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c deleted file mode 100644 index 686c4e521c9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrun_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrun_ns16 (void) -{ - uint8x8_t out_uint8x8_t; - int16x8_t arg0_int16x8_t; - - out_uint8x8_t = vqshrun_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vqshrun\.s16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c deleted file mode 100644 index fcf370f6554..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrun_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrun_ns32 (void) -{ - uint16x4_t out_uint16x4_t; - int32x4_t arg0_int32x4_t; - - out_uint16x4_t = vqshrun_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vqshrun\.s32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c deleted file mode 100644 index e7f336e9617..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vqshrun_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqshrun_ns64 (void) -{ - uint32x2_t out_uint32x2_t; - int64x2_t arg0_int64x2_t; - - out_uint32x2_t = vqshrun_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vqshrun\.s64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c deleted file mode 100644 index 2e555f4eb34..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vqsubq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vqsub\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c deleted file mode 100644 index f496cfa7b35..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vqsubq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vqsub\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c deleted file mode 100644 index d6502350060..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vqsubq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vqsub\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c deleted file mode 100644 index 3dddbec09a9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vqsubq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vqsub\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c deleted file mode 100644 index 32cae6063eb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vqsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vqsub\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c deleted file mode 100644 index c6e90e4c9ab..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vqsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vqsub\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c deleted file mode 100644 index 59cf588ba9a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vqsubq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vqsub\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c deleted file mode 100644 index 50478cd156d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vqsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vqsub\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c deleted file mode 100644 index b5ce2f8a036..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vqsub_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vqsub\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c deleted file mode 100644 index c9290a00c63..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vqsub_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vqsub\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c deleted file mode 100644 index 2fee028da2a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubs64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vqsub_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vqsub\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c deleted file mode 100644 index 53b1add89cf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vqsub_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vqsub\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c deleted file mode 100644 index 68ecff86598..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vqsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vqsub\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c deleted file mode 100644 index bcb9db173fa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vqsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vqsub\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c deleted file mode 100644 index 1ca317b58f4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vqsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - -/* { dg-final { scan-assembler "vqsub\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c deleted file mode 100644 index 7946d1db40a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vqsubu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vqsubu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vqsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vqsub\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c deleted file mode 100644 index 0883d298e4b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrecpeQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrecpeQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vrecpeq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vrecpe\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c deleted file mode 100644 index 5520989275f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrecpeQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrecpeQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vrecpeq_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vrecpe\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c deleted file mode 100644 index d31cc860dab..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrecpef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrecpef32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vrecpe_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vrecpe\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c deleted file mode 100644 index 21ab98d90ce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrecpeu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrecpeu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vrecpe_u32 (arg0_uint32x2_t); -} - -/* { dg-final { scan-assembler "vrecpe\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c deleted file mode 100644 index aefe6265ec6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vrecpsQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrecpsQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vrecpsq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vrecps\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c deleted file mode 100644 index 8dac29c16df..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vrecpsf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrecpsf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vrecps_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vrecps\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c deleted file mode 100644 index 240c1d95590..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_p128 (void) -{ - float32x4_t out_float32x4_t; - poly128_t arg0_poly128_t; - - out_float32x4_t = vreinterpretq_f32_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c deleted file mode 100644 index 6e76ba6ef8f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_p16 (void) -{ - float32x4_t out_float32x4_t; - poly16x8_t arg0_poly16x8_t; - - out_float32x4_t = vreinterpretq_f32_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c deleted file mode 100644 index ba66ff81334..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_p64 (void) -{ - float32x4_t out_float32x4_t; - poly64x2_t arg0_poly64x2_t; - - out_float32x4_t = vreinterpretq_f32_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c deleted file mode 100644 index d13e01f0204..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_p8 (void) -{ - float32x4_t out_float32x4_t; - poly8x16_t arg0_poly8x16_t; - - out_float32x4_t = vreinterpretq_f32_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c deleted file mode 100644 index 70c48e953c3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_s16 (void) -{ - float32x4_t out_float32x4_t; - int16x8_t arg0_int16x8_t; - - out_float32x4_t = vreinterpretq_f32_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c deleted file mode 100644 index 546139ed914..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_s32 (void) -{ - float32x4_t out_float32x4_t; - int32x4_t arg0_int32x4_t; - - out_float32x4_t = vreinterpretq_f32_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c deleted file mode 100644 index a87ccffa371..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_s64 (void) -{ - float32x4_t out_float32x4_t; - int64x2_t arg0_int64x2_t; - - out_float32x4_t = vreinterpretq_f32_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c deleted file mode 100644 index 3d46bec0593..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_s8 (void) -{ - float32x4_t out_float32x4_t; - int8x16_t arg0_int8x16_t; - - out_float32x4_t = vreinterpretq_f32_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c deleted file mode 100644 index 3b0b189cc27..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_u16 (void) -{ - float32x4_t out_float32x4_t; - uint16x8_t arg0_uint16x8_t; - - out_float32x4_t = vreinterpretq_f32_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c deleted file mode 100644 index bc54aa66b9c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_u32 (void) -{ - float32x4_t out_float32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_float32x4_t = vreinterpretq_f32_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c deleted file mode 100644 index d582c5eda73..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_u64 (void) -{ - float32x4_t out_float32x4_t; - uint64x2_t arg0_uint64x2_t; - - out_float32x4_t = vreinterpretq_f32_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c deleted file mode 100644 index 956db9e673b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQf32_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQf32_u8 (void) -{ - float32x4_t out_float32x4_t; - uint8x16_t arg0_uint8x16_t; - - out_float32x4_t = vreinterpretq_f32_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c deleted file mode 100644 index 72732da63b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_f32 (void) -{ - poly128_t out_poly128_t; - float32x4_t arg0_float32x4_t; - - out_poly128_t = vreinterpretq_p128_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c deleted file mode 100644 index 52c3365b9fc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_p16 (void) -{ - poly128_t out_poly128_t; - poly16x8_t arg0_poly16x8_t; - - out_poly128_t = vreinterpretq_p128_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c deleted file mode 100644 index 2f86cfcc33d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_p64 (void) -{ - poly128_t out_poly128_t; - poly64x2_t arg0_poly64x2_t; - - out_poly128_t = vreinterpretq_p128_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c deleted file mode 100644 index 6964e394492..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_p8 (void) -{ - poly128_t out_poly128_t; - poly8x16_t arg0_poly8x16_t; - - out_poly128_t = vreinterpretq_p128_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c deleted file mode 100644 index a6f162b476a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_s16 (void) -{ - poly128_t out_poly128_t; - int16x8_t arg0_int16x8_t; - - out_poly128_t = vreinterpretq_p128_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c deleted file mode 100644 index 66f48936737..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_s32 (void) -{ - poly128_t out_poly128_t; - int32x4_t arg0_int32x4_t; - - out_poly128_t = vreinterpretq_p128_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c deleted file mode 100644 index 5437f319cc8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_s64 (void) -{ - poly128_t out_poly128_t; - int64x2_t arg0_int64x2_t; - - out_poly128_t = vreinterpretq_p128_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c deleted file mode 100644 index a4006ed1da5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_s8 (void) -{ - poly128_t out_poly128_t; - int8x16_t arg0_int8x16_t; - - out_poly128_t = vreinterpretq_p128_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c deleted file mode 100644 index 00aaf3ec6ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_u16 (void) -{ - poly128_t out_poly128_t; - uint16x8_t arg0_uint16x8_t; - - out_poly128_t = vreinterpretq_p128_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c deleted file mode 100644 index bf70c55bd59..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_u32 (void) -{ - poly128_t out_poly128_t; - uint32x4_t arg0_uint32x4_t; - - out_poly128_t = vreinterpretq_p128_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c deleted file mode 100644 index 092d18a573c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_u64 (void) -{ - poly128_t out_poly128_t; - uint64x2_t arg0_uint64x2_t; - - out_poly128_t = vreinterpretq_p128_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c deleted file mode 100644 index 39671d21833..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp128_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp128_u8 (void) -{ - poly128_t out_poly128_t; - uint8x16_t arg0_uint8x16_t; - - out_poly128_t = vreinterpretq_p128_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c deleted file mode 100644 index 586292687ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_f32 (void) -{ - poly16x8_t out_poly16x8_t; - float32x4_t arg0_float32x4_t; - - out_poly16x8_t = vreinterpretq_p16_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c deleted file mode 100644 index 8bdd6aaf984..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_p128 (void) -{ - poly16x8_t out_poly16x8_t; - poly128_t arg0_poly128_t; - - out_poly16x8_t = vreinterpretq_p16_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c deleted file mode 100644 index 8073d9d0616..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_p64 (void) -{ - poly16x8_t out_poly16x8_t; - poly64x2_t arg0_poly64x2_t; - - out_poly16x8_t = vreinterpretq_p16_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c deleted file mode 100644 index 71ea56d3972..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_p8 (void) -{ - poly16x8_t out_poly16x8_t; - poly8x16_t arg0_poly8x16_t; - - out_poly16x8_t = vreinterpretq_p16_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c deleted file mode 100644 index 8073ad1a0ef..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_s16 (void) -{ - poly16x8_t out_poly16x8_t; - int16x8_t arg0_int16x8_t; - - out_poly16x8_t = vreinterpretq_p16_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c deleted file mode 100644 index 08c3c446dc9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_s32 (void) -{ - poly16x8_t out_poly16x8_t; - int32x4_t arg0_int32x4_t; - - out_poly16x8_t = vreinterpretq_p16_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c deleted file mode 100644 index 8c8218144dc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_s64 (void) -{ - poly16x8_t out_poly16x8_t; - int64x2_t arg0_int64x2_t; - - out_poly16x8_t = vreinterpretq_p16_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c deleted file mode 100644 index dd3bad0af6f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_s8 (void) -{ - poly16x8_t out_poly16x8_t; - int8x16_t arg0_int8x16_t; - - out_poly16x8_t = vreinterpretq_p16_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c deleted file mode 100644 index bb3557cc8c8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_u16 (void) -{ - poly16x8_t out_poly16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_poly16x8_t = vreinterpretq_p16_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c deleted file mode 100644 index ede90f20ede..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_u32 (void) -{ - poly16x8_t out_poly16x8_t; - uint32x4_t arg0_uint32x4_t; - - out_poly16x8_t = vreinterpretq_p16_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c deleted file mode 100644 index 51692b95292..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_u64 (void) -{ - poly16x8_t out_poly16x8_t; - uint64x2_t arg0_uint64x2_t; - - out_poly16x8_t = vreinterpretq_p16_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c deleted file mode 100644 index 020f6cd7473..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp16_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp16_u8 (void) -{ - poly16x8_t out_poly16x8_t; - uint8x16_t arg0_uint8x16_t; - - out_poly16x8_t = vreinterpretq_p16_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c deleted file mode 100644 index 97a64f76fe8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_f32 (void) -{ - poly64x2_t out_poly64x2_t; - float32x4_t arg0_float32x4_t; - - out_poly64x2_t = vreinterpretq_p64_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c deleted file mode 100644 index 50db9792bd2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_p128 (void) -{ - poly64x2_t out_poly64x2_t; - poly128_t arg0_poly128_t; - - out_poly64x2_t = vreinterpretq_p64_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c deleted file mode 100644 index 43957944a2f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_p16 (void) -{ - poly64x2_t out_poly64x2_t; - poly16x8_t arg0_poly16x8_t; - - out_poly64x2_t = vreinterpretq_p64_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c deleted file mode 100644 index 0bf635cda3d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_p8 (void) -{ - poly64x2_t out_poly64x2_t; - poly8x16_t arg0_poly8x16_t; - - out_poly64x2_t = vreinterpretq_p64_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c deleted file mode 100644 index 13320e15ff5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_s16 (void) -{ - poly64x2_t out_poly64x2_t; - int16x8_t arg0_int16x8_t; - - out_poly64x2_t = vreinterpretq_p64_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c deleted file mode 100644 index 3377d507ca2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_s32 (void) -{ - poly64x2_t out_poly64x2_t; - int32x4_t arg0_int32x4_t; - - out_poly64x2_t = vreinterpretq_p64_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c deleted file mode 100644 index c5fd29e347f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_s64 (void) -{ - poly64x2_t out_poly64x2_t; - int64x2_t arg0_int64x2_t; - - out_poly64x2_t = vreinterpretq_p64_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c deleted file mode 100644 index b85ce4ea58e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_s8 (void) -{ - poly64x2_t out_poly64x2_t; - int8x16_t arg0_int8x16_t; - - out_poly64x2_t = vreinterpretq_p64_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c deleted file mode 100644 index a46231cc26a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_u16 (void) -{ - poly64x2_t out_poly64x2_t; - uint16x8_t arg0_uint16x8_t; - - out_poly64x2_t = vreinterpretq_p64_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c deleted file mode 100644 index be0f4d84b53..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_u32 (void) -{ - poly64x2_t out_poly64x2_t; - uint32x4_t arg0_uint32x4_t; - - out_poly64x2_t = vreinterpretq_p64_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c deleted file mode 100644 index 1c141b62a06..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_u64 (void) -{ - poly64x2_t out_poly64x2_t; - uint64x2_t arg0_uint64x2_t; - - out_poly64x2_t = vreinterpretq_p64_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c deleted file mode 100644 index 25cd2e0e03c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp64_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp64_u8 (void) -{ - poly64x2_t out_poly64x2_t; - uint8x16_t arg0_uint8x16_t; - - out_poly64x2_t = vreinterpretq_p64_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c deleted file mode 100644 index 017fd16faa0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_f32 (void) -{ - poly8x16_t out_poly8x16_t; - float32x4_t arg0_float32x4_t; - - out_poly8x16_t = vreinterpretq_p8_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c deleted file mode 100644 index 3c12a5bb9ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_p128 (void) -{ - poly8x16_t out_poly8x16_t; - poly128_t arg0_poly128_t; - - out_poly8x16_t = vreinterpretq_p8_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c deleted file mode 100644 index 9fb4fa140e5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_p16 (void) -{ - poly8x16_t out_poly8x16_t; - poly16x8_t arg0_poly16x8_t; - - out_poly8x16_t = vreinterpretq_p8_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c deleted file mode 100644 index 2b5b81595be..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_p64 (void) -{ - poly8x16_t out_poly8x16_t; - poly64x2_t arg0_poly64x2_t; - - out_poly8x16_t = vreinterpretq_p8_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c deleted file mode 100644 index 91ad505ff36..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_s16 (void) -{ - poly8x16_t out_poly8x16_t; - int16x8_t arg0_int16x8_t; - - out_poly8x16_t = vreinterpretq_p8_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c deleted file mode 100644 index 0ab4eff2dd1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_s32 (void) -{ - poly8x16_t out_poly8x16_t; - int32x4_t arg0_int32x4_t; - - out_poly8x16_t = vreinterpretq_p8_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c deleted file mode 100644 index 946b82420db..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_s64 (void) -{ - poly8x16_t out_poly8x16_t; - int64x2_t arg0_int64x2_t; - - out_poly8x16_t = vreinterpretq_p8_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c deleted file mode 100644 index f07c24ae7a5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_s8 (void) -{ - poly8x16_t out_poly8x16_t; - int8x16_t arg0_int8x16_t; - - out_poly8x16_t = vreinterpretq_p8_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c deleted file mode 100644 index b776ef016ac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_u16 (void) -{ - poly8x16_t out_poly8x16_t; - uint16x8_t arg0_uint16x8_t; - - out_poly8x16_t = vreinterpretq_p8_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c deleted file mode 100644 index b74c757276b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_u32 (void) -{ - poly8x16_t out_poly8x16_t; - uint32x4_t arg0_uint32x4_t; - - out_poly8x16_t = vreinterpretq_p8_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c deleted file mode 100644 index fc89c81db5a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_u64 (void) -{ - poly8x16_t out_poly8x16_t; - uint64x2_t arg0_uint64x2_t; - - out_poly8x16_t = vreinterpretq_p8_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c deleted file mode 100644 index 82f02fcc047..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQp8_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQp8_u8 (void) -{ - poly8x16_t out_poly8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_poly8x16_t = vreinterpretq_p8_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c deleted file mode 100644 index e74ca76c7a0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_f32 (void) -{ - int16x8_t out_int16x8_t; - float32x4_t arg0_float32x4_t; - - out_int16x8_t = vreinterpretq_s16_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c deleted file mode 100644 index da932d9f14e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_p128 (void) -{ - int16x8_t out_int16x8_t; - poly128_t arg0_poly128_t; - - out_int16x8_t = vreinterpretq_s16_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c deleted file mode 100644 index e643ed997ff..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_p16 (void) -{ - int16x8_t out_int16x8_t; - poly16x8_t arg0_poly16x8_t; - - out_int16x8_t = vreinterpretq_s16_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c deleted file mode 100644 index ce15357f7cf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_p64 (void) -{ - int16x8_t out_int16x8_t; - poly64x2_t arg0_poly64x2_t; - - out_int16x8_t = vreinterpretq_s16_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c deleted file mode 100644 index e3b28f5955e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_p8 (void) -{ - int16x8_t out_int16x8_t; - poly8x16_t arg0_poly8x16_t; - - out_int16x8_t = vreinterpretq_s16_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c deleted file mode 100644 index 8ffa8a9a24f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_s32 (void) -{ - int16x8_t out_int16x8_t; - int32x4_t arg0_int32x4_t; - - out_int16x8_t = vreinterpretq_s16_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c deleted file mode 100644 index caa23fc877c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_s64 (void) -{ - int16x8_t out_int16x8_t; - int64x2_t arg0_int64x2_t; - - out_int16x8_t = vreinterpretq_s16_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c deleted file mode 100644 index 57e03d41a35..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_s8 (void) -{ - int16x8_t out_int16x8_t; - int8x16_t arg0_int8x16_t; - - out_int16x8_t = vreinterpretq_s16_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c deleted file mode 100644 index 03497b50891..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_u16 (void) -{ - int16x8_t out_int16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_int16x8_t = vreinterpretq_s16_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c deleted file mode 100644 index 1d264b56fcb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_u32 (void) -{ - int16x8_t out_int16x8_t; - uint32x4_t arg0_uint32x4_t; - - out_int16x8_t = vreinterpretq_s16_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c deleted file mode 100644 index 355a0aa4ed1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_u64 (void) -{ - int16x8_t out_int16x8_t; - uint64x2_t arg0_uint64x2_t; - - out_int16x8_t = vreinterpretq_s16_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c deleted file mode 100644 index 339ed278960..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs16_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs16_u8 (void) -{ - int16x8_t out_int16x8_t; - uint8x16_t arg0_uint8x16_t; - - out_int16x8_t = vreinterpretq_s16_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c deleted file mode 100644 index 857db63cdbc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_f32 (void) -{ - int32x4_t out_int32x4_t; - float32x4_t arg0_float32x4_t; - - out_int32x4_t = vreinterpretq_s32_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c deleted file mode 100644 index eb1d7ad2b75..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_p128 (void) -{ - int32x4_t out_int32x4_t; - poly128_t arg0_poly128_t; - - out_int32x4_t = vreinterpretq_s32_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c deleted file mode 100644 index 0dc4d481cf6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_p16 (void) -{ - int32x4_t out_int32x4_t; - poly16x8_t arg0_poly16x8_t; - - out_int32x4_t = vreinterpretq_s32_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c deleted file mode 100644 index 00e3a614094..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_p64 (void) -{ - int32x4_t out_int32x4_t; - poly64x2_t arg0_poly64x2_t; - - out_int32x4_t = vreinterpretq_s32_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c deleted file mode 100644 index 07c787031e3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_p8 (void) -{ - int32x4_t out_int32x4_t; - poly8x16_t arg0_poly8x16_t; - - out_int32x4_t = vreinterpretq_s32_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c deleted file mode 100644 index 5d72da975ae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_s16 (void) -{ - int32x4_t out_int32x4_t; - int16x8_t arg0_int16x8_t; - - out_int32x4_t = vreinterpretq_s32_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c deleted file mode 100644 index c1d859307dd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_s64 (void) -{ - int32x4_t out_int32x4_t; - int64x2_t arg0_int64x2_t; - - out_int32x4_t = vreinterpretq_s32_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c deleted file mode 100644 index 0ba13b3e6bd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_s8 (void) -{ - int32x4_t out_int32x4_t; - int8x16_t arg0_int8x16_t; - - out_int32x4_t = vreinterpretq_s32_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c deleted file mode 100644 index 35ed106e426..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_u16 (void) -{ - int32x4_t out_int32x4_t; - uint16x8_t arg0_uint16x8_t; - - out_int32x4_t = vreinterpretq_s32_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c deleted file mode 100644 index dc6082fd846..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_u32 (void) -{ - int32x4_t out_int32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_int32x4_t = vreinterpretq_s32_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c deleted file mode 100644 index c0083bd1b82..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_u64 (void) -{ - int32x4_t out_int32x4_t; - uint64x2_t arg0_uint64x2_t; - - out_int32x4_t = vreinterpretq_s32_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c deleted file mode 100644 index 7cba3e2c794..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs32_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs32_u8 (void) -{ - int32x4_t out_int32x4_t; - uint8x16_t arg0_uint8x16_t; - - out_int32x4_t = vreinterpretq_s32_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c deleted file mode 100644 index e4f1de3aefe..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_f32 (void) -{ - int64x2_t out_int64x2_t; - float32x4_t arg0_float32x4_t; - - out_int64x2_t = vreinterpretq_s64_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c deleted file mode 100644 index e4cb3535865..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_p128 (void) -{ - int64x2_t out_int64x2_t; - poly128_t arg0_poly128_t; - - out_int64x2_t = vreinterpretq_s64_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c deleted file mode 100644 index 35b36c1ea7b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_p16 (void) -{ - int64x2_t out_int64x2_t; - poly16x8_t arg0_poly16x8_t; - - out_int64x2_t = vreinterpretq_s64_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c deleted file mode 100644 index 384bde61290..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_p64 (void) -{ - int64x2_t out_int64x2_t; - poly64x2_t arg0_poly64x2_t; - - out_int64x2_t = vreinterpretq_s64_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c deleted file mode 100644 index 434ad4f3963..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_p8 (void) -{ - int64x2_t out_int64x2_t; - poly8x16_t arg0_poly8x16_t; - - out_int64x2_t = vreinterpretq_s64_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c deleted file mode 100644 index b03138e94f6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_s16 (void) -{ - int64x2_t out_int64x2_t; - int16x8_t arg0_int16x8_t; - - out_int64x2_t = vreinterpretq_s64_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c deleted file mode 100644 index efe19b2819f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_s32 (void) -{ - int64x2_t out_int64x2_t; - int32x4_t arg0_int32x4_t; - - out_int64x2_t = vreinterpretq_s64_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c deleted file mode 100644 index 3d62931e7c0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_s8 (void) -{ - int64x2_t out_int64x2_t; - int8x16_t arg0_int8x16_t; - - out_int64x2_t = vreinterpretq_s64_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c deleted file mode 100644 index 2155784c014..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_u16 (void) -{ - int64x2_t out_int64x2_t; - uint16x8_t arg0_uint16x8_t; - - out_int64x2_t = vreinterpretq_s64_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c deleted file mode 100644 index aa9bf07f532..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_u32 (void) -{ - int64x2_t out_int64x2_t; - uint32x4_t arg0_uint32x4_t; - - out_int64x2_t = vreinterpretq_s64_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c deleted file mode 100644 index 20c9b78fe77..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_u64 (void) -{ - int64x2_t out_int64x2_t; - uint64x2_t arg0_uint64x2_t; - - out_int64x2_t = vreinterpretq_s64_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c deleted file mode 100644 index 28baec05e82..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs64_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs64_u8 (void) -{ - int64x2_t out_int64x2_t; - uint8x16_t arg0_uint8x16_t; - - out_int64x2_t = vreinterpretq_s64_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c deleted file mode 100644 index c3830d1694b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_f32 (void) -{ - int8x16_t out_int8x16_t; - float32x4_t arg0_float32x4_t; - - out_int8x16_t = vreinterpretq_s8_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c deleted file mode 100644 index ee6084545c2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_p128 (void) -{ - int8x16_t out_int8x16_t; - poly128_t arg0_poly128_t; - - out_int8x16_t = vreinterpretq_s8_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c deleted file mode 100644 index 739f0ab1a26..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_p16 (void) -{ - int8x16_t out_int8x16_t; - poly16x8_t arg0_poly16x8_t; - - out_int8x16_t = vreinterpretq_s8_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c deleted file mode 100644 index 3c8b458e1a1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_p64 (void) -{ - int8x16_t out_int8x16_t; - poly64x2_t arg0_poly64x2_t; - - out_int8x16_t = vreinterpretq_s8_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c deleted file mode 100644 index 1702e8f59b7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_p8 (void) -{ - int8x16_t out_int8x16_t; - poly8x16_t arg0_poly8x16_t; - - out_int8x16_t = vreinterpretq_s8_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c deleted file mode 100644 index 593209ec001..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_s16 (void) -{ - int8x16_t out_int8x16_t; - int16x8_t arg0_int16x8_t; - - out_int8x16_t = vreinterpretq_s8_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c deleted file mode 100644 index ecd67eeaebd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_s32 (void) -{ - int8x16_t out_int8x16_t; - int32x4_t arg0_int32x4_t; - - out_int8x16_t = vreinterpretq_s8_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c deleted file mode 100644 index eea205c09c5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_s64 (void) -{ - int8x16_t out_int8x16_t; - int64x2_t arg0_int64x2_t; - - out_int8x16_t = vreinterpretq_s8_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c deleted file mode 100644 index ca8c8564f01..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_u16 (void) -{ - int8x16_t out_int8x16_t; - uint16x8_t arg0_uint16x8_t; - - out_int8x16_t = vreinterpretq_s8_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c deleted file mode 100644 index 714567a9f6e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_u32 (void) -{ - int8x16_t out_int8x16_t; - uint32x4_t arg0_uint32x4_t; - - out_int8x16_t = vreinterpretq_s8_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c deleted file mode 100644 index 2471b81c891..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_u64 (void) -{ - int8x16_t out_int8x16_t; - uint64x2_t arg0_uint64x2_t; - - out_int8x16_t = vreinterpretq_s8_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c deleted file mode 100644 index 816c645e3cc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQs8_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQs8_u8 (void) -{ - int8x16_t out_int8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_int8x16_t = vreinterpretq_s8_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c deleted file mode 100644 index 0d9218efa90..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_f32 (void) -{ - uint16x8_t out_uint16x8_t; - float32x4_t arg0_float32x4_t; - - out_uint16x8_t = vreinterpretq_u16_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c deleted file mode 100644 index 6f45c3eaafc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_p128 (void) -{ - uint16x8_t out_uint16x8_t; - poly128_t arg0_poly128_t; - - out_uint16x8_t = vreinterpretq_u16_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c deleted file mode 100644 index cbc19e10839..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_p16 (void) -{ - uint16x8_t out_uint16x8_t; - poly16x8_t arg0_poly16x8_t; - - out_uint16x8_t = vreinterpretq_u16_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c deleted file mode 100644 index f11a75137fe..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_p64 (void) -{ - uint16x8_t out_uint16x8_t; - poly64x2_t arg0_poly64x2_t; - - out_uint16x8_t = vreinterpretq_u16_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c deleted file mode 100644 index ff386149a18..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_p8 (void) -{ - uint16x8_t out_uint16x8_t; - poly8x16_t arg0_poly8x16_t; - - out_uint16x8_t = vreinterpretq_u16_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c deleted file mode 100644 index 8842c4779e1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_s16 (void) -{ - uint16x8_t out_uint16x8_t; - int16x8_t arg0_int16x8_t; - - out_uint16x8_t = vreinterpretq_u16_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c deleted file mode 100644 index dc23a4db9f1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_s32 (void) -{ - uint16x8_t out_uint16x8_t; - int32x4_t arg0_int32x4_t; - - out_uint16x8_t = vreinterpretq_u16_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c deleted file mode 100644 index 92179de7011..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_s64 (void) -{ - uint16x8_t out_uint16x8_t; - int64x2_t arg0_int64x2_t; - - out_uint16x8_t = vreinterpretq_u16_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c deleted file mode 100644 index ceff877ec7f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_s8 (void) -{ - uint16x8_t out_uint16x8_t; - int8x16_t arg0_int8x16_t; - - out_uint16x8_t = vreinterpretq_u16_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c deleted file mode 100644 index c0f49ec3499..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_u32 (void) -{ - uint16x8_t out_uint16x8_t; - uint32x4_t arg0_uint32x4_t; - - out_uint16x8_t = vreinterpretq_u16_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c deleted file mode 100644 index a80bea2bf77..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_u64 (void) -{ - uint16x8_t out_uint16x8_t; - uint64x2_t arg0_uint64x2_t; - - out_uint16x8_t = vreinterpretq_u16_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c deleted file mode 100644 index bcf28c1cf48..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu16_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu16_u8 (void) -{ - uint16x8_t out_uint16x8_t; - uint8x16_t arg0_uint8x16_t; - - out_uint16x8_t = vreinterpretq_u16_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c deleted file mode 100644 index 95608e07b37..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_f32 (void) -{ - uint32x4_t out_uint32x4_t; - float32x4_t arg0_float32x4_t; - - out_uint32x4_t = vreinterpretq_u32_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c deleted file mode 100644 index 83254ae44c9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_p128 (void) -{ - uint32x4_t out_uint32x4_t; - poly128_t arg0_poly128_t; - - out_uint32x4_t = vreinterpretq_u32_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c deleted file mode 100644 index 6a55e7a53ea..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_p16 (void) -{ - uint32x4_t out_uint32x4_t; - poly16x8_t arg0_poly16x8_t; - - out_uint32x4_t = vreinterpretq_u32_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c deleted file mode 100644 index b0c446dcd5d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_p64 (void) -{ - uint32x4_t out_uint32x4_t; - poly64x2_t arg0_poly64x2_t; - - out_uint32x4_t = vreinterpretq_u32_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c deleted file mode 100644 index b8d49052326..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_p8 (void) -{ - uint32x4_t out_uint32x4_t; - poly8x16_t arg0_poly8x16_t; - - out_uint32x4_t = vreinterpretq_u32_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c deleted file mode 100644 index 85a1ec8d3ba..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_s16 (void) -{ - uint32x4_t out_uint32x4_t; - int16x8_t arg0_int16x8_t; - - out_uint32x4_t = vreinterpretq_u32_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c deleted file mode 100644 index 60c17508e89..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_s32 (void) -{ - uint32x4_t out_uint32x4_t; - int32x4_t arg0_int32x4_t; - - out_uint32x4_t = vreinterpretq_u32_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c deleted file mode 100644 index bf02d09cbd1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_s64 (void) -{ - uint32x4_t out_uint32x4_t; - int64x2_t arg0_int64x2_t; - - out_uint32x4_t = vreinterpretq_u32_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c deleted file mode 100644 index 8bd776089f0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_s8 (void) -{ - uint32x4_t out_uint32x4_t; - int8x16_t arg0_int8x16_t; - - out_uint32x4_t = vreinterpretq_u32_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c deleted file mode 100644 index 2326bc9b301..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_u16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x8_t arg0_uint16x8_t; - - out_uint32x4_t = vreinterpretq_u32_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c deleted file mode 100644 index 0386681879f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_u64 (void) -{ - uint32x4_t out_uint32x4_t; - uint64x2_t arg0_uint64x2_t; - - out_uint32x4_t = vreinterpretq_u32_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c deleted file mode 100644 index 14f63d8e730..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu32_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu32_u8 (void) -{ - uint32x4_t out_uint32x4_t; - uint8x16_t arg0_uint8x16_t; - - out_uint32x4_t = vreinterpretq_u32_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c deleted file mode 100644 index 6a8559db84b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_f32 (void) -{ - uint64x2_t out_uint64x2_t; - float32x4_t arg0_float32x4_t; - - out_uint64x2_t = vreinterpretq_u64_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c deleted file mode 100644 index 1dc0309b4cd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_p128 (void) -{ - uint64x2_t out_uint64x2_t; - poly128_t arg0_poly128_t; - - out_uint64x2_t = vreinterpretq_u64_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c deleted file mode 100644 index f4a31acefd5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_p16 (void) -{ - uint64x2_t out_uint64x2_t; - poly16x8_t arg0_poly16x8_t; - - out_uint64x2_t = vreinterpretq_u64_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c deleted file mode 100644 index 187da75840f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_p64 (void) -{ - uint64x2_t out_uint64x2_t; - poly64x2_t arg0_poly64x2_t; - - out_uint64x2_t = vreinterpretq_u64_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c deleted file mode 100644 index 19807147aa9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_p8 (void) -{ - uint64x2_t out_uint64x2_t; - poly8x16_t arg0_poly8x16_t; - - out_uint64x2_t = vreinterpretq_u64_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c deleted file mode 100644 index 93673de08e8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_s16 (void) -{ - uint64x2_t out_uint64x2_t; - int16x8_t arg0_int16x8_t; - - out_uint64x2_t = vreinterpretq_u64_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c deleted file mode 100644 index 60c00422112..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_s32 (void) -{ - uint64x2_t out_uint64x2_t; - int32x4_t arg0_int32x4_t; - - out_uint64x2_t = vreinterpretq_u64_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c deleted file mode 100644 index da88b545623..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_s64 (void) -{ - uint64x2_t out_uint64x2_t; - int64x2_t arg0_int64x2_t; - - out_uint64x2_t = vreinterpretq_u64_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c deleted file mode 100644 index b5322aaed9d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_s8 (void) -{ - uint64x2_t out_uint64x2_t; - int8x16_t arg0_int8x16_t; - - out_uint64x2_t = vreinterpretq_u64_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c deleted file mode 100644 index 06bf44e442e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_u16 (void) -{ - uint64x2_t out_uint64x2_t; - uint16x8_t arg0_uint16x8_t; - - out_uint64x2_t = vreinterpretq_u64_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c deleted file mode 100644 index 2d71f71ba48..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_u32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x4_t arg0_uint32x4_t; - - out_uint64x2_t = vreinterpretq_u64_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c deleted file mode 100644 index f870e923895..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu64_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu64_u8 (void) -{ - uint64x2_t out_uint64x2_t; - uint8x16_t arg0_uint8x16_t; - - out_uint64x2_t = vreinterpretq_u64_u8 (arg0_uint8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c deleted file mode 100644 index 8aaffdae927..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_f32 (void) -{ - uint8x16_t out_uint8x16_t; - float32x4_t arg0_float32x4_t; - - out_uint8x16_t = vreinterpretq_u8_f32 (arg0_float32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c deleted file mode 100644 index eff6df5fcd1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_p128' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_p128 (void) -{ - uint8x16_t out_uint8x16_t; - poly128_t arg0_poly128_t; - - out_uint8x16_t = vreinterpretq_u8_p128 (arg0_poly128_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c deleted file mode 100644 index ac9b586fd69..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_p16 (void) -{ - uint8x16_t out_uint8x16_t; - poly16x8_t arg0_poly16x8_t; - - out_uint8x16_t = vreinterpretq_u8_p16 (arg0_poly16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c deleted file mode 100644 index e75b8a1fd94..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_p64 (void) -{ - uint8x16_t out_uint8x16_t; - poly64x2_t arg0_poly64x2_t; - - out_uint8x16_t = vreinterpretq_u8_p64 (arg0_poly64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c deleted file mode 100644 index 0d49f7d93ad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_p8 (void) -{ - uint8x16_t out_uint8x16_t; - poly8x16_t arg0_poly8x16_t; - - out_uint8x16_t = vreinterpretq_u8_p8 (arg0_poly8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c deleted file mode 100644 index 37f3fed25bb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_s16 (void) -{ - uint8x16_t out_uint8x16_t; - int16x8_t arg0_int16x8_t; - - out_uint8x16_t = vreinterpretq_u8_s16 (arg0_int16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c deleted file mode 100644 index 0ed46fd52d0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_s32 (void) -{ - uint8x16_t out_uint8x16_t; - int32x4_t arg0_int32x4_t; - - out_uint8x16_t = vreinterpretq_u8_s32 (arg0_int32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c deleted file mode 100644 index 73dc999029d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_s64 (void) -{ - uint8x16_t out_uint8x16_t; - int64x2_t arg0_int64x2_t; - - out_uint8x16_t = vreinterpretq_u8_s64 (arg0_int64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c deleted file mode 100644 index a243537980e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_s8 (void) -{ - uint8x16_t out_uint8x16_t; - int8x16_t arg0_int8x16_t; - - out_uint8x16_t = vreinterpretq_u8_s8 (arg0_int8x16_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c deleted file mode 100644 index 57e405383f3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_u16 (void) -{ - uint8x16_t out_uint8x16_t; - uint16x8_t arg0_uint16x8_t; - - out_uint8x16_t = vreinterpretq_u8_u16 (arg0_uint16x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c deleted file mode 100644 index 98b998f9648..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_u32 (void) -{ - uint8x16_t out_uint8x16_t; - uint32x4_t arg0_uint32x4_t; - - out_uint8x16_t = vreinterpretq_u8_u32 (arg0_uint32x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c deleted file mode 100644 index 0cebf4dc89e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretQu8_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretQu8_u64 (void) -{ - uint8x16_t out_uint8x16_t; - uint64x2_t arg0_uint64x2_t; - - out_uint8x16_t = vreinterpretq_u8_u64 (arg0_uint64x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c deleted file mode 100644 index 6bec08ec4ba..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_p16 (void) -{ - float32x2_t out_float32x2_t; - poly16x4_t arg0_poly16x4_t; - - out_float32x2_t = vreinterpret_f32_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c deleted file mode 100644 index bb7ea600872..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_p64 (void) -{ - float32x2_t out_float32x2_t; - poly64x1_t arg0_poly64x1_t; - - out_float32x2_t = vreinterpret_f32_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c deleted file mode 100644 index 05a4eb61417..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_p8 (void) -{ - float32x2_t out_float32x2_t; - poly8x8_t arg0_poly8x8_t; - - out_float32x2_t = vreinterpret_f32_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c deleted file mode 100644 index dbf514bf820..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_s16 (void) -{ - float32x2_t out_float32x2_t; - int16x4_t arg0_int16x4_t; - - out_float32x2_t = vreinterpret_f32_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c deleted file mode 100644 index 133bade83a7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_s32 (void) -{ - float32x2_t out_float32x2_t; - int32x2_t arg0_int32x2_t; - - out_float32x2_t = vreinterpret_f32_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c deleted file mode 100644 index 7a9045ec8fb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_s64 (void) -{ - float32x2_t out_float32x2_t; - int64x1_t arg0_int64x1_t; - - out_float32x2_t = vreinterpret_f32_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c deleted file mode 100644 index 256f6a4dfd6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_s8 (void) -{ - float32x2_t out_float32x2_t; - int8x8_t arg0_int8x8_t; - - out_float32x2_t = vreinterpret_f32_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c deleted file mode 100644 index 319c0f04cd4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_u16 (void) -{ - float32x2_t out_float32x2_t; - uint16x4_t arg0_uint16x4_t; - - out_float32x2_t = vreinterpret_f32_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c deleted file mode 100644 index 3e4b1d41a22..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_u32 (void) -{ - float32x2_t out_float32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_float32x2_t = vreinterpret_f32_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c deleted file mode 100644 index 880ab422df3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_u64 (void) -{ - float32x2_t out_float32x2_t; - uint64x1_t arg0_uint64x1_t; - - out_float32x2_t = vreinterpret_f32_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c deleted file mode 100644 index 0f25f6a4ff6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretf32_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretf32_u8 (void) -{ - float32x2_t out_float32x2_t; - uint8x8_t arg0_uint8x8_t; - - out_float32x2_t = vreinterpret_f32_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c deleted file mode 100644 index 276b8c339b8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_f32 (void) -{ - poly16x4_t out_poly16x4_t; - float32x2_t arg0_float32x2_t; - - out_poly16x4_t = vreinterpret_p16_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c deleted file mode 100644 index 67799cb5357..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_p64 (void) -{ - poly16x4_t out_poly16x4_t; - poly64x1_t arg0_poly64x1_t; - - out_poly16x4_t = vreinterpret_p16_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c deleted file mode 100644 index 837d731b86a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_p8 (void) -{ - poly16x4_t out_poly16x4_t; - poly8x8_t arg0_poly8x8_t; - - out_poly16x4_t = vreinterpret_p16_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c deleted file mode 100644 index 099ed520ae7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_s16 (void) -{ - poly16x4_t out_poly16x4_t; - int16x4_t arg0_int16x4_t; - - out_poly16x4_t = vreinterpret_p16_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c deleted file mode 100644 index 027c156be1e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_s32 (void) -{ - poly16x4_t out_poly16x4_t; - int32x2_t arg0_int32x2_t; - - out_poly16x4_t = vreinterpret_p16_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c deleted file mode 100644 index 2fdc5e76b2b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_s64 (void) -{ - poly16x4_t out_poly16x4_t; - int64x1_t arg0_int64x1_t; - - out_poly16x4_t = vreinterpret_p16_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c deleted file mode 100644 index 1b6828f44e3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_s8 (void) -{ - poly16x4_t out_poly16x4_t; - int8x8_t arg0_int8x8_t; - - out_poly16x4_t = vreinterpret_p16_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c deleted file mode 100644 index f66131734d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_u16 (void) -{ - poly16x4_t out_poly16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_poly16x4_t = vreinterpret_p16_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c deleted file mode 100644 index b59d49280d3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_u32 (void) -{ - poly16x4_t out_poly16x4_t; - uint32x2_t arg0_uint32x2_t; - - out_poly16x4_t = vreinterpret_p16_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c deleted file mode 100644 index fcebd515b4a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_u64 (void) -{ - poly16x4_t out_poly16x4_t; - uint64x1_t arg0_uint64x1_t; - - out_poly16x4_t = vreinterpret_p16_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c deleted file mode 100644 index c6a6f2d9b74..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp16_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp16_u8 (void) -{ - poly16x4_t out_poly16x4_t; - uint8x8_t arg0_uint8x8_t; - - out_poly16x4_t = vreinterpret_p16_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c deleted file mode 100644 index 1905a99dba8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_f32 (void) -{ - poly64x1_t out_poly64x1_t; - float32x2_t arg0_float32x2_t; - - out_poly64x1_t = vreinterpret_p64_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c deleted file mode 100644 index 546d7ef9981..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_p16 (void) -{ - poly64x1_t out_poly64x1_t; - poly16x4_t arg0_poly16x4_t; - - out_poly64x1_t = vreinterpret_p64_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c deleted file mode 100644 index 0a36a8fd12e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_p8 (void) -{ - poly64x1_t out_poly64x1_t; - poly8x8_t arg0_poly8x8_t; - - out_poly64x1_t = vreinterpret_p64_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c deleted file mode 100644 index 94875599aa0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_s16 (void) -{ - poly64x1_t out_poly64x1_t; - int16x4_t arg0_int16x4_t; - - out_poly64x1_t = vreinterpret_p64_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c deleted file mode 100644 index ffca4cfe8d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_s32 (void) -{ - poly64x1_t out_poly64x1_t; - int32x2_t arg0_int32x2_t; - - out_poly64x1_t = vreinterpret_p64_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c deleted file mode 100644 index c3a01737756..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_s64 (void) -{ - poly64x1_t out_poly64x1_t; - int64x1_t arg0_int64x1_t; - - out_poly64x1_t = vreinterpret_p64_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c deleted file mode 100644 index ba12a05cac7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_s8 (void) -{ - poly64x1_t out_poly64x1_t; - int8x8_t arg0_int8x8_t; - - out_poly64x1_t = vreinterpret_p64_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c deleted file mode 100644 index 9a60595a095..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_u16 (void) -{ - poly64x1_t out_poly64x1_t; - uint16x4_t arg0_uint16x4_t; - - out_poly64x1_t = vreinterpret_p64_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c deleted file mode 100644 index cb61d538214..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_u32 (void) -{ - poly64x1_t out_poly64x1_t; - uint32x2_t arg0_uint32x2_t; - - out_poly64x1_t = vreinterpret_p64_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c deleted file mode 100644 index 1459a493bdd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_u64 (void) -{ - poly64x1_t out_poly64x1_t; - uint64x1_t arg0_uint64x1_t; - - out_poly64x1_t = vreinterpret_p64_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c deleted file mode 100644 index 4e8fcf64342..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp64_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp64_u8 (void) -{ - poly64x1_t out_poly64x1_t; - uint8x8_t arg0_uint8x8_t; - - out_poly64x1_t = vreinterpret_p64_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c deleted file mode 100644 index e128056c665..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_f32 (void) -{ - poly8x8_t out_poly8x8_t; - float32x2_t arg0_float32x2_t; - - out_poly8x8_t = vreinterpret_p8_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c deleted file mode 100644 index 736741c057d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_p16 (void) -{ - poly8x8_t out_poly8x8_t; - poly16x4_t arg0_poly16x4_t; - - out_poly8x8_t = vreinterpret_p8_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c deleted file mode 100644 index 35166267fcf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_p64 (void) -{ - poly8x8_t out_poly8x8_t; - poly64x1_t arg0_poly64x1_t; - - out_poly8x8_t = vreinterpret_p8_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c deleted file mode 100644 index 6a065c6752f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_s16 (void) -{ - poly8x8_t out_poly8x8_t; - int16x4_t arg0_int16x4_t; - - out_poly8x8_t = vreinterpret_p8_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c deleted file mode 100644 index 90a8b77ca82..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_s32 (void) -{ - poly8x8_t out_poly8x8_t; - int32x2_t arg0_int32x2_t; - - out_poly8x8_t = vreinterpret_p8_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c deleted file mode 100644 index 3893ba24e06..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_s64 (void) -{ - poly8x8_t out_poly8x8_t; - int64x1_t arg0_int64x1_t; - - out_poly8x8_t = vreinterpret_p8_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c deleted file mode 100644 index 5fb4c7af6fb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_s8 (void) -{ - poly8x8_t out_poly8x8_t; - int8x8_t arg0_int8x8_t; - - out_poly8x8_t = vreinterpret_p8_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c deleted file mode 100644 index 398470fd1c7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_u16 (void) -{ - poly8x8_t out_poly8x8_t; - uint16x4_t arg0_uint16x4_t; - - out_poly8x8_t = vreinterpret_p8_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c deleted file mode 100644 index f60d7cb134f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_u32 (void) -{ - poly8x8_t out_poly8x8_t; - uint32x2_t arg0_uint32x2_t; - - out_poly8x8_t = vreinterpret_p8_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c deleted file mode 100644 index c874eb7b268..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_u64 (void) -{ - poly8x8_t out_poly8x8_t; - uint64x1_t arg0_uint64x1_t; - - out_poly8x8_t = vreinterpret_p8_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c deleted file mode 100644 index cead64b0469..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretp8_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretp8_u8 (void) -{ - poly8x8_t out_poly8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_poly8x8_t = vreinterpret_p8_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c deleted file mode 100644 index 904fcb67c03..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_f32 (void) -{ - int16x4_t out_int16x4_t; - float32x2_t arg0_float32x2_t; - - out_int16x4_t = vreinterpret_s16_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c deleted file mode 100644 index d03a724572b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_p16 (void) -{ - int16x4_t out_int16x4_t; - poly16x4_t arg0_poly16x4_t; - - out_int16x4_t = vreinterpret_s16_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c deleted file mode 100644 index 87f02b8e0f4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterprets16_p64 (void) -{ - int16x4_t out_int16x4_t; - poly64x1_t arg0_poly64x1_t; - - out_int16x4_t = vreinterpret_s16_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c deleted file mode 100644 index a54b2c893b6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_p8 (void) -{ - int16x4_t out_int16x4_t; - poly8x8_t arg0_poly8x8_t; - - out_int16x4_t = vreinterpret_s16_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c deleted file mode 100644 index c395ad2c48f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_s32 (void) -{ - int16x4_t out_int16x4_t; - int32x2_t arg0_int32x2_t; - - out_int16x4_t = vreinterpret_s16_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c deleted file mode 100644 index 41b75d40b6e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_s64 (void) -{ - int16x4_t out_int16x4_t; - int64x1_t arg0_int64x1_t; - - out_int16x4_t = vreinterpret_s16_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c deleted file mode 100644 index 9746bdad422..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_s8 (void) -{ - int16x4_t out_int16x4_t; - int8x8_t arg0_int8x8_t; - - out_int16x4_t = vreinterpret_s16_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c deleted file mode 100644 index f7bd5222e0c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_u16 (void) -{ - int16x4_t out_int16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_int16x4_t = vreinterpret_s16_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c deleted file mode 100644 index db7ef6bb988..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_u32 (void) -{ - int16x4_t out_int16x4_t; - uint32x2_t arg0_uint32x2_t; - - out_int16x4_t = vreinterpret_s16_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c deleted file mode 100644 index b36ad0e1a3b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_u64 (void) -{ - int16x4_t out_int16x4_t; - uint64x1_t arg0_uint64x1_t; - - out_int16x4_t = vreinterpret_s16_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c deleted file mode 100644 index c5af74d921f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets16_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets16_u8 (void) -{ - int16x4_t out_int16x4_t; - uint8x8_t arg0_uint8x8_t; - - out_int16x4_t = vreinterpret_s16_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c deleted file mode 100644 index 10f41dce2c6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_f32 (void) -{ - int32x2_t out_int32x2_t; - float32x2_t arg0_float32x2_t; - - out_int32x2_t = vreinterpret_s32_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c deleted file mode 100644 index 0f29b7e979e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_p16 (void) -{ - int32x2_t out_int32x2_t; - poly16x4_t arg0_poly16x4_t; - - out_int32x2_t = vreinterpret_s32_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c deleted file mode 100644 index f670990731f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterprets32_p64 (void) -{ - int32x2_t out_int32x2_t; - poly64x1_t arg0_poly64x1_t; - - out_int32x2_t = vreinterpret_s32_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c deleted file mode 100644 index ba216158277..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_p8 (void) -{ - int32x2_t out_int32x2_t; - poly8x8_t arg0_poly8x8_t; - - out_int32x2_t = vreinterpret_s32_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c deleted file mode 100644 index c0142acfb52..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_s16 (void) -{ - int32x2_t out_int32x2_t; - int16x4_t arg0_int16x4_t; - - out_int32x2_t = vreinterpret_s32_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c deleted file mode 100644 index e1499a12368..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_s64 (void) -{ - int32x2_t out_int32x2_t; - int64x1_t arg0_int64x1_t; - - out_int32x2_t = vreinterpret_s32_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c deleted file mode 100644 index 311a708b63c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_s8 (void) -{ - int32x2_t out_int32x2_t; - int8x8_t arg0_int8x8_t; - - out_int32x2_t = vreinterpret_s32_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c deleted file mode 100644 index eaf5eb6bd84..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_u16 (void) -{ - int32x2_t out_int32x2_t; - uint16x4_t arg0_uint16x4_t; - - out_int32x2_t = vreinterpret_s32_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c deleted file mode 100644 index 65ab85882b1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_u32 (void) -{ - int32x2_t out_int32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_int32x2_t = vreinterpret_s32_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c deleted file mode 100644 index 4338d10df8e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_u64 (void) -{ - int32x2_t out_int32x2_t; - uint64x1_t arg0_uint64x1_t; - - out_int32x2_t = vreinterpret_s32_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c deleted file mode 100644 index 74f7899452f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets32_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets32_u8 (void) -{ - int32x2_t out_int32x2_t; - uint8x8_t arg0_uint8x8_t; - - out_int32x2_t = vreinterpret_s32_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c deleted file mode 100644 index 3510bedff34..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_f32 (void) -{ - int64x1_t out_int64x1_t; - float32x2_t arg0_float32x2_t; - - out_int64x1_t = vreinterpret_s64_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c deleted file mode 100644 index e239a96d3ef..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_p16 (void) -{ - int64x1_t out_int64x1_t; - poly16x4_t arg0_poly16x4_t; - - out_int64x1_t = vreinterpret_s64_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c deleted file mode 100644 index d20075c1c67..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterprets64_p64 (void) -{ - int64x1_t out_int64x1_t; - poly64x1_t arg0_poly64x1_t; - - out_int64x1_t = vreinterpret_s64_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c deleted file mode 100644 index 5219607dec7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_p8 (void) -{ - int64x1_t out_int64x1_t; - poly8x8_t arg0_poly8x8_t; - - out_int64x1_t = vreinterpret_s64_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c deleted file mode 100644 index cfcbc7d06d4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_s16 (void) -{ - int64x1_t out_int64x1_t; - int16x4_t arg0_int16x4_t; - - out_int64x1_t = vreinterpret_s64_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c deleted file mode 100644 index 7467413f722..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_s32 (void) -{ - int64x1_t out_int64x1_t; - int32x2_t arg0_int32x2_t; - - out_int64x1_t = vreinterpret_s64_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c deleted file mode 100644 index 5cb98cecf0a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_s8 (void) -{ - int64x1_t out_int64x1_t; - int8x8_t arg0_int8x8_t; - - out_int64x1_t = vreinterpret_s64_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c deleted file mode 100644 index 51351006210..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_u16 (void) -{ - int64x1_t out_int64x1_t; - uint16x4_t arg0_uint16x4_t; - - out_int64x1_t = vreinterpret_s64_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c deleted file mode 100644 index 1536b5bbd42..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_u32 (void) -{ - int64x1_t out_int64x1_t; - uint32x2_t arg0_uint32x2_t; - - out_int64x1_t = vreinterpret_s64_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c deleted file mode 100644 index ae8f71015bd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_u64 (void) -{ - int64x1_t out_int64x1_t; - uint64x1_t arg0_uint64x1_t; - - out_int64x1_t = vreinterpret_s64_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c deleted file mode 100644 index 86eb6fc6864..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets64_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets64_u8 (void) -{ - int64x1_t out_int64x1_t; - uint8x8_t arg0_uint8x8_t; - - out_int64x1_t = vreinterpret_s64_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c deleted file mode 100644 index f582e5e21b2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_f32 (void) -{ - int8x8_t out_int8x8_t; - float32x2_t arg0_float32x2_t; - - out_int8x8_t = vreinterpret_s8_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c deleted file mode 100644 index 99592526bed..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_p16 (void) -{ - int8x8_t out_int8x8_t; - poly16x4_t arg0_poly16x4_t; - - out_int8x8_t = vreinterpret_s8_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c deleted file mode 100644 index c61f6b11cb8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterprets8_p64 (void) -{ - int8x8_t out_int8x8_t; - poly64x1_t arg0_poly64x1_t; - - out_int8x8_t = vreinterpret_s8_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c deleted file mode 100644 index 4b1d366357e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_p8 (void) -{ - int8x8_t out_int8x8_t; - poly8x8_t arg0_poly8x8_t; - - out_int8x8_t = vreinterpret_s8_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c deleted file mode 100644 index 3d797d7eec8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_s16 (void) -{ - int8x8_t out_int8x8_t; - int16x4_t arg0_int16x4_t; - - out_int8x8_t = vreinterpret_s8_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c deleted file mode 100644 index ab9755b729c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_s32 (void) -{ - int8x8_t out_int8x8_t; - int32x2_t arg0_int32x2_t; - - out_int8x8_t = vreinterpret_s8_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c deleted file mode 100644 index 3b56bc6f340..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_s64 (void) -{ - int8x8_t out_int8x8_t; - int64x1_t arg0_int64x1_t; - - out_int8x8_t = vreinterpret_s8_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c deleted file mode 100644 index 4daf4091b45..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_u16 (void) -{ - int8x8_t out_int8x8_t; - uint16x4_t arg0_uint16x4_t; - - out_int8x8_t = vreinterpret_s8_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c deleted file mode 100644 index 2c10e40dbca..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_u32 (void) -{ - int8x8_t out_int8x8_t; - uint32x2_t arg0_uint32x2_t; - - out_int8x8_t = vreinterpret_s8_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c deleted file mode 100644 index 3395f57361d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_u64 (void) -{ - int8x8_t out_int8x8_t; - uint64x1_t arg0_uint64x1_t; - - out_int8x8_t = vreinterpret_s8_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c deleted file mode 100644 index d9b7c58aa17..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterprets8_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterprets8_u8 (void) -{ - int8x8_t out_int8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_int8x8_t = vreinterpret_s8_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c deleted file mode 100644 index 761d6cc1206..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_f32 (void) -{ - uint16x4_t out_uint16x4_t; - float32x2_t arg0_float32x2_t; - - out_uint16x4_t = vreinterpret_u16_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c deleted file mode 100644 index da0604dea3e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_p16 (void) -{ - uint16x4_t out_uint16x4_t; - poly16x4_t arg0_poly16x4_t; - - out_uint16x4_t = vreinterpret_u16_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c deleted file mode 100644 index d7d66651595..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_p64 (void) -{ - uint16x4_t out_uint16x4_t; - poly64x1_t arg0_poly64x1_t; - - out_uint16x4_t = vreinterpret_u16_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c deleted file mode 100644 index 46c87d6db6c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_p8 (void) -{ - uint16x4_t out_uint16x4_t; - poly8x8_t arg0_poly8x8_t; - - out_uint16x4_t = vreinterpret_u16_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c deleted file mode 100644 index 58d46114fd6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_s16 (void) -{ - uint16x4_t out_uint16x4_t; - int16x4_t arg0_int16x4_t; - - out_uint16x4_t = vreinterpret_u16_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c deleted file mode 100644 index e833a2c72b6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_s32 (void) -{ - uint16x4_t out_uint16x4_t; - int32x2_t arg0_int32x2_t; - - out_uint16x4_t = vreinterpret_u16_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c deleted file mode 100644 index 78c964ba638..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_s64 (void) -{ - uint16x4_t out_uint16x4_t; - int64x1_t arg0_int64x1_t; - - out_uint16x4_t = vreinterpret_u16_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c deleted file mode 100644 index 862589df5c6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_s8 (void) -{ - uint16x4_t out_uint16x4_t; - int8x8_t arg0_int8x8_t; - - out_uint16x4_t = vreinterpret_u16_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c deleted file mode 100644 index df8fdbe79dd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_u32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x2_t arg0_uint32x2_t; - - out_uint16x4_t = vreinterpret_u16_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c deleted file mode 100644 index c9b64f630d5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_u64 (void) -{ - uint16x4_t out_uint16x4_t; - uint64x1_t arg0_uint64x1_t; - - out_uint16x4_t = vreinterpret_u16_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c deleted file mode 100644 index 41b9c254e35..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu16_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu16_u8 (void) -{ - uint16x4_t out_uint16x4_t; - uint8x8_t arg0_uint8x8_t; - - out_uint16x4_t = vreinterpret_u16_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c deleted file mode 100644 index c8f91b8af9d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_f32 (void) -{ - uint32x2_t out_uint32x2_t; - float32x2_t arg0_float32x2_t; - - out_uint32x2_t = vreinterpret_u32_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c deleted file mode 100644 index 8cf8f78a6dc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_p16 (void) -{ - uint32x2_t out_uint32x2_t; - poly16x4_t arg0_poly16x4_t; - - out_uint32x2_t = vreinterpret_u32_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c deleted file mode 100644 index f1303d9d363..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_p64 (void) -{ - uint32x2_t out_uint32x2_t; - poly64x1_t arg0_poly64x1_t; - - out_uint32x2_t = vreinterpret_u32_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c deleted file mode 100644 index 5cf6cb0a58a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_p8 (void) -{ - uint32x2_t out_uint32x2_t; - poly8x8_t arg0_poly8x8_t; - - out_uint32x2_t = vreinterpret_u32_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c deleted file mode 100644 index 9a968fe7882..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_s16 (void) -{ - uint32x2_t out_uint32x2_t; - int16x4_t arg0_int16x4_t; - - out_uint32x2_t = vreinterpret_u32_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c deleted file mode 100644 index f9f701f88e6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_s32 (void) -{ - uint32x2_t out_uint32x2_t; - int32x2_t arg0_int32x2_t; - - out_uint32x2_t = vreinterpret_u32_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c deleted file mode 100644 index 4eee1fafa72..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_s64 (void) -{ - uint32x2_t out_uint32x2_t; - int64x1_t arg0_int64x1_t; - - out_uint32x2_t = vreinterpret_u32_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c deleted file mode 100644 index e6afe8b2d74..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_s8 (void) -{ - uint32x2_t out_uint32x2_t; - int8x8_t arg0_int8x8_t; - - out_uint32x2_t = vreinterpret_u32_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c deleted file mode 100644 index a2813b024a8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_u16 (void) -{ - uint32x2_t out_uint32x2_t; - uint16x4_t arg0_uint16x4_t; - - out_uint32x2_t = vreinterpret_u32_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c deleted file mode 100644 index 8de7e2f3553..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_u64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x1_t arg0_uint64x1_t; - - out_uint32x2_t = vreinterpret_u32_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c deleted file mode 100644 index df329a8595f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu32_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu32_u8 (void) -{ - uint32x2_t out_uint32x2_t; - uint8x8_t arg0_uint8x8_t; - - out_uint32x2_t = vreinterpret_u32_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c deleted file mode 100644 index 1da62f48a7e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_f32 (void) -{ - uint64x1_t out_uint64x1_t; - float32x2_t arg0_float32x2_t; - - out_uint64x1_t = vreinterpret_u64_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c deleted file mode 100644 index 9de79868037..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_p16 (void) -{ - uint64x1_t out_uint64x1_t; - poly16x4_t arg0_poly16x4_t; - - out_uint64x1_t = vreinterpret_u64_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c deleted file mode 100644 index 86304b1aac7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_p64 (void) -{ - uint64x1_t out_uint64x1_t; - poly64x1_t arg0_poly64x1_t; - - out_uint64x1_t = vreinterpret_u64_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c deleted file mode 100644 index 6a807f17c89..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_p8 (void) -{ - uint64x1_t out_uint64x1_t; - poly8x8_t arg0_poly8x8_t; - - out_uint64x1_t = vreinterpret_u64_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c deleted file mode 100644 index d752efa92b6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_s16 (void) -{ - uint64x1_t out_uint64x1_t; - int16x4_t arg0_int16x4_t; - - out_uint64x1_t = vreinterpret_u64_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c deleted file mode 100644 index 362a83edc49..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_s32 (void) -{ - uint64x1_t out_uint64x1_t; - int32x2_t arg0_int32x2_t; - - out_uint64x1_t = vreinterpret_u64_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c deleted file mode 100644 index cb19d47427a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_s64 (void) -{ - uint64x1_t out_uint64x1_t; - int64x1_t arg0_int64x1_t; - - out_uint64x1_t = vreinterpret_u64_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c deleted file mode 100644 index d0ff42b32e2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_s8 (void) -{ - uint64x1_t out_uint64x1_t; - int8x8_t arg0_int8x8_t; - - out_uint64x1_t = vreinterpret_u64_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c deleted file mode 100644 index 8d00c392acb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_u16 (void) -{ - uint64x1_t out_uint64x1_t; - uint16x4_t arg0_uint16x4_t; - - out_uint64x1_t = vreinterpret_u64_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c deleted file mode 100644 index e0fb4f2a6b2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_u32 (void) -{ - uint64x1_t out_uint64x1_t; - uint32x2_t arg0_uint32x2_t; - - out_uint64x1_t = vreinterpret_u64_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c deleted file mode 100644 index 27cd5436fdd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu64_u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu64_u8 (void) -{ - uint64x1_t out_uint64x1_t; - uint8x8_t arg0_uint8x8_t; - - out_uint64x1_t = vreinterpret_u64_u8 (arg0_uint8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c deleted file mode 100644 index 8b3d2078e2d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_f32 (void) -{ - uint8x8_t out_uint8x8_t; - float32x2_t arg0_float32x2_t; - - out_uint8x8_t = vreinterpret_u8_f32 (arg0_float32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c deleted file mode 100644 index c98b96310ad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_p16 (void) -{ - uint8x8_t out_uint8x8_t; - poly16x4_t arg0_poly16x4_t; - - out_uint8x8_t = vreinterpret_u8_p16 (arg0_poly16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c deleted file mode 100644 index ecfa9f27b93..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_p64 (void) -{ - uint8x8_t out_uint8x8_t; - poly64x1_t arg0_poly64x1_t; - - out_uint8x8_t = vreinterpret_u8_p64 (arg0_poly64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c deleted file mode 100644 index a666f3b3a25..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_p8 (void) -{ - uint8x8_t out_uint8x8_t; - poly8x8_t arg0_poly8x8_t; - - out_uint8x8_t = vreinterpret_u8_p8 (arg0_poly8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c deleted file mode 100644 index e33579b45ca..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_s16 (void) -{ - uint8x8_t out_uint8x8_t; - int16x4_t arg0_int16x4_t; - - out_uint8x8_t = vreinterpret_u8_s16 (arg0_int16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c deleted file mode 100644 index c5727287702..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_s32 (void) -{ - uint8x8_t out_uint8x8_t; - int32x2_t arg0_int32x2_t; - - out_uint8x8_t = vreinterpret_u8_s32 (arg0_int32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c deleted file mode 100644 index 726b6abe4bc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_s64 (void) -{ - uint8x8_t out_uint8x8_t; - int64x1_t arg0_int64x1_t; - - out_uint8x8_t = vreinterpret_u8_s64 (arg0_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c deleted file mode 100644 index df58c0fb040..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_s8 (void) -{ - uint8x8_t out_uint8x8_t; - int8x8_t arg0_int8x8_t; - - out_uint8x8_t = vreinterpret_u8_s8 (arg0_int8x8_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c deleted file mode 100644 index 00bf9a5b5d1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_u16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x4_t arg0_uint16x4_t; - - out_uint8x8_t = vreinterpret_u8_u16 (arg0_uint16x4_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c deleted file mode 100644 index 8670b08f092..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_u32 (void) -{ - uint8x8_t out_uint8x8_t; - uint32x2_t arg0_uint32x2_t; - - out_uint8x8_t = vreinterpret_u8_u32 (arg0_uint32x2_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c deleted file mode 100644 index 509ece78137..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c +++ /dev/null @@ -1,18 +0,0 @@ -/* Test the `vreinterpretu8_u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vreinterpretu8_u64 (void) -{ - uint8x8_t out_uint8x8_t; - uint64x1_t arg0_uint64x1_t; - - out_uint8x8_t = vreinterpret_u8_u64 (arg0_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c deleted file mode 100644 index b31084fcc47..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev16Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev16Qp8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - - out_poly8x16_t = vrev16q_p8 (arg0_poly8x16_t); -} - -/* { dg-final { scan-assembler "vrev16\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c deleted file mode 100644 index dfb3531cd51..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev16Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev16Qs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vrev16q_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vrev16\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c deleted file mode 100644 index f3b1861d9b1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev16Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev16Qu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vrev16q_u8 (arg0_uint8x16_t); -} - -/* { dg-final { scan-assembler "vrev16\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c deleted file mode 100644 index 6d76ab04177..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev16p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev16p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - - out_poly8x8_t = vrev16_p8 (arg0_poly8x8_t); -} - -/* { dg-final { scan-assembler "vrev16\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c deleted file mode 100644 index f2d79c959c7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev16s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev16s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vrev16_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vrev16\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c deleted file mode 100644 index 9e70e6635f5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev16u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev16u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vrev16_u8 (arg0_uint8x8_t); -} - -/* { dg-final { scan-assembler "vrev16\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c deleted file mode 100644 index 3d24c0a6cc0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32Qp16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16x8_t arg0_poly16x8_t; - - out_poly16x8_t = vrev32q_p16 (arg0_poly16x8_t); -} - -/* { dg-final { scan-assembler "vrev32\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c deleted file mode 100644 index 50bd272d516..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32Qp8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - - out_poly8x16_t = vrev32q_p8 (arg0_poly8x16_t); -} - -/* { dg-final { scan-assembler "vrev32\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c deleted file mode 100644 index c65ae1518c7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32Qs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vrev32q_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vrev32\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c deleted file mode 100644 index 80bfddfeac6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32Qs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vrev32q_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vrev32\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c deleted file mode 100644 index 2974371775e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32Qu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x8_t = vrev32q_u16 (arg0_uint16x8_t); -} - -/* { dg-final { scan-assembler "vrev32\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c deleted file mode 100644 index 0d0beab4e7d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32Qu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vrev32q_u8 (arg0_uint8x16_t); -} - -/* { dg-final { scan-assembler "vrev32\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c deleted file mode 100644 index 65fb8c9bb27..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32p16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16x4_t arg0_poly16x4_t; - - out_poly16x4_t = vrev32_p16 (arg0_poly16x4_t); -} - -/* { dg-final { scan-assembler "vrev32\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c deleted file mode 100644 index f3078195b72..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - - out_poly8x8_t = vrev32_p8 (arg0_poly8x8_t); -} - -/* { dg-final { scan-assembler "vrev32\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c deleted file mode 100644 index 8f8daa69b73..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32s16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vrev32_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vrev32\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c deleted file mode 100644 index da69ab4c6dd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vrev32_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vrev32\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c deleted file mode 100644 index 6798acf55ad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32u16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vrev32_u16 (arg0_uint16x4_t); -} - -/* { dg-final { scan-assembler "vrev32\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c deleted file mode 100644 index 1dce99dde2b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev32u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev32u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vrev32_u8 (arg0_uint8x8_t); -} - -/* { dg-final { scan-assembler "vrev32\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c deleted file mode 100644 index 2db00165b97..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vrev64q_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vrev64\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c deleted file mode 100644 index 1dffde94e78..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qp16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16x8_t arg0_poly16x8_t; - - out_poly16x8_t = vrev64q_p16 (arg0_poly16x8_t); -} - -/* { dg-final { scan-assembler "vrev64\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c deleted file mode 100644 index 37b629b6bbc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qp8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - - out_poly8x16_t = vrev64q_p8 (arg0_poly8x16_t); -} - -/* { dg-final { scan-assembler "vrev64\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c deleted file mode 100644 index 1e37eb2f4c3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vrev64q_s16 (arg0_int16x8_t); -} - -/* { dg-final { scan-assembler "vrev64\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c deleted file mode 100644 index c71a8b9a565..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vrev64q_s32 (arg0_int32x4_t); -} - -/* { dg-final { scan-assembler "vrev64\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c deleted file mode 100644 index f6a6b5a576f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vrev64q_s8 (arg0_int8x16_t); -} - -/* { dg-final { scan-assembler "vrev64\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c deleted file mode 100644 index 94ca3a3f577..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x8_t = vrev64q_u16 (arg0_uint16x8_t); -} - -/* { dg-final { scan-assembler "vrev64\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c deleted file mode 100644 index 0840b3cb31c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vrev64q_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vrev64\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c deleted file mode 100644 index 11177e3d074..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64Qu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vrev64q_u8 (arg0_uint8x16_t); -} - -/* { dg-final { scan-assembler "vrev64\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c deleted file mode 100644 index d2766d469d6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64f32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vrev64_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vrev64\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c deleted file mode 100644 index 359ba0c8398..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64p16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16x4_t arg0_poly16x4_t; - - out_poly16x4_t = vrev64_p16 (arg0_poly16x4_t); -} - -/* { dg-final { scan-assembler "vrev64\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c deleted file mode 100644 index e4621d62211..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - - out_poly8x8_t = vrev64_p8 (arg0_poly8x8_t); -} - -/* { dg-final { scan-assembler "vrev64\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c deleted file mode 100644 index b6d7545d696..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64s16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vrev64_s16 (arg0_int16x4_t); -} - -/* { dg-final { scan-assembler "vrev64\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c deleted file mode 100644 index 8e85e8451c1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64s32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vrev64_s32 (arg0_int32x2_t); -} - -/* { dg-final { scan-assembler "vrev64\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c deleted file mode 100644 index 63b9c196972..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vrev64_s8 (arg0_int8x8_t); -} - -/* { dg-final { scan-assembler "vrev64\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c deleted file mode 100644 index 250ade51dbd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64u16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vrev64_u16 (arg0_uint16x4_t); -} - -/* { dg-final { scan-assembler "vrev64\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c deleted file mode 100644 index 1028ec51057..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64u32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vrev64_u32 (arg0_uint32x2_t); -} - -/* { dg-final { scan-assembler "vrev64\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c deleted file mode 100644 index 4145a593fe1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrev64u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrev64u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vrev64_u8 (arg0_uint8x8_t); -} - -/* { dg-final { scan-assembler "vrev64\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c deleted file mode 100644 index 6bec8fe9fd5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndaf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndaf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vrnda_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vrinta\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c deleted file mode 100644 index a29a71d1433..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndaq_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndaqf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vrndaq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vrinta\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndf32.c deleted file mode 100644 index fa976033140..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vrnd_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vrintz\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c deleted file mode 100644 index 2155224bb29..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndmf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndmf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vrndm_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vrintm\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c deleted file mode 100644 index 3dc0422c8b2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndmq_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndmqf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vrndmq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vrintm\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c deleted file mode 100644 index bd159eb5550..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndnf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndnf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vrndn_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vrintn\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c deleted file mode 100644 index 628488f5075..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndnq_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndnqf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vrndnq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vrintn\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c deleted file mode 100644 index baa2ca9fcd2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndpf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndpf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vrndp_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vrintp\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c deleted file mode 100644 index 5c26956885a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndpq_f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndpqf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vrndpq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vrintp\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c deleted file mode 100644 index 13365c70dac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrndqf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_v8_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_v8_neon } */ - -#include "arm_neon.h" - -void test_vrndqf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vrndq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vrintz\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c deleted file mode 100644 index 1ee3793a8ec..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrsqrteQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrsqrteQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - - out_float32x4_t = vrsqrteq_f32 (arg0_float32x4_t); -} - -/* { dg-final { scan-assembler "vrsqrte\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c deleted file mode 100644 index db9ab2888db..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrsqrteQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrsqrteQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vrsqrteq_u32 (arg0_uint32x4_t); -} - -/* { dg-final { scan-assembler "vrsqrte\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c deleted file mode 100644 index 0abcd7e57ea..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrsqrtef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrsqrtef32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - - out_float32x2_t = vrsqrte_f32 (arg0_float32x2_t); -} - -/* { dg-final { scan-assembler "vrsqrte\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c deleted file mode 100644 index f133dc19867..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vrsqrteu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrsqrteu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vrsqrte_u32 (arg0_uint32x2_t); -} - -/* { dg-final { scan-assembler "vrsqrte\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c deleted file mode 100644 index 8b141c25096..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vrsqrtsQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrsqrtsQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vrsqrtsq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vrsqrts\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c deleted file mode 100644 index c4008473110..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vrsqrtsf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vrsqrtsf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vrsqrts_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vrsqrts\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c deleted file mode 100644 index b7a55122827..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_lanef32 (void) -{ - float32x4_t out_float32x4_t; - float32_t arg0_float32_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vsetq_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c deleted file mode 100644 index 0469323677a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_lanep16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16_t arg0_poly16_t; - poly16x8_t arg1_poly16x8_t; - - out_poly16x8_t = vsetq_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.16\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c deleted file mode 100644 index 90c1c2cc6fb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_lanep8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8_t arg0_poly8_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16_t = vsetq_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.8\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c deleted file mode 100644 index 38cdf11e1a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_lanes16 (void) -{ - int16x8_t out_int16x8_t; - int16_t arg0_int16_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vsetq_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.16\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c deleted file mode 100644 index d4edb56d117..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_lanes32 (void) -{ - int32x4_t out_int32x4_t; - int32_t arg0_int32_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vsetq_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c deleted file mode 100644 index 37bf0b87a49..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_lanes64 (void) -{ - int64x2_t out_int64x2_t; - int64_t arg0_int64_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vsetq_lane_s64 (arg0_int64_t, arg1_int64x2_t, 0); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c deleted file mode 100644 index 5b460859fef..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_lanes8 (void) -{ - int8x16_t out_int8x16_t; - int8_t arg0_int8_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vsetq_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.8\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c deleted file mode 100644 index 6ba92518b86..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_laneu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16_t arg0_uint16_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vsetq_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.16\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c deleted file mode 100644 index 4cb1e9e0da8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_laneu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32_t arg0_uint32_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vsetq_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c deleted file mode 100644 index 9cf4dc0da69..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_laneu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64_t arg0_uint64_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vsetq_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 0); -} - -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c deleted file mode 100644 index 0265d0eb37e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsetQ_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsetQ_laneu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8_t arg0_uint8_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vsetq_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.8\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c deleted file mode 100644 index 4ce2e44e01b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_lanef32 (void) -{ - float32x2_t out_float32x2_t; - float32_t arg0_float32_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vset_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c deleted file mode 100644 index 788ddd76fae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_lanep16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16_t arg0_poly16_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x4_t = vset_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.16\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c deleted file mode 100644 index 5ea5199115e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_lanep8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8_t arg0_poly8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8_t = vset_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.8\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c deleted file mode 100644 index 95a6a90aba9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_lanes16 (void) -{ - int16x4_t out_int16x4_t; - int16_t arg0_int16_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vset_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.16\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c deleted file mode 100644 index 340412b6323..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_lanes32 (void) -{ - int32x2_t out_int32x2_t; - int32_t arg0_int32_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vset_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c deleted file mode 100644 index e137338bec0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vset_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_lanes64 (void) -{ - int64x1_t out_int64x1_t; - int64_t arg0_int64_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c deleted file mode 100644 index b905d9ffd40..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_lanes8 (void) -{ - int8x8_t out_int8x8_t; - int8_t arg0_int8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vset_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.8\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c deleted file mode 100644 index 1ba3682b850..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_laneu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16_t arg0_uint16_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vset_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.16\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c deleted file mode 100644 index 820dd9543e1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_laneu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32_t arg0_uint32_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vset_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.32\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c deleted file mode 100644 index 40c2fadb3a2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vset_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_laneu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64_t arg0_uint64_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c deleted file mode 100644 index f15725fae97..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vset_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vset_laneu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8_t arg0_uint8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vset_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vmov\.8\[ \]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c deleted file mode 100644 index d1843250d35..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshlQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vshlq_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c deleted file mode 100644 index f3f80807479..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshlQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vshlq_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c deleted file mode 100644 index 7f10e0c238d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshlQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - - out_int64x2_t = vshlq_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c deleted file mode 100644 index 18656a1ae58..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshlQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vshlq_n_s8 (arg0_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c deleted file mode 100644 index d4f8f5d4d10..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshlQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x8_t = vshlq_n_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c deleted file mode 100644 index 304ece8393a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshlQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vshlq_n_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c deleted file mode 100644 index 4f3bd4b0ad0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshlQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint64x2_t = vshlq_n_u64 (arg0_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c deleted file mode 100644 index 254eb20e8b7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshlQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vshlq_n_u8 (arg0_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c deleted file mode 100644 index a497786ded1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vshlq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vshl\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c deleted file mode 100644 index 2fee8ff6773..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vshlq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vshl\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c deleted file mode 100644 index 5565b8d8e58..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vshlq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vshl\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c deleted file mode 100644 index f825f29ca21..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vshlq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vshl\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c deleted file mode 100644 index 268d8e49091..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vshl\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c deleted file mode 100644 index 489d6cdccc4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vshl\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c deleted file mode 100644 index 936824c1242..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - int64x2_t arg1_int64x2_t; - - out_uint64x2_t = vshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vshl\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c deleted file mode 100644 index b683eda4cfd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vshl\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c deleted file mode 100644 index 75fac2d713c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshl_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshl_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vshl_n_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c deleted file mode 100644 index 358f6d6e0a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshl_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshl_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vshl_n_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c deleted file mode 100644 index a36aba0326d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshl_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshl_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - - out_int64x1_t = vshl_n_s64 (arg0_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c deleted file mode 100644 index 27454e8d6e0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshl_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshl_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vshl_n_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c deleted file mode 100644 index 27745fa84a8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshl_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshl_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vshl_n_u16 (arg0_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c deleted file mode 100644 index feead558323..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshl_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshl_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vshl_n_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c deleted file mode 100644 index c76fab0f1b0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshl_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshl_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - - out_uint64x1_t = vshl_n_u64 (arg0_uint64x1_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c deleted file mode 100644 index cbf24090d7d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshl_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshl_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vshl_n_u8 (arg0_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vshl\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c deleted file mode 100644 index 2173f834297..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshll_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshll_ns16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - - out_int32x4_t = vshll_n_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vshll\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c deleted file mode 100644 index c9e44d0af9d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshll_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshll_ns32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - - out_int64x2_t = vshll_n_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vshll\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c deleted file mode 100644 index 2c7220a8da0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshll_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshll_ns8 (void) -{ - int16x8_t out_int16x8_t; - int8x8_t arg0_int8x8_t; - - out_int16x8_t = vshll_n_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vshll\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c deleted file mode 100644 index 03eea9ab95e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshll_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshll_nu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint32x4_t = vshll_n_u16 (arg0_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vshll\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c deleted file mode 100644 index 6c162b63dec..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshll_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshll_nu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint64x2_t = vshll_n_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vshll\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c deleted file mode 100644 index 5c1bfcfedc3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshll_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshll_nu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint16x8_t = vshll_n_u8 (arg0_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vshll\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls16.c b/gcc/testsuite/gcc.target/arm/neon/vshls16.c deleted file mode 100644 index b7812ce26d6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshls16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vshl_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vshl\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls32.c b/gcc/testsuite/gcc.target/arm/neon/vshls32.c deleted file mode 100644 index 1d2b849a239..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshls32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vshl_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vshl\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls64.c b/gcc/testsuite/gcc.target/arm/neon/vshls64.c deleted file mode 100644 index 02b3c3633bf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshls64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshls64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshls64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vshl_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vshl\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls8.c b/gcc/testsuite/gcc.target/arm/neon/vshls8.c deleted file mode 100644 index dfe9db46d02..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshls8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vshl_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vshl\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlu16.c deleted file mode 100644 index 2ad9a50cfb8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vshl_u16 (arg0_uint16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vshl\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlu32.c deleted file mode 100644 index dfa55241043..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vshl_u32 (arg0_uint32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vshl\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlu64.c deleted file mode 100644 index 457ae42fd0a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - int64x1_t arg1_int64x1_t; - - out_uint64x1_t = vshl_u64 (arg0_uint64x1_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vshl\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlu8.c deleted file mode 100644 index 6438ed3b76b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshlu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vshlu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshlu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vshl_u8 (arg0_uint8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vshl\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c deleted file mode 100644 index 499ba2d2bd6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - - out_int16x8_t = vshrq_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c deleted file mode 100644 index 1c5341e3c49..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - - out_int32x4_t = vshrq_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c deleted file mode 100644 index ad72b6a37d1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - - out_int64x2_t = vshrq_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c deleted file mode 100644 index ba6efab3af1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - - out_int8x16_t = vshrq_n_s8 (arg0_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c deleted file mode 100644 index 99c566af1d7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint16x8_t = vshrq_n_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c deleted file mode 100644 index 7f51823bb0c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint32x4_t = vshrq_n_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c deleted file mode 100644 index ff5a270db8a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint64x2_t = vshrq_n_u64 (arg0_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c deleted file mode 100644 index 5cde269e298..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - - out_uint8x16_t = vshrq_n_u8 (arg0_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c deleted file mode 100644 index b49a0e66596..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshr_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshr_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - - out_int16x4_t = vshr_n_s16 (arg0_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c deleted file mode 100644 index a5809bf48ee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshr_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshr_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - - out_int32x2_t = vshr_n_s32 (arg0_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c deleted file mode 100644 index 5c6f49387e6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshr_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshr_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - - out_int64x1_t = vshr_n_s64 (arg0_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c deleted file mode 100644 index 1fa24b1dd5e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshr_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshr_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - - out_int8x8_t = vshr_n_s8 (arg0_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c deleted file mode 100644 index 5b8e454e90b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshr_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshr_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - - out_uint16x4_t = vshr_n_u16 (arg0_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c deleted file mode 100644 index 28a7695cc34..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshr_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshr_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - - out_uint32x2_t = vshr_n_u32 (arg0_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c deleted file mode 100644 index 435466b736f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshr_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshr_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - - out_uint64x1_t = vshr_n_u64 (arg0_uint64x1_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c deleted file mode 100644 index 8d67a42f805..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshr_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshr_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - - out_uint8x8_t = vshr_n_u8 (arg0_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vshr\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c deleted file mode 100644 index 6dc485de52f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrn_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrn_ns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - - out_int8x8_t = vshrn_n_s16 (arg0_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vshrn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c deleted file mode 100644 index b7c93363e05..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrn_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrn_ns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - - out_int16x4_t = vshrn_n_s32 (arg0_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vshrn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c deleted file mode 100644 index 7d0156aaadc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrn_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrn_ns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - - out_int32x2_t = vshrn_n_s64 (arg0_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vshrn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c deleted file mode 100644 index 1c8b720ff38..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrn_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrn_nu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - - out_uint8x8_t = vshrn_n_u16 (arg0_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vshrn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c deleted file mode 100644 index 6797a96f05e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrn_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrn_nu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - - out_uint16x4_t = vshrn_n_u32 (arg0_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vshrn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c deleted file mode 100644 index ee66e03ae17..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vshrn_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vshrn_nu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - - out_uint32x2_t = vshrn_n_u64 (arg0_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vshrn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c deleted file mode 100644 index 19cc7a995cf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_np16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_np16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16x8_t arg0_poly16x8_t; - poly16x8_t arg1_poly16x8_t; - - out_poly16x8_t = vsliq_n_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c deleted file mode 100644 index b7ca823d468..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_np64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vsliQ_np64 (void) -{ - poly64x2_t out_poly64x2_t; - poly64x2_t arg0_poly64x2_t; - poly64x2_t arg1_poly64x2_t; - - out_poly64x2_t = vsliq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c deleted file mode 100644 index 52658e385bf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_np8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_np8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16_t = vsliq_n_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c deleted file mode 100644 index 6bf242471a8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vsliq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c deleted file mode 100644 index 8b61de4cf47..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vsliq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c deleted file mode 100644 index 00a3b1a3e2c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vsliq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c deleted file mode 100644 index 7c8cd8d98ae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vsliq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c deleted file mode 100644 index e5df31ebd50..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vsliq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c deleted file mode 100644 index 4e18c83cb36..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vsliq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c deleted file mode 100644 index cf88f6251e9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vsliq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c deleted file mode 100644 index 510a992f323..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsliQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsliQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vsliq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c deleted file mode 100644 index 0b3015b008d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_np16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_np16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16x4_t arg0_poly16x4_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x4_t = vsli_n_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c deleted file mode 100644 index c22a2011995..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_np64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vsli_np64 (void) -{ - poly64x1_t out_poly64x1_t; - poly64x1_t arg0_poly64x1_t; - poly64x1_t arg1_poly64x1_t; - - out_poly64x1_t = vsli_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c deleted file mode 100644 index 4db60731d51..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_np8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_np8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8_t = vsli_n_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c deleted file mode 100644 index c2e7d7e686e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vsli_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c deleted file mode 100644 index 11a10d11071..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vsli_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c deleted file mode 100644 index b062ea80df6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vsli_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c deleted file mode 100644 index d9408ad47b2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vsli_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c deleted file mode 100644 index 5bfb4b0fa22..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vsli_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c deleted file mode 100644 index d91a2bf20bb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vsli_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c deleted file mode 100644 index cc27d52a9a5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vsli_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c deleted file mode 100644 index 937dd91785e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsli_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsli_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vsli_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vsli\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c deleted file mode 100644 index 97e1c4b7643..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsraQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsraQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vsraq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c deleted file mode 100644 index 7d45a3b3393..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsraQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsraQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vsraq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c deleted file mode 100644 index b4069ca65c8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsraQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsraQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vsraq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.s64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c deleted file mode 100644 index a849caefab2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsraQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsraQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vsraq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c deleted file mode 100644 index ed258207581..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsraQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsraQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vsraq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c deleted file mode 100644 index 1be7cff0327..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsraQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsraQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vsraq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c deleted file mode 100644 index 79c4fac3c31..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsraQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsraQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vsraq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.u64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c deleted file mode 100644 index e095fae3889..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsraQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsraQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vsraq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c deleted file mode 100644 index b112bbd3d03..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsra_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsra_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vsra_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.s16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c deleted file mode 100644 index 9ebcf6badb9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsra_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsra_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vsra_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.s32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c deleted file mode 100644 index 132da31dcc0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsra_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsra_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vsra_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.s64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c deleted file mode 100644 index 97f62ae7050..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsra_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsra_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vsra_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.s8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c deleted file mode 100644 index 3dcb487d42d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsra_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsra_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vsra_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.u16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c deleted file mode 100644 index 63dea5e3d26..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsra_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsra_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vsra_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.u32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c deleted file mode 100644 index 2751a68dc23..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsra_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsra_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vsra_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.u64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c deleted file mode 100644 index 49909b6c236..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsra_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsra_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vsra_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vsra\.u8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c deleted file mode 100644 index 8413d0738b1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_np16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_np16 (void) -{ - poly16x8_t out_poly16x8_t; - poly16x8_t arg0_poly16x8_t; - poly16x8_t arg1_poly16x8_t; - - out_poly16x8_t = vsriq_n_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c deleted file mode 100644 index ca3a9f4bd74..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_np64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vsriQ_np64 (void) -{ - poly64x2_t out_poly64x2_t; - poly64x2_t arg0_poly64x2_t; - poly64x2_t arg1_poly64x2_t; - - out_poly64x2_t = vsriq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c deleted file mode 100644 index 1683fe6f045..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_np8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_np8 (void) -{ - poly8x16_t out_poly8x16_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16_t = vsriq_n_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c deleted file mode 100644 index 8e1bcbb3228..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_ns16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vsriq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c deleted file mode 100644 index 41c611cb7f8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_ns32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vsriq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c deleted file mode 100644 index 3a8648a2ad6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_ns64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vsriq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c deleted file mode 100644 index 41457dafeee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_ns8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vsriq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c deleted file mode 100644 index 33f9fa8b35a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_nu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vsriq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c deleted file mode 100644 index 951f28f9914..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_nu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vsriq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c deleted file mode 100644 index ff8e81c6763..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_nu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vsriq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c deleted file mode 100644 index 6cdf11d7f06..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsriQ_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsriQ_nu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vsriq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c deleted file mode 100644 index 9e3fe6bb0ea..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_np16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_np16 (void) -{ - poly16x4_t out_poly16x4_t; - poly16x4_t arg0_poly16x4_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x4_t = vsri_n_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c deleted file mode 100644 index 0734b12a19c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_np64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vsri_np64 (void) -{ - poly64x1_t out_poly64x1_t; - poly64x1_t arg0_poly64x1_t; - poly64x1_t arg1_poly64x1_t; - - out_poly64x1_t = vsri_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c deleted file mode 100644 index fd3d55e87c3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_np8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_np8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8_t = vsri_n_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c deleted file mode 100644 index 4631cbfc2b3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_ns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_ns16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vsri_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c deleted file mode 100644 index 163a3c36284..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_ns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_ns32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vsri_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c deleted file mode 100644 index de2b7cb9890..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_ns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_ns64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vsri_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c deleted file mode 100644 index b9d74b2bdb2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_ns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_ns8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vsri_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c deleted file mode 100644 index f1a7c6b74ee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_nu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_nu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vsri_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c deleted file mode 100644 index 9d67c315e4c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_nu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_nu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vsri_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c deleted file mode 100644 index 4a9da82fed0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_nu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_nu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vsri_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c deleted file mode 100644 index 2536746fa1f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsri_nu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsri_nu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vsri_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vsri\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c deleted file mode 100644 index a05612be315..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_lanef32 (void) -{ - float32_t *arg0_float32_t; - float32x4_t arg1_float32x4_t; - - vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c deleted file mode 100644 index 7b74781edd5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_lanep16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x8_t arg1_poly16x8_t; - - vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c deleted file mode 100644 index 08060d18079..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_lanep64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vst1Q_lanep64 (void) -{ - poly64_t *arg0_poly64_t; - poly64x2_t arg1_poly64x2_t; - - vst1q_lane_p64 (arg0_poly64_t, arg1_poly64x2_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c deleted file mode 100644 index 40181c60500..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_lanep8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x16_t arg1_poly8x16_t; - - vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c deleted file mode 100644 index a4d7d35f855..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_lanes16 (void) -{ - int16_t *arg0_int16_t; - int16x8_t arg1_int16x8_t; - - vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c deleted file mode 100644 index e0d8ec0840d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_lanes32 (void) -{ - int32_t *arg0_int32_t; - int32x4_t arg1_int32x4_t; - - vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c deleted file mode 100644 index 6b82ff4b1f1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_lanes64 (void) -{ - int64_t *arg0_int64_t; - int64x2_t arg1_int64x2_t; - - vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c deleted file mode 100644 index 726689038fd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_lanes8 (void) -{ - int8_t *arg0_int8_t; - int8x16_t arg1_int8x16_t; - - vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c deleted file mode 100644 index 1281976bfd5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_laneu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x8_t arg1_uint16x8_t; - - vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c deleted file mode 100644 index 79b7cbc5223..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_laneu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x4_t arg1_uint32x4_t; - - vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c deleted file mode 100644 index 84d6250871c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_laneu64 (void) -{ - uint64_t *arg0_uint64_t; - uint64x2_t arg1_uint64x2_t; - - vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c deleted file mode 100644 index 578a2f57e9f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Q_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Q_laneu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x16_t arg1_uint8x16_t; - - vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c deleted file mode 100644 index 1d13c924624..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qf32 (void) -{ - float32_t *arg0_float32_t; - float32x4_t arg1_float32x4_t; - - vst1q_f32 (arg0_float32_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c deleted file mode 100644 index 281d8dad965..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qp16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x8_t arg1_poly16x8_t; - - vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c deleted file mode 100644 index 8a4de715a73..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qp64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vst1Qp64 (void) -{ - poly64_t *arg0_poly64_t; - poly64x2_t arg1_poly64x2_t; - - vst1q_p64 (arg0_poly64_t, arg1_poly64x2_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c deleted file mode 100644 index f1e39ec7a68..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qp8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x16_t arg1_poly8x16_t; - - vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c deleted file mode 100644 index 73c1e29a38b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qs16 (void) -{ - int16_t *arg0_int16_t; - int16x8_t arg1_int16x8_t; - - vst1q_s16 (arg0_int16_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c deleted file mode 100644 index 8c7c345cad6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qs32 (void) -{ - int32_t *arg0_int32_t; - int32x4_t arg1_int32x4_t; - - vst1q_s32 (arg0_int32_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c deleted file mode 100644 index ec09003ca11..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qs64 (void) -{ - int64_t *arg0_int64_t; - int64x2_t arg1_int64x2_t; - - vst1q_s64 (arg0_int64_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c deleted file mode 100644 index 5a2d81552cb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qs8 (void) -{ - int8_t *arg0_int8_t; - int8x16_t arg1_int8x16_t; - - vst1q_s8 (arg0_int8_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c deleted file mode 100644 index a129e66ffa3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x8_t arg1_uint16x8_t; - - vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c deleted file mode 100644 index e79ab862c9a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x4_t arg1_uint32x4_t; - - vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c deleted file mode 100644 index c7c088c3caf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qu64 (void) -{ - uint64_t *arg0_uint64_t; - uint64x2_t arg1_uint64x2_t; - - vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c deleted file mode 100644 index b9159a557c1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1Qu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x16_t arg1_uint8x16_t; - - vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c deleted file mode 100644 index edbfe1b022c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_lanef32 (void) -{ - float32_t *arg0_float32_t; - float32x2_t arg1_float32x2_t; - - vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c deleted file mode 100644 index d02a2346f9e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_lanep16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x4_t arg1_poly16x4_t; - - vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c deleted file mode 100644 index 74e4519fa9c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_lanep64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vst1_lanep64 (void) -{ - poly64_t *arg0_poly64_t; - poly64x1_t arg1_poly64x1_t; - - vst1_lane_p64 (arg0_poly64_t, arg1_poly64x1_t, 0); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c deleted file mode 100644 index e161933b046..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_lanep8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x8_t arg1_poly8x8_t; - - vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c deleted file mode 100644 index d12acba6572..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_lanes16 (void) -{ - int16_t *arg0_int16_t; - int16x4_t arg1_int16x4_t; - - vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c deleted file mode 100644 index 5bec5955b82..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_lanes32 (void) -{ - int32_t *arg0_int32_t; - int32x2_t arg1_int32x2_t; - - vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c deleted file mode 100644 index acefe716cce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_lanes64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_lanes64 (void) -{ - int64_t *arg0_int64_t; - int64x1_t arg1_int64x1_t; - - vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c deleted file mode 100644 index d0557ea2589..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_lanes8 (void) -{ - int8_t *arg0_int8_t; - int8x8_t arg1_int8x8_t; - - vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c deleted file mode 100644 index 39357eae8f8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_laneu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x4_t arg1_uint16x4_t; - - vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c deleted file mode 100644 index 8ae372be598..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_laneu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x2_t arg1_uint32x2_t; - - vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c deleted file mode 100644 index 5620876d726..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_laneu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_laneu64 (void) -{ - uint64_t *arg0_uint64_t; - uint64x1_t arg1_uint64x1_t; - - vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c deleted file mode 100644 index 0a1f252edf7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1_laneu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x8_t arg1_uint8x8_t; - - vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c b/gcc/testsuite/gcc.target/arm/neon/vst1f32.c deleted file mode 100644 index 8b9f3f7cb47..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1f32 (void) -{ - float32_t *arg0_float32_t; - float32x2_t arg1_float32x2_t; - - vst1_f32 (arg0_float32_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c b/gcc/testsuite/gcc.target/arm/neon/vst1p16.c deleted file mode 100644 index 4d7b2fa9ccd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1p16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x4_t arg1_poly16x4_t; - - vst1_p16 (arg0_poly16_t, arg1_poly16x4_t); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p64.c b/gcc/testsuite/gcc.target/arm/neon/vst1p64.c deleted file mode 100644 index 9fa82b13eb0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1p64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vst1p64 (void) -{ - poly64_t *arg0_poly64_t; - poly64x1_t arg1_poly64x1_t; - - vst1_p64 (arg0_poly64_t, arg1_poly64x1_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c b/gcc/testsuite/gcc.target/arm/neon/vst1p8.c deleted file mode 100644 index b629bfc5eaa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1p8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x8_t arg1_poly8x8_t; - - vst1_p8 (arg0_poly8_t, arg1_poly8x8_t); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c b/gcc/testsuite/gcc.target/arm/neon/vst1s16.c deleted file mode 100644 index 554763bce3b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1s16 (void) -{ - int16_t *arg0_int16_t; - int16x4_t arg1_int16x4_t; - - vst1_s16 (arg0_int16_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c b/gcc/testsuite/gcc.target/arm/neon/vst1s32.c deleted file mode 100644 index 32614202b96..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1s32 (void) -{ - int32_t *arg0_int32_t; - int32x2_t arg1_int32x2_t; - - vst1_s32 (arg0_int32_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c b/gcc/testsuite/gcc.target/arm/neon/vst1s64.c deleted file mode 100644 index 2dcaf33c330..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1s64 (void) -{ - int64_t *arg0_int64_t; - int64x1_t arg1_int64x1_t; - - vst1_s64 (arg0_int64_t, arg1_int64x1_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c b/gcc/testsuite/gcc.target/arm/neon/vst1s8.c deleted file mode 100644 index f0820f7ec52..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1s8 (void) -{ - int8_t *arg0_int8_t; - int8x8_t arg1_int8x8_t; - - vst1_s8 (arg0_int8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c b/gcc/testsuite/gcc.target/arm/neon/vst1u16.c deleted file mode 100644 index e278f561d00..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1u16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x4_t arg1_uint16x4_t; - - vst1_u16 (arg0_uint16_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c b/gcc/testsuite/gcc.target/arm/neon/vst1u32.c deleted file mode 100644 index 29d5ef2a58e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1u32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x2_t arg1_uint32x2_t; - - vst1_u32 (arg0_uint32_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c b/gcc/testsuite/gcc.target/arm/neon/vst1u64.c deleted file mode 100644 index cde780f8b46..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1u64 (void) -{ - uint64_t *arg0_uint64_t; - uint64x1_t arg1_uint64x1_t; - - vst1_u64 (arg0_uint64_t, arg1_uint64x1_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c b/gcc/testsuite/gcc.target/arm/neon/vst1u8.c deleted file mode 100644 index 897b25726f4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst1u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst1u8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x8_t arg1_uint8x8_t; - - vst1_u8 (arg0_uint8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c deleted file mode 100644 index b99545e6fe7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2Q_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Q_lanef32 (void) -{ - float32_t *arg0_float32_t; - float32x4x2_t arg1_float32x4x2_t; - - vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c deleted file mode 100644 index a252e91de59..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2Q_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Q_lanep16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x8x2_t arg1_poly16x8x2_t; - - vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c deleted file mode 100644 index 19ecbd1d25d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2Q_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Q_lanes16 (void) -{ - int16_t *arg0_int16_t; - int16x8x2_t arg1_int16x8x2_t; - - vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c deleted file mode 100644 index 6a7d4f263c3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2Q_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Q_lanes32 (void) -{ - int32_t *arg0_int32_t; - int32x4x2_t arg1_int32x4x2_t; - - vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c deleted file mode 100644 index 8559b6a048d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2Q_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Q_laneu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x8x2_t arg1_uint16x8x2_t; - - vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c deleted file mode 100644 index 016eaee099b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2Q_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Q_laneu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x4x2_t arg1_uint32x4x2_t; - - vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c deleted file mode 100644 index 1717a3ae991..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qf32 (void) -{ - float32_t *arg0_float32_t; - float32x4x2_t arg1_float32x4x2_t; - - vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c deleted file mode 100644 index 2ab88bf7ed7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qp16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x8x2_t arg1_poly16x8x2_t; - - vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c deleted file mode 100644 index feab9508943..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qp8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x16x2_t arg1_poly8x16x2_t; - - vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c deleted file mode 100644 index 294cb218c2f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qs16 (void) -{ - int16_t *arg0_int16_t; - int16x8x2_t arg1_int16x8x2_t; - - vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c deleted file mode 100644 index 9c1bb52a63d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qs32 (void) -{ - int32_t *arg0_int32_t; - int32x4x2_t arg1_int32x4x2_t; - - vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c deleted file mode 100644 index d473ed224a1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qs8 (void) -{ - int8_t *arg0_int8_t; - int8x16x2_t arg1_int8x16x2_t; - - vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c deleted file mode 100644 index d74e55d685e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x8x2_t arg1_uint16x8x2_t; - - vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c deleted file mode 100644 index d669db27bb4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x4x2_t arg1_uint32x4x2_t; - - vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c deleted file mode 100644 index 82065a056c0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst2Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2Qu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x16x2_t arg1_uint8x16x2_t; - - vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c deleted file mode 100644 index 69d381ca1ae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_lanef32 (void) -{ - float32_t *arg0_float32_t; - float32x2x2_t arg1_float32x2x2_t; - - vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c deleted file mode 100644 index 83fc0fcc55e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_lanep16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x4x2_t arg1_poly16x4x2_t; - - vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c deleted file mode 100644 index ec22388681b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_lanep8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x8x2_t arg1_poly8x8x2_t; - - vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c deleted file mode 100644 index 881fbdd790a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_lanes16 (void) -{ - int16_t *arg0_int16_t; - int16x4x2_t arg1_int16x4x2_t; - - vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c deleted file mode 100644 index bc928e6cd80..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_lanes32 (void) -{ - int32_t *arg0_int32_t; - int32x2x2_t arg1_int32x2x2_t; - - vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c deleted file mode 100644 index 0a05595c331..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_lanes8 (void) -{ - int8_t *arg0_int8_t; - int8x8x2_t arg1_int8x8x2_t; - - vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c deleted file mode 100644 index b1af8efc545..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_laneu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x4x2_t arg1_uint16x4x2_t; - - vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c deleted file mode 100644 index ed03bb43e67..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_laneu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x2x2_t arg1_uint32x2x2_t; - - vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c deleted file mode 100644 index c6c9e147980..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2_laneu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x8x2_t arg1_uint8x8x2_t; - - vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c b/gcc/testsuite/gcc.target/arm/neon/vst2f32.c deleted file mode 100644 index e96f78a80b3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2f32 (void) -{ - float32_t *arg0_float32_t; - float32x2x2_t arg1_float32x2x2_t; - - vst2_f32 (arg0_float32_t, arg1_float32x2x2_t); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c b/gcc/testsuite/gcc.target/arm/neon/vst2p16.c deleted file mode 100644 index b5af7c6ef62..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2p16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x4x2_t arg1_poly16x4x2_t; - - vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p64.c b/gcc/testsuite/gcc.target/arm/neon/vst2p64.c deleted file mode 100644 index adb0f7058a4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2p64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vst2p64 (void) -{ - poly64_t *arg0_poly64_t; - poly64x1x2_t arg1_poly64x1x2_t; - - vst2_p64 (arg0_poly64_t, arg1_poly64x1x2_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c b/gcc/testsuite/gcc.target/arm/neon/vst2p8.c deleted file mode 100644 index 5dee0198db4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2p8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x8x2_t arg1_poly8x8x2_t; - - vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c b/gcc/testsuite/gcc.target/arm/neon/vst2s16.c deleted file mode 100644 index f640c13879c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2s16 (void) -{ - int16_t *arg0_int16_t; - int16x4x2_t arg1_int16x4x2_t; - - vst2_s16 (arg0_int16_t, arg1_int16x4x2_t); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c b/gcc/testsuite/gcc.target/arm/neon/vst2s32.c deleted file mode 100644 index b2f6ea12dcd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2s32 (void) -{ - int32_t *arg0_int32_t; - int32x2x2_t arg1_int32x2x2_t; - - vst2_s32 (arg0_int32_t, arg1_int32x2x2_t); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c b/gcc/testsuite/gcc.target/arm/neon/vst2s64.c deleted file mode 100644 index c88de13c0f4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2s64 (void) -{ - int64_t *arg0_int64_t; - int64x1x2_t arg1_int64x1x2_t; - - vst2_s64 (arg0_int64_t, arg1_int64x1x2_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c b/gcc/testsuite/gcc.target/arm/neon/vst2s8.c deleted file mode 100644 index 8b7b28da22e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2s8 (void) -{ - int8_t *arg0_int8_t; - int8x8x2_t arg1_int8x8x2_t; - - vst2_s8 (arg0_int8_t, arg1_int8x8x2_t); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c b/gcc/testsuite/gcc.target/arm/neon/vst2u16.c deleted file mode 100644 index 9a93b6d1608..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2u16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x4x2_t arg1_uint16x4x2_t; - - vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t); -} - -/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c b/gcc/testsuite/gcc.target/arm/neon/vst2u32.c deleted file mode 100644 index 1c8a79dda96..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2u32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x2x2_t arg1_uint32x2x2_t; - - vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t); -} - -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c b/gcc/testsuite/gcc.target/arm/neon/vst2u64.c deleted file mode 100644 index 7f1539ff721..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2u64 (void) -{ - uint64_t *arg0_uint64_t; - uint64x1x2_t arg1_uint64x1x2_t; - - vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c b/gcc/testsuite/gcc.target/arm/neon/vst2u8.c deleted file mode 100644 index e076239092f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst2u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst2u8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x8x2_t arg1_uint8x8x2_t; - - vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t); -} - -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c deleted file mode 100644 index 1bd77ccbf6c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3Q_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Q_lanef32 (void) -{ - float32_t *arg0_float32_t; - float32x4x3_t arg1_float32x4x3_t; - - vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c deleted file mode 100644 index 46266317cb6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3Q_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Q_lanep16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x8x3_t arg1_poly16x8x3_t; - - vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c deleted file mode 100644 index 92c46b12df0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3Q_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Q_lanes16 (void) -{ - int16_t *arg0_int16_t; - int16x8x3_t arg1_int16x8x3_t; - - vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c deleted file mode 100644 index 55190b3967f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3Q_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Q_lanes32 (void) -{ - int32_t *arg0_int32_t; - int32x4x3_t arg1_int32x4x3_t; - - vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c deleted file mode 100644 index f7a455b82c4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3Q_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Q_laneu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x8x3_t arg1_uint16x8x3_t; - - vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c deleted file mode 100644 index c91ca469f41..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3Q_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Q_laneu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x4x3_t arg1_uint32x4x3_t; - - vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c deleted file mode 100644 index 2b709969cd2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qf32 (void) -{ - float32_t *arg0_float32_t; - float32x4x3_t arg1_float32x4x3_t; - - vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c deleted file mode 100644 index 969120f9f11..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qp16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x8x3_t arg1_poly16x8x3_t; - - vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c deleted file mode 100644 index 6f896176499..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qp8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x16x3_t arg1_poly8x16x3_t; - - vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c deleted file mode 100644 index 872c203369d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qs16 (void) -{ - int16_t *arg0_int16_t; - int16x8x3_t arg1_int16x8x3_t; - - vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c deleted file mode 100644 index 40408097126..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qs32 (void) -{ - int32_t *arg0_int32_t; - int32x4x3_t arg1_int32x4x3_t; - - vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c deleted file mode 100644 index ff0d713ef27..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qs8 (void) -{ - int8_t *arg0_int8_t; - int8x16x3_t arg1_int8x16x3_t; - - vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c deleted file mode 100644 index 4e45ec9edda..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x8x3_t arg1_uint16x8x3_t; - - vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c deleted file mode 100644 index b1bbdc1615d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x4x3_t arg1_uint32x4x3_t; - - vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c deleted file mode 100644 index ccd3b051729..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst3Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3Qu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x16x3_t arg1_uint8x16x3_t; - - vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c deleted file mode 100644 index 820f19650bb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_lanef32 (void) -{ - float32_t *arg0_float32_t; - float32x2x3_t arg1_float32x2x3_t; - - vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c deleted file mode 100644 index c7db5b621b4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_lanep16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x4x3_t arg1_poly16x4x3_t; - - vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c deleted file mode 100644 index 5732440bbf2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_lanep8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x8x3_t arg1_poly8x8x3_t; - - vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c deleted file mode 100644 index 364f1c41db1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_lanes16 (void) -{ - int16_t *arg0_int16_t; - int16x4x3_t arg1_int16x4x3_t; - - vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c deleted file mode 100644 index d48c58224d6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_lanes32 (void) -{ - int32_t *arg0_int32_t; - int32x2x3_t arg1_int32x2x3_t; - - vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c deleted file mode 100644 index 9bee542149f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_lanes8 (void) -{ - int8_t *arg0_int8_t; - int8x8x3_t arg1_int8x8x3_t; - - vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c deleted file mode 100644 index c5460d20f78..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_laneu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x4x3_t arg1_uint16x4x3_t; - - vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c deleted file mode 100644 index 1180d1dd27f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_laneu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x2x3_t arg1_uint32x2x3_t; - - vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c deleted file mode 100644 index 006877f908c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3_laneu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x8x3_t arg1_uint8x8x3_t; - - vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c b/gcc/testsuite/gcc.target/arm/neon/vst3f32.c deleted file mode 100644 index dcca5384324..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3f32 (void) -{ - float32_t *arg0_float32_t; - float32x2x3_t arg1_float32x2x3_t; - - vst3_f32 (arg0_float32_t, arg1_float32x2x3_t); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c b/gcc/testsuite/gcc.target/arm/neon/vst3p16.c deleted file mode 100644 index 769bddb3b7f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3p16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x4x3_t arg1_poly16x4x3_t; - - vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p64.c b/gcc/testsuite/gcc.target/arm/neon/vst3p64.c deleted file mode 100644 index d0f249c00ee..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3p64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vst3p64 (void) -{ - poly64_t *arg0_poly64_t; - poly64x1x3_t arg1_poly64x1x3_t; - - vst3_p64 (arg0_poly64_t, arg1_poly64x1x3_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c b/gcc/testsuite/gcc.target/arm/neon/vst3p8.c deleted file mode 100644 index cfdb74c755d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3p8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x8x3_t arg1_poly8x8x3_t; - - vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c b/gcc/testsuite/gcc.target/arm/neon/vst3s16.c deleted file mode 100644 index e4e030326b5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3s16 (void) -{ - int16_t *arg0_int16_t; - int16x4x3_t arg1_int16x4x3_t; - - vst3_s16 (arg0_int16_t, arg1_int16x4x3_t); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c b/gcc/testsuite/gcc.target/arm/neon/vst3s32.c deleted file mode 100644 index 11389c58af2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3s32 (void) -{ - int32_t *arg0_int32_t; - int32x2x3_t arg1_int32x2x3_t; - - vst3_s32 (arg0_int32_t, arg1_int32x2x3_t); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c b/gcc/testsuite/gcc.target/arm/neon/vst3s64.c deleted file mode 100644 index 79b5fca8dbe..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3s64 (void) -{ - int64_t *arg0_int64_t; - int64x1x3_t arg1_int64x1x3_t; - - vst3_s64 (arg0_int64_t, arg1_int64x1x3_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c b/gcc/testsuite/gcc.target/arm/neon/vst3s8.c deleted file mode 100644 index 7943f53e730..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3s8 (void) -{ - int8_t *arg0_int8_t; - int8x8x3_t arg1_int8x8x3_t; - - vst3_s8 (arg0_int8_t, arg1_int8x8x3_t); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c b/gcc/testsuite/gcc.target/arm/neon/vst3u16.c deleted file mode 100644 index 73a0fa0ed8c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3u16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x4x3_t arg1_uint16x4x3_t; - - vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t); -} - -/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c b/gcc/testsuite/gcc.target/arm/neon/vst3u32.c deleted file mode 100644 index 902099bfed3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3u32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x2x3_t arg1_uint32x2x3_t; - - vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t); -} - -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c b/gcc/testsuite/gcc.target/arm/neon/vst3u64.c deleted file mode 100644 index 49cbd32cd04..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3u64 (void) -{ - uint64_t *arg0_uint64_t; - uint64x1x3_t arg1_uint64x1x3_t; - - vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c b/gcc/testsuite/gcc.target/arm/neon/vst3u8.c deleted file mode 100644 index 29038777af0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst3u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst3u8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x8x3_t arg1_uint8x8x3_t; - - vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t); -} - -/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c deleted file mode 100644 index 40ef7245701..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4Q_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Q_lanef32 (void) -{ - float32_t *arg0_float32_t; - float32x4x4_t arg1_float32x4x4_t; - - vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c deleted file mode 100644 index 374dcf17ca7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4Q_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Q_lanep16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x8x4_t arg1_poly16x8x4_t; - - vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c deleted file mode 100644 index 2867706f68a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4Q_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Q_lanes16 (void) -{ - int16_t *arg0_int16_t; - int16x8x4_t arg1_int16x8x4_t; - - vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c deleted file mode 100644 index 375535d9a1c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4Q_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Q_lanes32 (void) -{ - int32_t *arg0_int32_t; - int32x4x4_t arg1_int32x4x4_t; - - vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c deleted file mode 100644 index 147a62a97c2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4Q_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Q_laneu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x8x4_t arg1_uint16x8x4_t; - - vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c deleted file mode 100644 index 7974114f0a7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4Q_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Q_laneu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x4x4_t arg1_uint32x4x4_t; - - vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c deleted file mode 100644 index 77f1a522c9b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qf32 (void) -{ - float32_t *arg0_float32_t; - float32x4x4_t arg1_float32x4x4_t; - - vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c deleted file mode 100644 index 20c8a4cd4a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qp16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x8x4_t arg1_poly16x8x4_t; - - vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c deleted file mode 100644 index ac018960137..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qp8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x16x4_t arg1_poly8x16x4_t; - - vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c deleted file mode 100644 index 43a3d642bf3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qs16 (void) -{ - int16_t *arg0_int16_t; - int16x8x4_t arg1_int16x8x4_t; - - vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c deleted file mode 100644 index 1603e94925a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qs32 (void) -{ - int32_t *arg0_int32_t; - int32x4x4_t arg1_int32x4x4_t; - - vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c deleted file mode 100644 index b5fe67296d8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qs8 (void) -{ - int8_t *arg0_int8_t; - int8x16x4_t arg1_int8x16x4_t; - - vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c deleted file mode 100644 index d5edab60709..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x8x4_t arg1_uint16x8x4_t; - - vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c deleted file mode 100644 index c47da4fae62..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x4x4_t arg1_uint32x4x4_t; - - vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c deleted file mode 100644 index 4ee346043f3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vst4Qu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4Qu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x16x4_t arg1_uint8x16x4_t; - - vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c deleted file mode 100644 index 15fb232fdb4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_lanef32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_lanef32 (void) -{ - float32_t *arg0_float32_t; - float32x2x4_t arg1_float32x2x4_t; - - vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c deleted file mode 100644 index 2c6d372608a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_lanep16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_lanep16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x4x4_t arg1_poly16x4x4_t; - - vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c deleted file mode 100644 index 088dec9bacf..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_lanep8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_lanep8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x8x4_t arg1_poly8x8x4_t; - - vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c deleted file mode 100644 index c5d5868b67d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_lanes16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_lanes16 (void) -{ - int16_t *arg0_int16_t; - int16x4x4_t arg1_int16x4x4_t; - - vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c deleted file mode 100644 index 7a2655d2dc1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_lanes32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_lanes32 (void) -{ - int32_t *arg0_int32_t; - int32x2x4_t arg1_int32x2x4_t; - - vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c deleted file mode 100644 index 10940449226..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_lanes8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_lanes8 (void) -{ - int8_t *arg0_int8_t; - int8x8x4_t arg1_int8x8x4_t; - - vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c deleted file mode 100644 index 8597c416c8c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_laneu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_laneu16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x4x4_t arg1_uint16x4x4_t; - - vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c deleted file mode 100644 index e911fffd6de..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_laneu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_laneu32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x2x4_t arg1_uint32x2x4_t; - - vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c deleted file mode 100644 index 0f8c131e060..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4_laneu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4_laneu8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x8x4_t arg1_uint8x8x4_t; - - vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c b/gcc/testsuite/gcc.target/arm/neon/vst4f32.c deleted file mode 100644 index bf061b43d33..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4f32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4f32 (void) -{ - float32_t *arg0_float32_t; - float32x2x4_t arg1_float32x2x4_t; - - vst4_f32 (arg0_float32_t, arg1_float32x2x4_t); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c b/gcc/testsuite/gcc.target/arm/neon/vst4p16.c deleted file mode 100644 index 0877c3addae..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4p16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4p16 (void) -{ - poly16_t *arg0_poly16_t; - poly16x4x4_t arg1_poly16x4x4_t; - - vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p64.c b/gcc/testsuite/gcc.target/arm/neon/vst4p64.c deleted file mode 100644 index 020bb42024d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4p64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4p64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_crypto_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_crypto } */ - -#include "arm_neon.h" - -void test_vst4p64 (void) -{ - poly64_t *arg0_poly64_t; - poly64x1x4_t arg1_poly64x1x4_t; - - vst4_p64 (arg0_poly64_t, arg1_poly64x1x4_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c b/gcc/testsuite/gcc.target/arm/neon/vst4p8.c deleted file mode 100644 index 371705e8340..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4p8 (void) -{ - poly8_t *arg0_poly8_t; - poly8x8x4_t arg1_poly8x8x4_t; - - vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c b/gcc/testsuite/gcc.target/arm/neon/vst4s16.c deleted file mode 100644 index 112073c7b53..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4s16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4s16 (void) -{ - int16_t *arg0_int16_t; - int16x4x4_t arg1_int16x4x4_t; - - vst4_s16 (arg0_int16_t, arg1_int16x4x4_t); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c b/gcc/testsuite/gcc.target/arm/neon/vst4s32.c deleted file mode 100644 index 4e2cbf2d108..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4s32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4s32 (void) -{ - int32_t *arg0_int32_t; - int32x2x4_t arg1_int32x2x4_t; - - vst4_s32 (arg0_int32_t, arg1_int32x2x4_t); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c b/gcc/testsuite/gcc.target/arm/neon/vst4s64.c deleted file mode 100644 index b1a839afe88..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4s64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4s64 (void) -{ - int64_t *arg0_int64_t; - int64x1x4_t arg1_int64x1x4_t; - - vst4_s64 (arg0_int64_t, arg1_int64x1x4_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c b/gcc/testsuite/gcc.target/arm/neon/vst4s8.c deleted file mode 100644 index 9d02dba868f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4s8 (void) -{ - int8_t *arg0_int8_t; - int8x8x4_t arg1_int8x8x4_t; - - vst4_s8 (arg0_int8_t, arg1_int8x8x4_t); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c b/gcc/testsuite/gcc.target/arm/neon/vst4u16.c deleted file mode 100644 index 434aacbbb0b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4u16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4u16 (void) -{ - uint16_t *arg0_uint16_t; - uint16x4x4_t arg1_uint16x4x4_t; - - vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t); -} - -/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c b/gcc/testsuite/gcc.target/arm/neon/vst4u32.c deleted file mode 100644 index 4e234d7d640..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4u32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4u32 (void) -{ - uint32_t *arg0_uint32_t; - uint32x2x4_t arg1_uint32x2x4_t; - - vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t); -} - -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c b/gcc/testsuite/gcc.target/arm/neon/vst4u64.c deleted file mode 100644 index 225fe7d052c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4u64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4u64 (void) -{ - uint64_t *arg0_uint64_t; - uint64x1x4_t arg1_uint64x1x4_t; - - vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t); -} - -/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c b/gcc/testsuite/gcc.target/arm/neon/vst4u8.c deleted file mode 100644 index e19cb6d4f94..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vst4u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vst4u8 (void) -{ - uint8_t *arg0_uint8_t; - uint8x8x4_t arg1_uint8x8x4_t; - - vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t); -} - -/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c deleted file mode 100644 index 903b43c95ad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQf32 (void) -{ - float32x4_t out_float32x4_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4_t = vsubq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vsub\.f32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c deleted file mode 100644 index 553c9a9d55b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQs16 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8_t = vsubq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vsub\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c deleted file mode 100644 index c59d4a055c5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQs32 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4_t = vsubq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vsub\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c deleted file mode 100644 index c2034c17a33..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQs64 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int64x2_t = vsubq_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vsub\.i64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c deleted file mode 100644 index 2b084270e1f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQs8 (void) -{ - int8x16_t out_int8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16_t = vsubq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vsub\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c deleted file mode 100644 index e15ecae5efb..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vsub\.i16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c deleted file mode 100644 index 3836901e668..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vsub\.i32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c deleted file mode 100644 index e403652379b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQu64 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint64x2_t = vsubq_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vsub\.i64\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c deleted file mode 100644 index 4290f48c967..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vsub\.i8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubf32.c b/gcc/testsuite/gcc.target/arm/neon/vsubf32.c deleted file mode 100644 index 4f2f3be07d4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubf32 (void) -{ - float32x2_t out_float32x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2_t = vsub_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vsub\.f32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c deleted file mode 100644 index 2721297a463..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubhns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubhns16 (void) -{ - int8x8_t out_int8x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int8x8_t = vsubhn_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vsubhn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c deleted file mode 100644 index 40d4ffd614d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubhns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubhns32 (void) -{ - int16x4_t out_int16x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int16x4_t = vsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vsubhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c deleted file mode 100644 index de5b43122a3..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubhns64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubhns64 (void) -{ - int32x2_t out_int32x2_t; - int64x2_t arg0_int64x2_t; - int64x2_t arg1_int64x2_t; - - out_int32x2_t = vsubhn_s64 (arg0_int64x2_t, arg1_int64x2_t); -} - -/* { dg-final { scan-assembler "vsubhn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c deleted file mode 100644 index 86ca09a6475..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubhnu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubhnu16 (void) -{ - uint8x8_t out_uint8x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint8x8_t = vsubhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vsubhn\.i16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c deleted file mode 100644 index 7b99f513d8b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubhnu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubhnu32 (void) -{ - uint16x4_t out_uint16x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint16x4_t = vsubhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vsubhn\.i32\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c deleted file mode 100644 index 0198b1e7b73..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubhnu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubhnu64 (void) -{ - uint32x2_t out_uint32x2_t; - uint64x2_t arg0_uint64x2_t; - uint64x2_t arg1_uint64x2_t; - - out_uint32x2_t = vsubhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t); -} - -/* { dg-final { scan-assembler "vsubhn\.i64\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls16.c b/gcc/testsuite/gcc.target/arm/neon/vsubls16.c deleted file mode 100644 index 754d1d1406d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubls16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubls16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubls16 (void) -{ - int32x4_t out_int32x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vsubl_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vsubl\.s16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls32.c b/gcc/testsuite/gcc.target/arm/neon/vsubls32.c deleted file mode 100644 index 183e61f3141..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubls32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubls32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubls32 (void) -{ - int64x2_t out_int64x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vsubl_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vsubl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls8.c b/gcc/testsuite/gcc.target/arm/neon/vsubls8.c deleted file mode 100644 index 1f9e9390229..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubls8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubls8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubls8 (void) -{ - int16x8_t out_int16x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int16x8_t = vsubl_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vsubl\.s8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu16.c b/gcc/testsuite/gcc.target/arm/neon/vsublu16.c deleted file mode 100644 index 51afdb42c0a..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsublu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsublu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsublu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint32x4_t = vsubl_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vsubl\.u16\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu32.c b/gcc/testsuite/gcc.target/arm/neon/vsublu32.c deleted file mode 100644 index 459f31af0a7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsublu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsublu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsublu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint64x2_t = vsubl_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vsubl\.u32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu8.c b/gcc/testsuite/gcc.target/arm/neon/vsublu8.c deleted file mode 100644 index 5db43195f7c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsublu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsublu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsublu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint16x8_t = vsubl_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vsubl\.u8\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vsubs16.c deleted file mode 100644 index 89618e8b00d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubs16 (void) -{ - int16x4_t out_int16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4_t = vsub_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vsub\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vsubs32.c deleted file mode 100644 index bbe713c5944..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubs32 (void) -{ - int32x2_t out_int32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2_t = vsub_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vsub\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs64.c b/gcc/testsuite/gcc.target/arm/neon/vsubs64.c deleted file mode 100644 index 46694c9dbac..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubs64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vsubs64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubs64 (void) -{ - int64x1_t out_int64x1_t; - int64x1_t arg0_int64x1_t; - int64x1_t arg1_int64x1_t; - - out_int64x1_t = vsub_s64 (arg0_int64x1_t, arg1_int64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vsubs8.c deleted file mode 100644 index 75d990fd724..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubs8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vsub_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vsub\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubu16.c deleted file mode 100644 index 2262e390d7d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vsub\.i16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubu32.c deleted file mode 100644 index 4b651ba56f8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vsub\.i32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubu64.c deleted file mode 100644 index 55581f1a546..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubu64.c +++ /dev/null @@ -1,19 +0,0 @@ -/* Test the `vsubu64' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubu64 (void) -{ - uint64x1_t out_uint64x1_t; - uint64x1_t arg0_uint64x1_t; - uint64x1_t arg1_uint64x1_t; - - out_uint64x1_t = vsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t); -} - diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubu8.c deleted file mode 100644 index e293de22c92..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vsub\.i8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws16.c b/gcc/testsuite/gcc.target/arm/neon/vsubws16.c deleted file mode 100644 index 8eab8afbe89..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubws16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubws16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubws16 (void) -{ - int32x4_t out_int32x4_t; - int32x4_t arg0_int32x4_t; - int16x4_t arg1_int16x4_t; - - out_int32x4_t = vsubw_s16 (arg0_int32x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vsubw\.s16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws32.c b/gcc/testsuite/gcc.target/arm/neon/vsubws32.c deleted file mode 100644 index 514ec751bce..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubws32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubws32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubws32 (void) -{ - int64x2_t out_int64x2_t; - int64x2_t arg0_int64x2_t; - int32x2_t arg1_int32x2_t; - - out_int64x2_t = vsubw_s32 (arg0_int64x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vsubw\.s32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws8.c b/gcc/testsuite/gcc.target/arm/neon/vsubws8.c deleted file mode 100644 index 86a0ecff692..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubws8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubws8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubws8 (void) -{ - int16x8_t out_int16x8_t; - int16x8_t arg0_int16x8_t; - int8x8_t arg1_int8x8_t; - - out_int16x8_t = vsubw_s8 (arg0_int16x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vsubw\.s8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c deleted file mode 100644 index 7c48f406b16..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubwu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubwu16 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint32x4_t = vsubw_u16 (arg0_uint32x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vsubw\.u16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c deleted file mode 100644 index 3137ec61efd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubwu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubwu32 (void) -{ - uint64x2_t out_uint64x2_t; - uint64x2_t arg0_uint64x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint64x2_t = vsubw_u32 (arg0_uint64x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vsubw\.u32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c deleted file mode 100644 index 7e40d00f767..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vsubwu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vsubwu8 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint16x8_t = vsubw_u8 (arg0_uint16x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vsubw\.u8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c deleted file mode 100644 index 52127aee621..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl1p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl1p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_poly8x8_t = vtbl1_p8 (arg0_poly8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c deleted file mode 100644 index a155244a538..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl1s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl1s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vtbl1_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c deleted file mode 100644 index 5a71ed717d1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl1u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl1u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vtbl1_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c deleted file mode 100644 index e367dbe9b02..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl2p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl2p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8x2_t arg0_poly8x8x2_t; - uint8x8_t arg1_uint8x8_t; - - out_poly8x8_t = vtbl2_p8 (arg0_poly8x8x2_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c deleted file mode 100644 index 5cf2224f0d4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl2s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl2s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8x2_t arg0_int8x8x2_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vtbl2_s8 (arg0_int8x8x2_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c deleted file mode 100644 index 680e93047f0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl2u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl2u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8x2_t arg0_uint8x8x2_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vtbl2_u8 (arg0_uint8x8x2_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c deleted file mode 100644 index 2a534d03c66..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl3p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl3p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8x3_t arg0_poly8x8x3_t; - uint8x8_t arg1_uint8x8_t; - - out_poly8x8_t = vtbl3_p8 (arg0_poly8x8x3_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c deleted file mode 100644 index aaa91365ce2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl3s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl3s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8x3_t arg0_int8x8x3_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vtbl3_s8 (arg0_int8x8x3_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c deleted file mode 100644 index 7edd405882b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl3u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl3u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8x3_t arg0_uint8x8x3_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vtbl3_u8 (arg0_uint8x8x3_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c deleted file mode 100644 index e1469faf5d0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl4p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl4p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8x4_t arg0_poly8x8x4_t; - uint8x8_t arg1_uint8x8_t; - - out_poly8x8_t = vtbl4_p8 (arg0_poly8x8x4_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c deleted file mode 100644 index 5bb966bb5ba..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl4s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl4s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8x4_t arg0_int8x8x4_t; - int8x8_t arg1_int8x8_t; - - out_int8x8_t = vtbl4_s8 (arg0_int8x8x4_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c deleted file mode 100644 index 6b3d914db5e..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtbl4u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbl4u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8x4_t arg0_uint8x8x4_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vtbl4_u8 (arg0_uint8x8x4_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbl\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c deleted file mode 100644 index abac2528031..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx1p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx1p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_poly8x8_t = vtbx1_p8 (arg0_poly8x8_t, arg1_poly8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c deleted file mode 100644 index 93ee371a0f5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx1s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx1s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - int8x8_t arg2_int8x8_t; - - out_int8x8_t = vtbx1_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c deleted file mode 100644 index 91e52a271e5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx1u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx1u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - uint8x8_t arg2_uint8x8_t; - - out_uint8x8_t = vtbx1_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c deleted file mode 100644 index 65b0435e685..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx2p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx2p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8x2_t arg1_poly8x8x2_t; - uint8x8_t arg2_uint8x8_t; - - out_poly8x8_t = vtbx2_p8 (arg0_poly8x8_t, arg1_poly8x8x2_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c deleted file mode 100644 index 7209bea094f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx2s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx2s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8x2_t arg1_int8x8x2_t; - int8x8_t arg2_int8x8_t; - - out_int8x8_t = vtbx2_s8 (arg0_int8x8_t, arg1_int8x8x2_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c deleted file mode 100644 index 12f86b1101b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx2u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx2u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8x2_t arg1_uint8x8x2_t; - uint8x8_t arg2_uint8x8_t; - - out_uint8x8_t = vtbx2_u8 (arg0_uint8x8_t, arg1_uint8x8x2_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c deleted file mode 100644 index 4acbb55f29f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx3p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx3p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8x3_t arg1_poly8x8x3_t; - uint8x8_t arg2_uint8x8_t; - - out_poly8x8_t = vtbx3_p8 (arg0_poly8x8_t, arg1_poly8x8x3_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c deleted file mode 100644 index b7f7b7a3c46..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx3s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx3s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8x3_t arg1_int8x8x3_t; - int8x8_t arg2_int8x8_t; - - out_int8x8_t = vtbx3_s8 (arg0_int8x8_t, arg1_int8x8x3_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c deleted file mode 100644 index 57f8d643ca8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx3u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx3u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8x3_t arg1_uint8x8x3_t; - uint8x8_t arg2_uint8x8_t; - - out_uint8x8_t = vtbx3_u8 (arg0_uint8x8_t, arg1_uint8x8x3_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c deleted file mode 100644 index 0880c17a5a1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx4p8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx4p8 (void) -{ - poly8x8_t out_poly8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8x4_t arg1_poly8x8x4_t; - uint8x8_t arg2_uint8x8_t; - - out_poly8x8_t = vtbx4_p8 (arg0_poly8x8_t, arg1_poly8x8x4_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c deleted file mode 100644 index 9f24dee6917..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx4s8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx4s8 (void) -{ - int8x8_t out_int8x8_t; - int8x8_t arg0_int8x8_t; - int8x8x4_t arg1_int8x8x4_t; - int8x8_t arg2_int8x8_t; - - out_int8x8_t = vtbx4_s8 (arg0_int8x8_t, arg1_int8x8x4_t, arg2_int8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c deleted file mode 100644 index 4c15ffac60b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Test the `vtbx4u8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtbx4u8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8x4_t arg1_uint8x8x4_t; - uint8x8_t arg2_uint8x8_t; - - out_uint8x8_t = vtbx4_u8 (arg0_uint8x8_t, arg1_uint8x8x4_t, arg2_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtbx\.8\[ \]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c deleted file mode 100644 index 5098097c91b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQf32 (void) -{ - float32x4x2_t out_float32x4x2_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4x2_t = vtrnq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vtrn\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c deleted file mode 100644 index 6ae7f5aa7a6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQp16 (void) -{ - poly16x8x2_t out_poly16x8x2_t; - poly16x8_t arg0_poly16x8_t; - poly16x8_t arg1_poly16x8_t; - - out_poly16x8x2_t = vtrnq_p16 (arg0_poly16x8_t, arg1_poly16x8_t); -} - -/* { dg-final { scan-assembler "vtrn\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c deleted file mode 100644 index 2c0951a9ae8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQp8 (void) -{ - poly8x16x2_t out_poly8x16x2_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16x2_t = vtrnq_p8 (arg0_poly8x16_t, arg1_poly8x16_t); -} - -/* { dg-final { scan-assembler "vtrn\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c deleted file mode 100644 index e9359f37daa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQs16 (void) -{ - int16x8x2_t out_int16x8x2_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8x2_t = vtrnq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vtrn\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c deleted file mode 100644 index f19a386dd88..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQs32 (void) -{ - int32x4x2_t out_int32x4x2_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4x2_t = vtrnq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vtrn\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c deleted file mode 100644 index c5fba7690ca..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQs8 (void) -{ - int8x16x2_t out_int8x16x2_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16x2_t = vtrnq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vtrn\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c deleted file mode 100644 index 4efaef0e678..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQu16 (void) -{ - uint16x8x2_t out_uint16x8x2_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8x2_t = vtrnq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vtrn\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c deleted file mode 100644 index 4df963d2265..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQu32 (void) -{ - uint32x4x2_t out_uint32x4x2_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4x2_t = vtrnq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vtrn\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c deleted file mode 100644 index db21e83cac7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnQu8 (void) -{ - uint8x16x2_t out_uint8x16x2_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16x2_t = vtrnq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vtrn\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c deleted file mode 100644 index 5f25d3784fd..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnf32 (void) -{ - float32x2x2_t out_float32x2x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2x2_t = vtrn_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c deleted file mode 100644 index a5d63f94cad..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnp16 (void) -{ - poly16x4x2_t out_poly16x4x2_t; - poly16x4_t arg0_poly16x4_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x4x2_t = vtrn_p16 (arg0_poly16x4_t, arg1_poly16x4_t); -} - -/* { dg-final { scan-assembler "vtrn\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c deleted file mode 100644 index 3d5ec4beb83..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnp8 (void) -{ - poly8x8x2_t out_poly8x8x2_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8x2_t = vtrn_p8 (arg0_poly8x8_t, arg1_poly8x8_t); -} - -/* { dg-final { scan-assembler "vtrn\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns16.c b/gcc/testsuite/gcc.target/arm/neon/vtrns16.c deleted file mode 100644 index c37f4fa5c2b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrns16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrns16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrns16 (void) -{ - int16x4x2_t out_int16x4x2_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4x2_t = vtrn_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vtrn\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns32.c b/gcc/testsuite/gcc.target/arm/neon/vtrns32.c deleted file mode 100644 index 707459f9904..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrns32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrns32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrns32 (void) -{ - int32x2x2_t out_int32x2x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2x2_t = vtrn_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns8.c b/gcc/testsuite/gcc.target/arm/neon/vtrns8.c deleted file mode 100644 index cfad2510cb4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrns8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrns8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrns8 (void) -{ - int8x8x2_t out_int8x8x2_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8x2_t = vtrn_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vtrn\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c deleted file mode 100644 index 8add51bdca4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnu16 (void) -{ - uint16x4x2_t out_uint16x4x2_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4x2_t = vtrn_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vtrn\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c deleted file mode 100644 index de9fc554636..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnu32 (void) -{ - uint32x2x2_t out_uint32x2x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2x2_t = vtrn_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c deleted file mode 100644 index 5dc63e72d23..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtrnu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtrnu8 (void) -{ - uint8x8x2_t out_uint8x8x2_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8x2_t = vtrn_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtrn\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c deleted file mode 100644 index 97ef65007e4..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstQp8 (void) -{ - uint8x16_t out_uint8x16_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_uint8x16_t = vtstq_p8 (arg0_poly8x16_t, arg1_poly8x16_t); -} - -/* { dg-final { scan-assembler "vtst\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c deleted file mode 100644 index d8d6881f77c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstQs16 (void) -{ - uint16x8_t out_uint16x8_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_uint16x8_t = vtstq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vtst\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c deleted file mode 100644 index c9c212ea803..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstQs32 (void) -{ - uint32x4_t out_uint32x4_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_uint32x4_t = vtstq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vtst\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c deleted file mode 100644 index a0f791def8b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstQs8 (void) -{ - uint8x16_t out_uint8x16_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_uint8x16_t = vtstq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vtst\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c deleted file mode 100644 index e1f3adcaa94..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstQu16 (void) -{ - uint16x8_t out_uint16x8_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8_t = vtstq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vtst\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c deleted file mode 100644 index 215be3a075b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstQu32 (void) -{ - uint32x4_t out_uint32x4_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4_t = vtstq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vtst\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c deleted file mode 100644 index 74a5e595af8..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstQu8 (void) -{ - uint8x16_t out_uint8x16_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16_t = vtstq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vtst\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstp8.c b/gcc/testsuite/gcc.target/arm/neon/vtstp8.c deleted file mode 100644 index e23b71909c9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstp8 (void) -{ - uint8x8_t out_uint8x8_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_uint8x8_t = vtst_p8 (arg0_poly8x8_t, arg1_poly8x8_t); -} - -/* { dg-final { scan-assembler "vtst\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts16.c b/gcc/testsuite/gcc.target/arm/neon/vtsts16.c deleted file mode 100644 index 2cac7318253..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtsts16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtsts16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtsts16 (void) -{ - uint16x4_t out_uint16x4_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_uint16x4_t = vtst_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vtst\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts32.c b/gcc/testsuite/gcc.target/arm/neon/vtsts32.c deleted file mode 100644 index c932fbd0113..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtsts32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtsts32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtsts32 (void) -{ - uint32x2_t out_uint32x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_uint32x2_t = vtst_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vtst\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts8.c b/gcc/testsuite/gcc.target/arm/neon/vtsts8.c deleted file mode 100644 index a5acd671efc..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtsts8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtsts8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtsts8 (void) -{ - uint8x8_t out_uint8x8_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_uint8x8_t = vtst_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vtst\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu16.c b/gcc/testsuite/gcc.target/arm/neon/vtstu16.c deleted file mode 100644 index 7869c08ba71..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstu16 (void) -{ - uint16x4_t out_uint16x4_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4_t = vtst_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vtst\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu32.c b/gcc/testsuite/gcc.target/arm/neon/vtstu32.c deleted file mode 100644 index ca4b5ca7d0d..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstu32 (void) -{ - uint32x2_t out_uint32x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2_t = vtst_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vtst\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu8.c b/gcc/testsuite/gcc.target/arm/neon/vtstu8.c deleted file mode 100644 index be18756d535..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vtstu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vtstu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vtstu8 (void) -{ - uint8x8_t out_uint8x8_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8_t = vtst_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vtst\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c deleted file mode 100644 index 4ea4c377d16..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQf32 (void) -{ - float32x4x2_t out_float32x4x2_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4x2_t = vuzpq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c deleted file mode 100644 index b93fc3e88b9..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQp16 (void) -{ - poly16x8x2_t out_poly16x8x2_t; - poly16x8_t arg0_poly16x8_t; - poly16x8_t arg1_poly16x8_t; - - out_poly16x8x2_t = vuzpq_p16 (arg0_poly16x8_t, arg1_poly16x8_t); -} - -/* { dg-final { scan-assembler "vuzp\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c deleted file mode 100644 index 2ac259b6190..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQp8 (void) -{ - poly8x16x2_t out_poly8x16x2_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16x2_t = vuzpq_p8 (arg0_poly8x16_t, arg1_poly8x16_t); -} - -/* { dg-final { scan-assembler "vuzp\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c deleted file mode 100644 index 81a69b7b5e2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQs16 (void) -{ - int16x8x2_t out_int16x8x2_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8x2_t = vuzpq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vuzp\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c deleted file mode 100644 index 173c30de829..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQs32 (void) -{ - int32x4x2_t out_int32x4x2_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4x2_t = vuzpq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c deleted file mode 100644 index 01950099b84..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQs8 (void) -{ - int8x16x2_t out_int8x16x2_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16x2_t = vuzpq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vuzp\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c deleted file mode 100644 index e004a3f4fc1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQu16 (void) -{ - uint16x8x2_t out_uint16x8x2_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8x2_t = vuzpq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vuzp\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c deleted file mode 100644 index ed64aa98f60..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQu32 (void) -{ - uint32x4x2_t out_uint32x4x2_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4x2_t = vuzpq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c deleted file mode 100644 index b512247d04b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpQu8 (void) -{ - uint8x16x2_t out_uint8x16x2_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16x2_t = vuzpq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vuzp\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c deleted file mode 100644 index 067f43e497c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpf32 (void) -{ - float32x2x2_t out_float32x2x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2x2_t = vuzp_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c deleted file mode 100644 index 01f3c174d6c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpp16 (void) -{ - poly16x4x2_t out_poly16x4x2_t; - poly16x4_t arg0_poly16x4_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x4x2_t = vuzp_p16 (arg0_poly16x4_t, arg1_poly16x4_t); -} - -/* { dg-final { scan-assembler "vuzp\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c deleted file mode 100644 index b90b4218eb2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpp8 (void) -{ - poly8x8x2_t out_poly8x8x2_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8x2_t = vuzp_p8 (arg0_poly8x8_t, arg1_poly8x8_t); -} - -/* { dg-final { scan-assembler "vuzp\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps16.c b/gcc/testsuite/gcc.target/arm/neon/vuzps16.c deleted file mode 100644 index 9f69fa96376..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzps16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzps16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzps16 (void) -{ - int16x4x2_t out_int16x4x2_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4x2_t = vuzp_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vuzp\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps32.c b/gcc/testsuite/gcc.target/arm/neon/vuzps32.c deleted file mode 100644 index 3cc32cdbe3f..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzps32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzps32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzps32 (void) -{ - int32x2x2_t out_int32x2x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2x2_t = vuzp_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps8.c b/gcc/testsuite/gcc.target/arm/neon/vuzps8.c deleted file mode 100644 index 4a32e542011..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzps8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzps8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzps8 (void) -{ - int8x8x2_t out_int8x8x2_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8x2_t = vuzp_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vuzp\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c deleted file mode 100644 index c9e976d8881..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpu16 (void) -{ - uint16x4x2_t out_uint16x4x2_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4x2_t = vuzp_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vuzp\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c deleted file mode 100644 index 0998a8c10c6..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpu32 (void) -{ - uint32x2x2_t out_uint32x2x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2x2_t = vuzp_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c deleted file mode 100644 index 916c16490f1..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vuzpu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vuzpu8 (void) -{ - uint8x8x2_t out_uint8x8x2_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8x2_t = vuzp_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vuzp\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c deleted file mode 100644 index 239e91dca9c..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQf32 (void) -{ - float32x4x2_t out_float32x4x2_t; - float32x4_t arg0_float32x4_t; - float32x4_t arg1_float32x4_t; - - out_float32x4x2_t = vzipq_f32 (arg0_float32x4_t, arg1_float32x4_t); -} - -/* { dg-final { scan-assembler "vzip\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c deleted file mode 100644 index 0687a8e04f0..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQp16 (void) -{ - poly16x8x2_t out_poly16x8x2_t; - poly16x8_t arg0_poly16x8_t; - poly16x8_t arg1_poly16x8_t; - - out_poly16x8x2_t = vzipq_p16 (arg0_poly16x8_t, arg1_poly16x8_t); -} - -/* { dg-final { scan-assembler "vzip\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c deleted file mode 100644 index ff78c6954d2..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQp8 (void) -{ - poly8x16x2_t out_poly8x16x2_t; - poly8x16_t arg0_poly8x16_t; - poly8x16_t arg1_poly8x16_t; - - out_poly8x16x2_t = vzipq_p8 (arg0_poly8x16_t, arg1_poly8x16_t); -} - -/* { dg-final { scan-assembler "vzip\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c deleted file mode 100644 index 079e23ed097..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQs16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQs16 (void) -{ - int16x8x2_t out_int16x8x2_t; - int16x8_t arg0_int16x8_t; - int16x8_t arg1_int16x8_t; - - out_int16x8x2_t = vzipq_s16 (arg0_int16x8_t, arg1_int16x8_t); -} - -/* { dg-final { scan-assembler "vzip\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c deleted file mode 100644 index 842bf06f0aa..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQs32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQs32 (void) -{ - int32x4x2_t out_int32x4x2_t; - int32x4_t arg0_int32x4_t; - int32x4_t arg1_int32x4_t; - - out_int32x4x2_t = vzipq_s32 (arg0_int32x4_t, arg1_int32x4_t); -} - -/* { dg-final { scan-assembler "vzip\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c deleted file mode 100644 index fa9bc90f98b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQs8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQs8 (void) -{ - int8x16x2_t out_int8x16x2_t; - int8x16_t arg0_int8x16_t; - int8x16_t arg1_int8x16_t; - - out_int8x16x2_t = vzipq_s8 (arg0_int8x16_t, arg1_int8x16_t); -} - -/* { dg-final { scan-assembler "vzip\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c deleted file mode 100644 index 12958323c96..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQu16 (void) -{ - uint16x8x2_t out_uint16x8x2_t; - uint16x8_t arg0_uint16x8_t; - uint16x8_t arg1_uint16x8_t; - - out_uint16x8x2_t = vzipq_u16 (arg0_uint16x8_t, arg1_uint16x8_t); -} - -/* { dg-final { scan-assembler "vzip\.16\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c deleted file mode 100644 index af18fb52756..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQu32 (void) -{ - uint32x4x2_t out_uint32x4x2_t; - uint32x4_t arg0_uint32x4_t; - uint32x4_t arg1_uint32x4_t; - - out_uint32x4x2_t = vzipq_u32 (arg0_uint32x4_t, arg1_uint32x4_t); -} - -/* { dg-final { scan-assembler "vzip\.32\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c deleted file mode 100644 index fd72ce4fe6b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipQu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipQu8 (void) -{ - uint8x16x2_t out_uint8x16x2_t; - uint8x16_t arg0_uint8x16_t; - uint8x16_t arg1_uint8x16_t; - - out_uint8x16x2_t = vzipq_u8 (arg0_uint8x16_t, arg1_uint8x16_t); -} - -/* { dg-final { scan-assembler "vzip\.8\[ \]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipf32.c b/gcc/testsuite/gcc.target/arm/neon/vzipf32.c deleted file mode 100644 index 72fc156bb53..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipf32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipf32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipf32 (void) -{ - float32x2x2_t out_float32x2x2_t; - float32x2_t arg0_float32x2_t; - float32x2_t arg1_float32x2_t; - - out_float32x2x2_t = vzip_f32 (arg0_float32x2_t, arg1_float32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipp16.c b/gcc/testsuite/gcc.target/arm/neon/vzipp16.c deleted file mode 100644 index fda2705c202..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipp16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipp16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipp16 (void) -{ - poly16x4x2_t out_poly16x4x2_t; - poly16x4_t arg0_poly16x4_t; - poly16x4_t arg1_poly16x4_t; - - out_poly16x4x2_t = vzip_p16 (arg0_poly16x4_t, arg1_poly16x4_t); -} - -/* { dg-final { scan-assembler "vzip\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipp8.c b/gcc/testsuite/gcc.target/arm/neon/vzipp8.c deleted file mode 100644 index 14a2af57f59..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipp8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipp8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipp8 (void) -{ - poly8x8x2_t out_poly8x8x2_t; - poly8x8_t arg0_poly8x8_t; - poly8x8_t arg1_poly8x8_t; - - out_poly8x8x2_t = vzip_p8 (arg0_poly8x8_t, arg1_poly8x8_t); -} - -/* { dg-final { scan-assembler "vzip\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips16.c b/gcc/testsuite/gcc.target/arm/neon/vzips16.c deleted file mode 100644 index b47c3bb9fc5..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzips16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzips16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzips16 (void) -{ - int16x4x2_t out_int16x4x2_t; - int16x4_t arg0_int16x4_t; - int16x4_t arg1_int16x4_t; - - out_int16x4x2_t = vzip_s16 (arg0_int16x4_t, arg1_int16x4_t); -} - -/* { dg-final { scan-assembler "vzip\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips32.c b/gcc/testsuite/gcc.target/arm/neon/vzips32.c deleted file mode 100644 index 8bb064d5154..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzips32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzips32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzips32 (void) -{ - int32x2x2_t out_int32x2x2_t; - int32x2_t arg0_int32x2_t; - int32x2_t arg1_int32x2_t; - - out_int32x2x2_t = vzip_s32 (arg0_int32x2_t, arg1_int32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips8.c b/gcc/testsuite/gcc.target/arm/neon/vzips8.c deleted file mode 100644 index 4e20646662b..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzips8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzips8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzips8 (void) -{ - int8x8x2_t out_int8x8x2_t; - int8x8_t arg0_int8x8_t; - int8x8_t arg1_int8x8_t; - - out_int8x8x2_t = vzip_s8 (arg0_int8x8_t, arg1_int8x8_t); -} - -/* { dg-final { scan-assembler "vzip\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu16.c b/gcc/testsuite/gcc.target/arm/neon/vzipu16.c deleted file mode 100644 index ce8fe44e201..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipu16.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipu16' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipu16 (void) -{ - uint16x4x2_t out_uint16x4x2_t; - uint16x4_t arg0_uint16x4_t; - uint16x4_t arg1_uint16x4_t; - - out_uint16x4x2_t = vzip_u16 (arg0_uint16x4_t, arg1_uint16x4_t); -} - -/* { dg-final { scan-assembler "vzip\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu32.c b/gcc/testsuite/gcc.target/arm/neon/vzipu32.c deleted file mode 100644 index 7667efcede7..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipu32.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipu32' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipu32 (void) -{ - uint32x2x2_t out_uint32x2x2_t; - uint32x2_t arg0_uint32x2_t; - uint32x2_t arg1_uint32x2_t; - - out_uint32x2x2_t = vzip_u32 (arg0_uint32x2_t, arg1_uint32x2_t); -} - -/* { dg-final { scan-assembler "vuzp\.32\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu8.c b/gcc/testsuite/gcc.target/arm/neon/vzipu8.c deleted file mode 100644 index 12291038b83..00000000000 --- a/gcc/testsuite/gcc.target/arm/neon/vzipu8.c +++ /dev/null @@ -1,20 +0,0 @@ -/* Test the `vzipu8' ARM Neon intrinsic. */ -/* This file was autogenerated by neon-testgen. */ - -/* { dg-do assemble } */ -/* { dg-require-effective-target arm_neon_ok } */ -/* { dg-options "-save-temps -O0" } */ -/* { dg-add-options arm_neon } */ - -#include "arm_neon.h" - -void test_vzipu8 (void) -{ - uint8x8x2_t out_uint8x8x2_t; - uint8x8_t arg0_uint8x8_t; - uint8x8_t arg1_uint8x8_t; - - out_uint8x8x2_t = vzip_u8 (arg0_uint8x8_t, arg1_uint8x8_t); -} - -/* { dg-final { scan-assembler "vzip\.8\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/polytypes.c b/gcc/testsuite/gcc.target/arm/polytypes.c index f91f800a9be..f91f800a9be 100644 --- a/gcc/testsuite/gcc.target/arm/neon/polytypes.c +++ b/gcc/testsuite/gcc.target/arm/polytypes.c diff --git a/gcc/testsuite/gcc.target/arm/neon/pr51534.c b/gcc/testsuite/gcc.target/arm/pr51534.c index f675a444a23..f675a444a23 100644 --- a/gcc/testsuite/gcc.target/arm/neon/pr51534.c +++ b/gcc/testsuite/gcc.target/arm/pr51534.c diff --git a/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c b/gcc/testsuite/gcc.target/arm/vect-vcvt.c index 816f68dbeb3..816f68dbeb3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c +++ b/gcc/testsuite/gcc.target/arm/vect-vcvt.c diff --git a/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c b/gcc/testsuite/gcc.target/arm/vect-vcvtq.c index 47e278aed67..47e278aed67 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c +++ b/gcc/testsuite/gcc.target/arm/vect-vcvtq.c diff --git a/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c b/gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c index 51a7f9a897f..51a7f9a897f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c +++ b/gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c b/gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c index 5f4c927b6e0..de4e92a0b4a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c +++ b/gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c @@ -11,7 +11,7 @@ unsigned char dummy_store[1000]; void -foo (char* addr) +foo (unsigned char* addr) { uint8x16_t vdata = vld1q_u8 (addr); vst1q_lane_u64 ((uint64_t*) &dummy_store, vreinterpretq_u64_u8 (vdata), 0); |