diff options
Diffstat (limited to 'gcc/testsuite/gcc.target')
164 files changed, 4220 insertions, 6 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c new file mode 100644 index 00000000000..96608ebb283 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c @@ -0,0 +1,82 @@ +/* Test the `v[min|max]nm{q}_f*' AArch64 SIMD intrinsic. */ + +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +#include "arm_neon.h" + +extern void abort (); + +#define CHECK(T, N, R, E) \ + {\ + int i = 0;\ + for (; i < N; i++)\ + if (* (T *) &R[i] != * (T *) &E[i])\ + abort ();\ + } + +int +main (int argc, char **argv) +{ + float32x2_t f32x2_input1 = vdup_n_f32 (-1.0); + float32x2_t f32x2_input2 = vdup_n_f32 (0.0); + float32x2_t f32x2_exp_minnm = vdup_n_f32 (-1.0); + float32x2_t f32x2_exp_maxnm = vdup_n_f32 (0.0); + float32x2_t f32x2_ret_minnm = vminnm_f32 (f32x2_input1, f32x2_input2); + float32x2_t f32x2_ret_maxnm = vmaxnm_f32 (f32x2_input1, f32x2_input2); + + CHECK (uint32_t, 2, f32x2_ret_minnm, f32x2_exp_minnm); + CHECK (uint32_t, 2, f32x2_ret_maxnm, f32x2_exp_maxnm); + + f32x2_input1 = vdup_n_f32 (__builtin_nanf ("")); + f32x2_input2 = vdup_n_f32 (1.0); + f32x2_exp_minnm = vdup_n_f32 (1.0); + f32x2_exp_maxnm = vdup_n_f32 (1.0); + f32x2_ret_minnm = vminnm_f32 (f32x2_input1, f32x2_input2); + f32x2_ret_maxnm = vmaxnm_f32 (f32x2_input1, f32x2_input2); + + CHECK (uint32_t, 2, f32x2_ret_minnm, f32x2_exp_minnm); + CHECK (uint32_t, 2, f32x2_ret_maxnm, f32x2_exp_maxnm); + + float32x4_t f32x4_input1 = vdupq_n_f32 (-1024.0); + float32x4_t f32x4_input2 = vdupq_n_f32 (77.0); + float32x4_t f32x4_exp_minnm = vdupq_n_f32 (-1024.0); + float32x4_t f32x4_exp_maxnm = vdupq_n_f32 (77.0); + float32x4_t f32x4_ret_minnm = vminnmq_f32 (f32x4_input1, f32x4_input2); + float32x4_t f32x4_ret_maxnm = vmaxnmq_f32 (f32x4_input1, f32x4_input2); + + CHECK (uint32_t, 4, f32x4_ret_minnm, f32x4_exp_minnm); + CHECK (uint32_t, 4, f32x4_ret_maxnm, f32x4_exp_maxnm); + + f32x4_input1 = vdupq_n_f32 (-__builtin_nanf ("")); + f32x4_input2 = vdupq_n_f32 (-1.0); + f32x4_exp_minnm = vdupq_n_f32 (-1.0); + f32x4_exp_maxnm = vdupq_n_f32 (-1.0); + f32x4_ret_minnm = vminnmq_f32 (f32x4_input1, f32x4_input2); + f32x4_ret_maxnm = vmaxnmq_f32 (f32x4_input1, f32x4_input2); + + CHECK (uint32_t, 4, f32x4_ret_minnm, f32x4_exp_minnm); + CHECK (uint32_t, 4, f32x4_ret_maxnm, f32x4_exp_maxnm); + + float64x2_t f64x2_input1 = vdupq_n_f64 (1.23); + float64x2_t f64x2_input2 = vdupq_n_f64 (4.56); + float64x2_t f64x2_exp_minnm = vdupq_n_f64 (1.23); + float64x2_t f64x2_exp_maxnm = vdupq_n_f64 (4.56); + float64x2_t f64x2_ret_minnm = vminnmq_f64 (f64x2_input1, f64x2_input2); + float64x2_t f64x2_ret_maxnm = vmaxnmq_f64 (f64x2_input1, f64x2_input2); + + CHECK (uint64_t, 2, f64x2_ret_minnm, f64x2_exp_minnm); + CHECK (uint64_t, 2, f64x2_ret_maxnm, f64x2_exp_maxnm); + + f64x2_input1 = vdupq_n_f64 (-__builtin_nan ("")); + f64x2_input2 = vdupq_n_f64 (1.0); + f64x2_exp_minnm = vdupq_n_f64 (1.0); + f64x2_exp_maxnm = vdupq_n_f64 (1.0); + f64x2_ret_minnm = vminnmq_f64 (f64x2_input1, f64x2_input2); + f64x2_ret_maxnm = vmaxnmq_f64 (f64x2_input1, f64x2_input2); + + CHECK (uint64_t, 2, f64x2_ret_minnm, f64x2_exp_minnm); + CHECK (uint64_t, 2, f64x2_ret_maxnm, f64x2_exp_maxnm); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/avr/pr50739.c b/gcc/testsuite/gcc.target/avr/pr50739.c new file mode 100644 index 00000000000..a6850b73c3e --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/pr50739.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-fmerge-all-constants" } */ + +char *ca = "123"; + +const char a[] __attribute__((__progmem__))= "a"; +const char b[] __attribute__((__progmem__))= "b"; diff --git a/gcc/testsuite/gcc.target/avr/pr71103.c b/gcc/testsuite/gcc.target/avr/pr71103.c new file mode 100644 index 00000000000..43244d15e97 --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/pr71103.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +struct ResponseStruct{ + unsigned char responseLength; + char *response; +}; + +static char response[5]; +struct ResponseStruct something(){ + struct ResponseStruct returnValue; + returnValue.responseLength = 5; + returnValue.response = response; + return returnValue; +} + diff --git a/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c b/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c new file mode 100644 index 00000000000..480ad05acab --- /dev/null +++ b/gcc/testsuite/gcc.target/avr/torture/pr71103-2.c @@ -0,0 +1,118 @@ +/* Use -g0 so that this test case doesn't just fail because + of PR52472. */ + +/* { dg-do compile } */ +/* { dg-options "-std=gnu99 -g0" } */ + +struct S12 +{ + char c; + const char *p; +}; + +struct S12f +{ + char c; + struct S12f (*f)(void); +}; + +struct S12labl +{ + char c; + void **labl; +}; + +struct S121 +{ + char c; + const char *p; + char d; +}; + +const char str[5] = "abcd"; + +struct S12 test_S12_0 (void) +{ + struct S12 s; + s.c = 'A'; + s.p = str; + return s; +} + +struct S12 test_S12_4 (void) +{ + struct S12 s; + s.c = 'A'; + s.p = str + 4; + return s; +} + +struct S12f test_S12f (void) +{ + struct S12f s; + s.c = 'A'; + s.f = test_S12f; + return s; +} + +struct S121 test_S121 (void) +{ + struct S121 s; + s.c = 'c'; + s.p = str + 4; + s.d = 'd'; + return s; +} + +extern void use_S12lab (struct S12labl*); + +struct S12labl test_S12lab (void) +{ + struct S12labl s; +labl:; + s.c = 'A'; + s.labl = &&labl; + return s; +} + +#ifdef __MEMX + +struct S13 +{ + char c; + const __memx char *p; +}; + +const __memx char str_x[] = "abcd"; + +struct S13 test_S13_0 (void) +{ + struct S13 s; + s.c = 'A'; + s.p = str_x; + return s; +} + +struct S13 test_S13_4a (void) +{ + struct S13 s; + s.c = 'A'; + s.p = str_x + 4; + return s; +} + +#ifdef __FLASH1 + +const __flash1 char str_1[] = "abcd"; + +struct S13 test_13_4b (void) +{ + struct S13 s; + s.c = 'A'; + s.p = str_1 + 4; + return s; +} + +#endif /* have __flash1 */ +#endif /* have __memx */ + diff --git a/gcc/testsuite/gcc.target/i386/avx-pr71559.c b/gcc/testsuite/gcc.target/i386/avx-pr71559.c new file mode 100644 index 00000000000..af16d56d785 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx-pr71559.c @@ -0,0 +1,8 @@ +/* PR target/71559 */ +/* { dg-do run { target avx } } */ +/* { dg-options "-O2 -ftree-vectorize -mavx" } */ + +#include "avx-check.h" +#define PR71559_TEST avx_test + +#include "sse2-pr71559.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-1.c new file mode 100644 index 00000000000..fc48b1572b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = ceil (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != ceil (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-2.c new file mode 100644 index 00000000000..bf8af064cfe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-ceil-vec-2.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-ceil-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscalepd\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-1.c new file mode 100644 index 00000000000..c6d53d89fc6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + float a[NUM]; + int r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = (int) ceilf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != (int) ceilf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-2.c new file mode 100644 index 00000000000..80e594dbfa4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-sfix-vec-2.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-ceilf-sfix-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2dq\[^\n\]+zmm\[0-9\].{7}(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c new file mode 100644 index 00000000000..4788825fc3d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = ceilf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != ceilf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-2.c new file mode 100644 index 00000000000..95a79e29d12 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-ceilf-vec-2.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-ceilf-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-1.c new file mode 100644 index 00000000000..b7cbed005dd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = floor (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != floor (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-2.c new file mode 100644 index 00000000000..0d401f78d63 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-floor-vec-2.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-floor-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscalepd\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-1.c new file mode 100644 index 00000000000..6a25f438a8e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + float a[NUM]; + int r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = (int) floorf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != (int) floorf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-2.c new file mode 100644 index 00000000000..f4bfec5385e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-floorf-sfix-vec-2.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-floorf-sfix-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2dq\[^\n\]+zmm\[0-9\].{7}(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-1.c new file mode 100644 index 00000000000..69fc73d78ef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = floorf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != floorf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-2.c new file mode 100644 index 00000000000..90c6c0fade5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-floorf-vec-2.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-floorf-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c b/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c new file mode 100644 index 00000000000..d78d86ac2f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-pr71559.c @@ -0,0 +1,8 @@ +/* PR target/71559 */ +/* { dg-do run { target avx512f } } */ +/* { dg-options "-O2 -ftree-vectorize -mavx512f" } */ + +#include "avx512f-check.h" +#define PR71559_TEST avx512f_test + +#include "sse2-pr71559.c" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-1.c new file mode 100644 index 00000000000..8e1745aa13a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + double a[NUM]; + int r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = (int) rint (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != (int) rint (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-2.c new file mode 100644 index 00000000000..c3f78ac3f25 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-rint-sfix-vec-2.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-rint-sfix-vec-1.c" + +/* { dg-final { scan-assembler-times "vcvtpd2dq\[^\n\]+ymm\[0-9\](?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vinserti64x4\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c new file mode 100644 index 00000000000..ac3e9a25973 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + float a[NUM]; + int r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = (int) rintf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != (int) rintf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-2.c new file mode 100644 index 00000000000..c172e61f84a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-rintf-sfix-vec-2.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-rintf-sfix-vec-1.c" + +/* { dg-final { scan-assembler-times "vcvtps2dq\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-1.c new file mode 100644 index 00000000000..61bea578e18 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + double a[NUM]; + int r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = (int) round (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != (int) round (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-2.c new file mode 100644 index 00000000000..5982c65d1e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-round-sfix-vec-2.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-round-sfix-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscalepd\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 2 } } */ +/* { dg-final { scan-assembler-times "vcvttpd2dq\[^\n\]+zmm\[0-9\].{7}(?:\n|\[ \\t\]+#)" 2 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-1.c new file mode 100644 index 00000000000..c5ec9e7ec00 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + float a[NUM]; + int r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = (int) roundf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != (int) roundf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-2.c new file mode 100644 index 00000000000..0d8abb892d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-roundf-sfix-vec-2.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-roundf-sfix-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttps2dq\[^\n\]+zmm\[0-9\].{7}(?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-1.c new file mode 100644 index 00000000000..dfb93d72324 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (double *src) +{ + int i, sign = 1; + double f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + double a[NUM]; + double r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = trunc (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != trunc (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-2.c new file mode 100644 index 00000000000..e8ec0227653 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-trunc-vec-2.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-trunc-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscalepd\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-1.c b/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-1.c new file mode 100644 index 00000000000..db13e712829 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-1.c @@ -0,0 +1,52 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-skip-if "no M_PI" { vxworks_kernel } } */ + +#define __NO_MATH_INLINES +#include <math.h> +#include "avx512f-check.h" + +#define NUM 64 + +static void +__attribute__((__target__("fpmath=sse"))) +init_src (float *src) +{ + int i, sign = 1; + float f = rand (); + + for (i = 0; i < NUM; i++) + { + src[i] = (i + 1) * f * M_PI * sign; + if (i < (NUM / 2)) + { + if ((i % 6) == 0) + f = f * src[i]; + } + else if (i == (NUM / 2)) + f = rand (); + else if ((i % 6) == 0) + f = 1 / (f * (i + 1) * src[i] * M_PI * sign); + sign = -sign; + } +} + +static void +__attribute__((__target__("fpmath=387"))) +avx512f_test (void) +{ + float a[NUM]; + float r[NUM]; + int i; + + init_src (a); + + for (i = 0; i < NUM; i++) + r[i] = truncf (a[i]); + + /* check results: */ + for (i = 0; i < NUM; i++) + if (r[i] != truncf (a[i])) + abort(); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-2.c b/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-2.c new file mode 100644 index 00000000000..ae542d8276b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-truncf-vec-2.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ffast-math -ftree-vectorize -mavx512f" } */ + +#include "avx512f-truncf-vec-1.c" + +/* { dg-final { scan-assembler-times "vrndscaleps\[^\n\]+zmm\[0-9\](?:\n|\[ \\t\]+#)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr68657.c b/gcc/testsuite/gcc.target/i386/pr68657.c new file mode 100644 index 00000000000..6f0d4987d39 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr68657.c @@ -0,0 +1,15 @@ +/* PR c/68657 */ +/* { dg-options "-mno-avx512f -Werror=psabi" } */ + +typedef int V __attribute__((vector_size (64))); + +void foo (V x, V *y) { /* { dg-error "AVX512F vector argument without AVX512F enabled" } */ + *y = x; +} + +V bar (V *x) { /* { dg-error "AVX512F vector return without AVX512F enabled" } */ + return *x; +} + +/* { dg-message "The ABI for passing parameters with 64-byte alignment has changed" "" { target *-*-* } 6 } */ +/* { dg-message "some warnings being treated as errors" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/i386/pr71529.C b/gcc/testsuite/gcc.target/i386/pr71529.C new file mode 100644 index 00000000000..3169101e1a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr71529.C @@ -0,0 +1,22 @@ +/* PR71529 */ +/* { dg-do compile { target { ! x32 } } } */ +/* { dg-options "-fcheck-pointer-bounds -mmpx -O2" } */ + +class c1 +{ + public: + virtual ~c1 (); +}; + +class c2 +{ + public: + virtual ~c2 (); +}; + +class c3 : c1, c2 { }; + +int main (int, char **) +{ + c3 obj; +} diff --git a/gcc/testsuite/gcc.target/i386/pr71647.c b/gcc/testsuite/gcc.target/i386/pr71647.c new file mode 100644 index 00000000000..ab091bd93dd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr71647.c @@ -0,0 +1,32 @@ +/* PR tree-optimization/71647 */ +/* { dg-do compile } */ +/* { dg-options "-O3 -fopenmp-simd -mavx -mno-avx512f -fdump-tree-vect-details" } */ + +void +foo (double *a, double *b) +{ + int i; +#pragma omp simd aligned(a,b:4*sizeof(double)) + for (i = 0; i < 32768; i++) + a[i] += b[i]; +} + +void +bar (double *a, double *b) +{ + int i; +#pragma omp simd aligned(a,b:32) + for (i = 0; i < 32768; i++) + a[i] += b[i]; +} + +void +baz (double *a, double *b) +{ + int i; +#pragma omp simd aligned(a,b:32L) + for (i = 0; i < 32768; i++) + a[i] += b[i]; +} + +/* { dg-final { scan-tree-dump-not "Alignment of access forced using peeling" "vect" } } */ diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr71559.c b/gcc/testsuite/gcc.target/i386/sse2-pr71559.c new file mode 100644 index 00000000000..59ecc7fb37f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-pr71559.c @@ -0,0 +1,73 @@ +/* PR target/71559 */ +/* { dg-do run { target sse2 } } */ +/* { dg-options "-O2 -ftree-vectorize -msse2" } */ + +#ifndef PR71559_TEST +#include "sse2-check.h" +#define PR71559_TEST sse2_test +#endif + +#define N 16 +float a[N] = { 5.0f, -3.0f, 1.0f, __builtin_nanf (""), 9.0f, 7.0f, -3.0f, -9.0f, + -3.0f, -5.0f, -9.0f, __builtin_nanf (""), 0.5f, -0.5f, 0.0f, 0.0f }; +float b[N] = { -5.0f, 3.0f, 1.0f, 7.0f, 8.0f, 8.0f, -3.0f, __builtin_nanf (""), + -4.0f, -4.0f, -9.0f, __builtin_nanf (""), 0.0f, 0.0f, 0.0f, __builtin_nanf ("") }; +int c[N], d[N]; + +#define FN(name, op) \ +void \ +name (void) \ +{ \ + int i; \ + for (i = 0; i < N; i++) \ + c[i] = (op || d[i] > 37) ? 5 : 32; \ +} +FN (eq, a[i] == b[i]) +FN (ne, a[i] != b[i]) +FN (gt, a[i] > b[i]) +FN (ge, a[i] >= b[i]) +FN (lt, a[i] < b[i]) +FN (le, a[i] <= b[i]) +FN (unle, !__builtin_isgreater (a[i], b[i])) +FN (unlt, !__builtin_isgreaterequal (a[i], b[i])) +FN (unge, !__builtin_isless (a[i], b[i])) +FN (ungt, !__builtin_islessequal (a[i], b[i])) +FN (uneq, !__builtin_islessgreater (a[i], b[i])) +FN (ordered, !__builtin_isunordered (a[i], b[i])) +FN (unordered, __builtin_isunordered (a[i], b[i])) + +#define TEST(name, GT, LT, EQ, UO) \ + name (); \ + for (i = 0; i < N; i++) \ + { \ + int v; \ + switch (i % 4) \ + { \ + case 0: v = GT ? 5 : 32; break; \ + case 1: v = LT ? 5 : 32; break; \ + case 2: v = EQ ? 5 : 32; break; \ + case 3: v = UO ? 5 : 32; break; \ + } \ + if (c[i] != v) \ + __builtin_abort (); \ + } + +void +PR71559_TEST (void) +{ + int i; + asm volatile ("" : : "g" (a), "g" (b), "g" (c), "g" (d) : "memory"); + TEST (eq, 0, 0, 1, 0) + TEST (ne, 1, 1, 0, 1) + TEST (gt, 1, 0, 0, 0) + TEST (ge, 1, 0, 1, 0) + TEST (lt, 0, 1, 0, 0) + TEST (le, 0, 1, 1, 0) + TEST (unle, 0, 1, 1, 1) + TEST (unlt, 0, 1, 0, 1) + TEST (unge, 1, 0, 1, 1) + TEST (ungt, 1, 0, 0, 1) + TEST (uneq, 0, 0, 1, 1) + TEST (ordered, 1, 1, 1, 0) + TEST (unordered, 0, 0, 0, 1) +} diff --git a/gcc/testsuite/gcc.target/powerpc/abs128-1.c b/gcc/testsuite/gcc.target/powerpc/abs128-1.c new file mode 100644 index 00000000000..49635df2b90 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/abs128-1.c @@ -0,0 +1,61 @@ +/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ +/* { dg-options "-mfloat128 -mvsx" } */ + +void abort (); + +typedef unsigned long long int uint64_t; + +typedef union +{ + __float128 value; + + struct + { +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ + unsigned negative:1; + unsigned exponent:15; + unsigned quiet_nan:1; + uint64_t mant_high:47; + uint64_t mant_low:64; +#else + uint64_t mant_low:64; + uint64_t mant_high:47; + unsigned quiet_nan:1; + unsigned exponent:15; + unsigned negative:1; +#endif + } nan; + +} ieee854_float128; + +int +main (int argc, int *argv[]) +{ + ieee854_float128 x, z; + + x.nan.negative = 1; + x.nan.exponent = 0x22; + x.nan.quiet_nan = 0; + x.nan.mant_high = 0x1234; + x.nan.mant_low = 0xabcdef; + + z.value = __builtin_fabsq (x.value); + + if (z.nan.negative != 0 + || z.nan.exponent != 0x22 + || z.nan.quiet_nan != 0 + || z.nan.mant_high != 0x1234 + || z.nan.mant_low != 0xabcdef) + abort (); + + z.value = __builtin_fabsq (z.value); + + if (z.nan.negative != 0 + || z.nan.exponent != 0x22 + || z.nan.quiet_nan != 0 + || z.nan.mant_high != 0x1234 + || z.nan.mant_low != 0xabcdef) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/copysign128-1.c b/gcc/testsuite/gcc.target/powerpc/copysign128-1.c new file mode 100644 index 00000000000..429dfc072e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/copysign128-1.c @@ -0,0 +1,58 @@ +/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ +/* { dg-options "-mfloat128 -mvsx" } */ + +void abort (); + +typedef unsigned long long int uint64_t; + +typedef union +{ + __float128 value; + + struct + { +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ + unsigned negative:1; + unsigned exponent:15; + unsigned quiet_nan:1; + uint64_t mant_high:47; + uint64_t mant_low:64; +#else + uint64_t mant_low:64; + uint64_t mant_high:47; + unsigned quiet_nan:1; + unsigned exponent:15; + unsigned negative:1; +#endif + } nan; + +} ieee854_float128; + +int +main (int argc, int *argv[]) +{ + ieee854_float128 x, y, z; + + x.nan.negative = 0; + x.nan.exponent = 0x22; + x.nan.quiet_nan = 0; + x.nan.mant_high = 0x1234; + x.nan.mant_low = 0xabcdef; + + y.nan.negative = 1; + y.nan.exponent = 0; + y.nan.quiet_nan = 0; + y.nan.mant_high = 0; + y.nan.mant_low = 0; + + z.value = __builtin_copysignq (x.value, y.value); + + if (z.nan.negative != 1 + || z.nan.exponent != 0x22 + || z.nan.quiet_nan != 0 + || z.nan.mant_high != 0x1234 + || z.nan.mant_low != 0xabcdef) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/darn-0.c b/gcc/testsuite/gcc.target/powerpc/darn-0.c index ce2e25e22a1..fc150766108 100644 --- a/gcc/testsuite/gcc.target/powerpc/darn-0.c +++ b/gcc/testsuite/gcc.target/powerpc/darn-0.c @@ -1,4 +1,7 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-mcpu=power9" } */ /* This test should succeed on both 32- and 64-bit configurations. */ diff --git a/gcc/testsuite/gcc.target/powerpc/darn-1.c b/gcc/testsuite/gcc.target/powerpc/darn-1.c index d79e5c1b4d9..9b7482d6551 100644 --- a/gcc/testsuite/gcc.target/powerpc/darn-1.c +++ b/gcc/testsuite/gcc.target/powerpc/darn-1.c @@ -1,6 +1,9 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-options "-mcpu=power9" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-require-effective-target lp64 } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/darn-2.c b/gcc/testsuite/gcc.target/powerpc/darn-2.c index 7f47332ec49..84493602cfc 100644 --- a/gcc/testsuite/gcc.target/powerpc/darn-2.c +++ b/gcc/testsuite/gcc.target/powerpc/darn-2.c @@ -1,6 +1,9 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-options "-mcpu=power9" } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-require-effective-target lp64 } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ #include <altivec.h> diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp b/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp new file mode 100644 index 00000000000..081946f7fbf --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp @@ -0,0 +1,39 @@ +# Copyright (C) 2014-2016 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +# Exit immediately if this isn't a PowerPC target. +if { ![istarget powerpc*-*-*] && ![istarget rs6000-*-*] } then { + return +} + +global DEFAULT_CFLAGS +if ![info exists DEFAULT_CFLAGS] then { + set DEFAULT_CFLAGS " -ansi -pedantic-errors" +} + +# Load support procs. +load_lib gcc-dg.exp +load_lib torture-options.exp + +# Initialize. +dg-init + +dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.c*]] "" $DEFAULT_CFLAGS + +# All done. +dg-finish diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c new file mode 100644 index 00000000000..29859c55986 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_lt (5, source); +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c new file mode 100644 index 00000000000..d634a2acd04 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_lt (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_lt_dd requires" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c new file mode 100644 index 00000000000..a56f19ba391 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_lt_dd (5, source); +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c new file mode 100644 index 00000000000..523facea156 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_lt_dd (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_lt_dd requires" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c new file mode 100644 index 00000000000..e62e4bc7bbe --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_lt_dd (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c new file mode 100644 index 00000000000..38bff163c02 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + if (__builtin_dfp_dtstsfi_lt_dd (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c new file mode 100644 index 00000000000..57fc81ad742 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p, unsigned int significance) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_lt_dd (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c new file mode 100644 index 00000000000..990461f9c53 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_lt_td (5, source); +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c new file mode 100644 index 00000000000..dcd4a16635f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_lt_td (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_lt_td requires" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c new file mode 100644 index 00000000000..5fbf5b5cc0c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_lt_td (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c new file mode 100644 index 00000000000..675109552b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + if (__builtin_dfp_dtstsfi_lt_td (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c new file mode 100644 index 00000000000..d24eb10f7a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p, unsigned int significance) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_lt_td (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c new file mode 100644 index 00000000000..d66ba886a92 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_lt (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c new file mode 100644 index 00000000000..e42f0debc82 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_gt (5, source); +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c new file mode 100644 index 00000000000..975843c6a02 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_gt (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_gt_dd requires" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c new file mode 100644 index 00000000000..d6eced78f6a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_gt (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c new file mode 100644 index 00000000000..eccca7e5d85 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + if (__builtin_dfp_dtstsfi_gt (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c new file mode 100644 index 00000000000..54f1cd3d134 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p, unsigned int significance) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_gt (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c new file mode 100644 index 00000000000..0c6594ecf46 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_gt (5, source); +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c new file mode 100644 index 00000000000..e30c2f4ac79 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_gt (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_gt_td requires" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c new file mode 100644 index 00000000000..aaa0a854370 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_gt (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c new file mode 100644 index 00000000000..efec051639a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + if (__builtin_dfp_dtstsfi_gt (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c new file mode 100644 index 00000000000..2f84bbfd36a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p, unsigned int significance) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_gt (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c new file mode 100644 index 00000000000..ac0380973f9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + if (__builtin_dfp_dtstsfi_lt (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c new file mode 100644 index 00000000000..cfa8d0d2817 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_gt_dd (5, source); +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c new file mode 100644 index 00000000000..a95dcb8dbb6 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_gt_dd (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_gt_dd requires" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c new file mode 100644 index 00000000000..512e1574555 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_gt_dd (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c new file mode 100644 index 00000000000..f21399e9d62 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + if (__builtin_dfp_dtstsfi_gt_dd (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c new file mode 100644 index 00000000000..86422831975 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p, unsigned int significance) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_gt_dd (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c new file mode 100644 index 00000000000..5987b438970 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_gt_td (5, source); +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c new file mode 100644 index 00000000000..00be5389310 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_gt_td (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_gt_td requires" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c new file mode 100644 index 00000000000..dcbde72a7f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_gt_td (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c new file mode 100644 index 00000000000..c892c100aa8 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + if (__builtin_dfp_dtstsfi_gt_td (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c new file mode 100644 index 00000000000..d54138d8c5c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p, unsigned int significance) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_gt_td (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c new file mode 100644 index 00000000000..f00756aa23c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p, unsigned int significance) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_lt (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c new file mode 100644 index 00000000000..6b2ecf775d2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_eq (5, source); +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c new file mode 100644 index 00000000000..c84387dc38b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_eq (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_eq_dd requires" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c new file mode 100644 index 00000000000..f193b415007 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_eq (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c new file mode 100644 index 00000000000..0de23f4f225 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + if (__builtin_dfp_dtstsfi_eq (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c new file mode 100644 index 00000000000..41652c99f6f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p, unsigned int significance) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_eq (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c new file mode 100644 index 00000000000..4ef2d555d43 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_eq (5, source); +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c new file mode 100644 index 00000000000..f1d6e2de80f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_eq (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_eq_td requires" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c new file mode 100644 index 00000000000..c85b709f228 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_eq (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c new file mode 100644 index 00000000000..94962fcff2f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + if (__builtin_dfp_dtstsfi_eq (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c new file mode 100644 index 00000000000..79190d0dde0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p, unsigned int significance) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_eq (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c new file mode 100644 index 00000000000..2aadb7e7dc2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_lt (5, source); +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c new file mode 100644 index 00000000000..3d9869d39f1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_eq_dd (5, source); +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c new file mode 100644 index 00000000000..58f542673de --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_eq_dd (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_eq_dd requires" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c new file mode 100644 index 00000000000..382fdc21060 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_eq_dd (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c new file mode 100644 index 00000000000..067c2071b4b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + if (__builtin_dfp_dtstsfi_eq_dd (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c new file mode 100644 index 00000000000..ac2c692b51f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p, unsigned int significance) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_eq_dd (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c new file mode 100644 index 00000000000..cd732fbc885 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_eq_td (5, source); +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c new file mode 100644 index 00000000000..7efb1a3d0f1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_eq_td (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_eq_td requires" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c new file mode 100644 index 00000000000..74ff7ec0d50 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_eq_td (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c new file mode 100644 index 00000000000..d6ee4f72a75 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + if (__builtin_dfp_dtstsfi_eq_td (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c new file mode 100644 index 00000000000..acd2a208379 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p, unsigned int significance) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_eq_td (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c new file mode 100644 index 00000000000..1bddb651b0e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_lt (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_lt_td requires" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c new file mode 100644 index 00000000000..71eab2609b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_ov (5, source); +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c new file mode 100644 index 00000000000..247c1448a70 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_ov (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_ov_dd requires" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c new file mode 100644 index 00000000000..fbe137de7f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_ov (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c new file mode 100644 index 00000000000..18d17f36ee3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + if (__builtin_dfp_dtstsfi_ov (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c new file mode 100644 index 00000000000..6e601160ef7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p, unsigned int significance) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_ov (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c new file mode 100644 index 00000000000..2ad93313760 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_ov (5, source); +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c new file mode 100644 index 00000000000..69272acb47a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_ov (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_ov_td requires" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c new file mode 100644 index 00000000000..a9ba111b82f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_ov (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c new file mode 100644 index 00000000000..bd8040a175a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + if (__builtin_dfp_dtstsfi_ov (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c new file mode 100644 index 00000000000..078f232cb4a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p, unsigned int significance) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_ov (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c new file mode 100644 index 00000000000..1875741f5c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_lt (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c new file mode 100644 index 00000000000..f84faf8022b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_ov_dd (5, source); +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c new file mode 100644 index 00000000000..3e512038cf3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_ov_dd (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_ov_dd requires" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c new file mode 100644 index 00000000000..044d039b464 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_ov_dd (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c new file mode 100644 index 00000000000..52a5d9a5664 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p) +{ + _Decimal64 source = *p; + + if (__builtin_dfp_dtstsfi_ov_dd (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfi" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c new file mode 100644 index 00000000000..2dd72ee1253 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal64 *p, unsigned int significance) +{ + _Decimal64 source = *p; + + return __builtin_dfp_dtstsfi_ov_dd (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c new file mode 100644 index 00000000000..6bbe73b7511 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_ov_td (5, source); +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c new file mode 100644 index 00000000000..572897fee55 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power8" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_ov_td (5, source); /* { dg-error "Builtin function __builtin_dtstsfi_ov_td requires" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c new file mode 100644 index 00000000000..4b725377e09 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_ov_td (65, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} + + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c new file mode 100644 index 00000000000..c302027e3be --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + if (__builtin_dfp_dtstsfi_ov_td (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c new file mode 100644 index 00000000000..789b3ada11a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p, unsigned int significance) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_ov_td (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c new file mode 100644 index 00000000000..d3aa64efa97 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p) +{ + _Decimal128 source = *p; + + if (__builtin_dfp_dtstsfi_lt (63, source)) + return 3; + else + return 5; +} + +/* { dg-final { scan-assembler "dtstsfiq" } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c new file mode 100644 index 00000000000..9180e3e9a01 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +int doTestBCDSignificance (_Decimal128 *p, unsigned int significance) +{ + _Decimal128 source = *p; + + return __builtin_dfp_dtstsfi_lt (significance, source); /* { dg-error "argument 1 must be a 6-bit unsigned literal" } */ +} diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-1.c b/gcc/testsuite/gcc.target/powerpc/divkc3-1.c new file mode 100644 index 00000000000..c5954f18a86 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/divkc3-1.c @@ -0,0 +1,23 @@ +/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mfloat128 -mvsx" } */ + +void abort (); + +typedef __complex float __cfloat128 __attribute__((mode(KC))); + +__cfloat128 divide (__cfloat128 x, __cfloat128 y) +{ + return x / y; +} + +__cfloat128 z, a; + +int main () +{ + z = divide (5.0q + 5.0jq, 2.0q + 1.0jq); + a = 3.0q + 1.0jq; + if (z != a) + abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/float128-complex-1.c b/gcc/testsuite/gcc.target/powerpc/float128-complex-1.c new file mode 100644 index 00000000000..4e3b3253caf --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/float128-complex-1.c @@ -0,0 +1,157 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-require-effective-target powerpc_float128_sw_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-options "-O2 -mcpu=power7 -mfloat128" } */ + +#ifndef NO_FLOAT +typedef _Complex float float_complex; +extern float_complex cfloat1 (void); +extern float_complex cfloat2 (void); + +#define FLOAT_ARG(NAME, OP) ARG_OP(float, float_complex, NAME, OP) +#define FLOAT_PTR(NAME, OP) PTR_OP(float, float_complex, NAME, OP) +#define FLOAT_CALL() CALL_OP(float, float_complex, cfloat1, cfloat2) + +#else +#define FLOAT_ARG(NAME, OP) +#define FLOAT_PTR(NAME, OP) +#define FLOAT_CALL() +#endif + +#ifndef NO_DOUBLE +typedef _Complex double double_complex; +extern double_complex cdouble1 (void); +extern double_complex cdouble2 (void); + +#define DOUBLE_ARG(NAME, OP) ARG_OP(double, double_complex, NAME, OP) +#define DOUBLE_PTR(NAME, OP) PTR_OP(double, double_complex, NAME, OP) +#define DOUBLE_CALL() CALL_OP(double, double_complex, cdouble1, cdouble2) + +#else +#define DOUBLE_ARG(NAME, OP) +#define DOUBLE_PTR(NAME, OP) +#define DOUBLE_CALL() +#endif + +#ifndef NO_FLOAT128 +#ifdef __VSX__ +typedef _Complex float __attribute__((mode(KC))) float128_complex; +#else +typedef _Complex float __attribute__((mode(TC))) float128_complex; +#endif + +extern float128_complex cfloat128_1 (void); +extern float128_complex cfloat128_2 (void); + +#define FLOAT128_ARG(NAME, OP) ARG_OP(float128, float128_complex, NAME, OP) +#define FLOAT128_PTR(NAME, OP) PTR_OP(float128, float128_complex, NAME, OP) +#define FLOAT128_CALL() CALL_OP(float128, float128_complex, cfloat128_1, cfloat128_2) + +#else +#define FLOAT128_ARG(NAME, OP) +#define FLOAT128_PTR(NAME, OP) +#define FLOAT128_CALL() +#endif + +#ifndef NO_LDOUBLE +typedef _Complex long double ldouble_complex; +extern ldouble_complex cldouble1 (void); +extern ldouble_complex cldouble2 (void); + +#define LDOUBLE_ARG(NAME, OP) ARG_OP(ldouble, ldouble_complex, NAME, OP) +#define LDOUBLE_PTR(NAME, OP) PTR_OP(ldouble, ldouble_complex, NAME, OP) +#define LDOUBLE_CALL() CALL_OP(ldouble, ldouble_complex, cldouble1, cldouble2) + +#else +#define LDOUBLE_ARG(NAME, OP) +#define LDOUBLE_PTR(NAME, OP) +#define LDOUBLE_CALL() +#endif + + +#define ARG_OP(SUFFIX, TYPE, NAME, OP) \ +TYPE arg_ ## NAME ## _ ## SUFFIX (TYPE a, TYPE b) \ +{ \ + return a OP b; \ +} + +#define PTR_OP(SUFFIX, TYPE, NAME, OP) \ +void ptr_ ## NAME ## _ ## SUFFIX (TYPE *p, TYPE *a, TYPE *b) \ +{ \ + *p = *a OP *b; \ +} + +#define CALL_OP(SUFFIX, TYPE, FUNC1, FUNC2) \ +TYPE call_ ## SUFFIX (void) \ +{ \ + TYPE value1 = FUNC1 (); \ + TYPE value2 = FUNC2 (); \ + return value1 + value2; \ +} + +#ifndef NO_ARG +#ifndef NO_ADD +FLOAT_ARG (add, +) +DOUBLE_ARG (add, +) +FLOAT128_ARG (add, +) +LDOUBLE_ARG (add, +) +#endif + +#ifndef NO_SUB +FLOAT_ARG (sub, -) +DOUBLE_ARG (sub, -) +FLOAT128_ARG (sub, -) +LDOUBLE_ARG (sub, -) +#endif + +#ifndef NO_MUL +FLOAT_ARG (mul, *) +DOUBLE_ARG (mul, *) +FLOAT128_ARG (mul, *) +LDOUBLE_ARG (mul, *) +#endif + +#ifndef NO_DIV +FLOAT_ARG (div, /) +DOUBLE_ARG (div, /) +FLOAT128_ARG (div, /) +LDOUBLE_ARG (div, /) +#endif +#endif + +#ifndef NO_PTR +#ifndef NO_ADD +FLOAT_PTR (add, +) +DOUBLE_PTR (add, +) +FLOAT128_PTR (add, +) +LDOUBLE_PTR (add, +) +#endif + +#ifndef NO_SUB +FLOAT_PTR (sub, -) +DOUBLE_PTR (sub, -) +FLOAT128_PTR (sub, -) +LDOUBLE_PTR (sub, -) +#endif + +#ifndef NO_MUL +FLOAT_PTR (mul, *) +DOUBLE_PTR (mul, *) +FLOAT128_PTR (mul, *) +LDOUBLE_PTR (mul, *) +#endif + +#ifndef NO_DIV +FLOAT_PTR (div, /) +DOUBLE_PTR (div, /) +FLOAT128_PTR (div, /) +LDOUBLE_PTR (div, /) +#endif +#endif + +#ifndef NO_CALL +FLOAT_CALL () +DOUBLE_CALL () +FLOAT128_CALL () +LDOUBLE_CALL () +#endif diff --git a/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c b/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c new file mode 100644 index 00000000000..06dd8e2f01b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/float128-complex-2.c @@ -0,0 +1,160 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-require-effective-target powerpc_float128_hw_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-O2 -mcpu=power9 -mfloat128 -mfloat128-hardware" } */ + +#ifndef NO_FLOAT +typedef _Complex float float_complex; +extern float_complex cfloat1 (void); +extern float_complex cfloat2 (void); + +#define FLOAT_ARG(NAME, OP) ARG_OP(float, float_complex, NAME, OP) +#define FLOAT_PTR(NAME, OP) PTR_OP(float, float_complex, NAME, OP) +#define FLOAT_CALL() CALL_OP(float, float_complex, cfloat1, cfloat2) + +#else +#define FLOAT_ARG(NAME, OP) +#define FLOAT_PTR(NAME, OP) +#define FLOAT_CALL() +#endif + +#ifndef NO_DOUBLE +typedef _Complex double double_complex; +extern double_complex cdouble1 (void); +extern double_complex cdouble2 (void); + +#define DOUBLE_ARG(NAME, OP) ARG_OP(double, double_complex, NAME, OP) +#define DOUBLE_PTR(NAME, OP) PTR_OP(double, double_complex, NAME, OP) +#define DOUBLE_CALL() CALL_OP(double, double_complex, cdouble1, cdouble2) + +#else +#define DOUBLE_ARG(NAME, OP) +#define DOUBLE_PTR(NAME, OP) +#define DOUBLE_CALL() +#endif + +#ifndef NO_FLOAT128 +#ifdef __VSX__ +typedef _Complex float __attribute__((mode(KC))) float128_complex; +#else +typedef _Complex float __attribute__((mode(TC))) float128_complex; +#endif + +extern float128_complex cfloat128_1 (void); +extern float128_complex cfloat128_2 (void); + +#define FLOAT128_ARG(NAME, OP) ARG_OP(float128, float128_complex, NAME, OP) +#define FLOAT128_PTR(NAME, OP) PTR_OP(float128, float128_complex, NAME, OP) +#define FLOAT128_CALL() CALL_OP(float128, float128_complex, cfloat128_1, cfloat128_2) + +#else +#define FLOAT128_ARG(NAME, OP) +#define FLOAT128_PTR(NAME, OP) +#define FLOAT128_CALL() +#endif + +#ifndef NO_LDOUBLE +typedef _Complex long double ldouble_complex; +extern ldouble_complex cldouble1 (void); +extern ldouble_complex cldouble2 (void); + +#define LDOUBLE_ARG(NAME, OP) ARG_OP(ldouble, ldouble_complex, NAME, OP) +#define LDOUBLE_PTR(NAME, OP) PTR_OP(ldouble, ldouble_complex, NAME, OP) +#define LDOUBLE_CALL() CALL_OP(ldouble, ldouble_complex, cldouble1, cldouble2) + +#else +#define LDOUBLE_ARG(NAME, OP) +#define LDOUBLE_PTR(NAME, OP) +#define LDOUBLE_CALL() +#endif + + +#define ARG_OP(SUFFIX, TYPE, NAME, OP) \ +TYPE arg_ ## NAME ## _ ## SUFFIX (TYPE a, TYPE b) \ +{ \ + return a OP b; \ +} + +#define PTR_OP(SUFFIX, TYPE, NAME, OP) \ +void ptr_ ## NAME ## _ ## SUFFIX (TYPE *p, TYPE *a, TYPE *b) \ +{ \ + *p = *a OP *b; \ +} + +#define CALL_OP(SUFFIX, TYPE, FUNC1, FUNC2) \ +TYPE call_ ## SUFFIX (void) \ +{ \ + TYPE value1 = FUNC1 (); \ + TYPE value2 = FUNC2 (); \ + return value1 + value2; \ +} + +#ifndef NO_ARG +#ifndef NO_ADD +FLOAT_ARG (add, +) +DOUBLE_ARG (add, +) +FLOAT128_ARG (add, +) +LDOUBLE_ARG (add, +) +#endif + +#ifndef NO_SUB +FLOAT_ARG (sub, -) +DOUBLE_ARG (sub, -) +FLOAT128_ARG (sub, -) +LDOUBLE_ARG (sub, -) +#endif + +#ifndef NO_MUL +FLOAT_ARG (mul, *) +DOUBLE_ARG (mul, *) +FLOAT128_ARG (mul, *) +LDOUBLE_ARG (mul, *) +#endif + +#ifndef NO_DIV +FLOAT_ARG (div, /) +DOUBLE_ARG (div, /) +FLOAT128_ARG (div, /) +LDOUBLE_ARG (div, /) +#endif +#endif + +#ifndef NO_PTR +#ifndef NO_ADD +FLOAT_PTR (add, +) +DOUBLE_PTR (add, +) +FLOAT128_PTR (add, +) +LDOUBLE_PTR (add, +) +#endif + +#ifndef NO_SUB +FLOAT_PTR (sub, -) +DOUBLE_PTR (sub, -) +FLOAT128_PTR (sub, -) +LDOUBLE_PTR (sub, -) +#endif + +#ifndef NO_MUL +FLOAT_PTR (mul, *) +DOUBLE_PTR (mul, *) +FLOAT128_PTR (mul, *) +LDOUBLE_PTR (mul, *) +#endif + +#ifndef NO_DIV +FLOAT_PTR (div, /) +DOUBLE_PTR (div, /) +FLOAT128_PTR (div, /) +LDOUBLE_PTR (div, /) +#endif +#endif + +#ifndef NO_CALL +FLOAT_CALL () +DOUBLE_CALL () +FLOAT128_CALL () +LDOUBLE_CALL () +#endif + +/* { dg-final { scan-assembler "xsaddqp" } } */ +/* { dg-final { scan-assembler "xssubqp" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/inf128-1.c b/gcc/testsuite/gcc.target/powerpc/inf128-1.c new file mode 100644 index 00000000000..df797e33220 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/inf128-1.c @@ -0,0 +1,55 @@ +/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ +/* { dg-options "-mfloat128 -mvsx" } */ + +void abort (); + +typedef unsigned long long int uint64_t; + +typedef union +{ + __float128 value; + + struct + { +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ + unsigned negative:1; + unsigned exponent:15; + unsigned quiet_nan:1; + uint64_t mant_high:47; + uint64_t mant_low:64; +#else + uint64_t mant_low:64; + uint64_t mant_high:47; + unsigned quiet_nan:1; + unsigned exponent:15; + unsigned negative:1; +#endif + } nan; + +} ieee854_float128; + +int +main (int argc, int *argv[]) +{ + ieee854_float128 y; + + y.value = __builtin_infq (); + + if (y.nan.negative != 0 + || y.nan.exponent != 0x7fff + || y.nan.quiet_nan != 0 + || y.nan.mant_high != 0 + || y.nan.mant_low != 0) + abort (); + + y.value = __builtin_huge_valq (); + + if (y.nan.negative != 0 + || y.nan.exponent != 0x7fff + || y.nan.quiet_nan != 0 + || y.nan.mant_high != 0 + || y.nan.mant_low != 0) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c new file mode 100644 index 00000000000..0a1e18e1651 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-1.c @@ -0,0 +1,23 @@ +/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mfloat128 -mvsx" } */ + +void abort (); + +typedef __complex float __cfloat128 __attribute__((mode(KC))); + +__cfloat128 multiply (__cfloat128 x, __cfloat128 y) +{ + return x * y; +} + +__cfloat128 z, a; + +int main () +{ + z = multiply (2.0q + 1.0jq, 3.0q + 1.0jq); + a = 5.0q + 5.0jq; + if (z != a) + abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/nan128-1.c b/gcc/testsuite/gcc.target/powerpc/nan128-1.c new file mode 100644 index 00000000000..e327f40f837 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/nan128-1.c @@ -0,0 +1,77 @@ +/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */ +/* { dg-options "-mfloat128 -mvsx" } */ + +#include <stdio.h> + +void abort (); + +typedef unsigned long long int uint64_t; + +typedef union +{ + __float128 value; + + struct + { +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ + unsigned negative:1; + unsigned exponent:15; + unsigned quiet_nan:1; + uint64_t mant_high:47; + uint64_t mant_low:64; +#else + uint64_t mant_low:64; + uint64_t mant_high:47; + unsigned quiet_nan:1; + unsigned exponent:15; + unsigned negative:1; +#endif + } nan; + +} ieee854_float128; + +int +main (int argc, int *argv[]) +{ + ieee854_float128 y; + + y.value = __builtin_nanq ("1"); + + if (y.nan.negative != 0 + || y.nan.exponent != 0x7fff + || y.nan.quiet_nan != 1 + || y.nan.mant_high != 0 + || y.nan.mant_low != 1) + abort (); + + y.value = __builtin_nanq ("0x2ab3c"); + + if (y.nan.negative != 0 + || y.nan.exponent != 0x7fff + || y.nan.quiet_nan != 1 + || y.nan.mant_high != 0 + || y.nan.mant_low != 0x2ab3c) + abort (); + + y.value = __builtin_nansq ("1"); + + if ( + y.nan.negative != 0 + || y.nan.exponent != 0x7fff + || y.nan.quiet_nan != 0 + || y.nan.mant_high != 0 + || y.nan.mant_low != 1 + ) + abort (); + + y.value = __builtin_nansq ("0x2ab3c"); + + if (y.nan.negative != 0 + || y.nan.exponent != 0x7fff + || y.nan.quiet_nan != 0 + || y.nan.mant_high != 0 + || y.nan.mant_low != 0x2ab3c) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c index 4947386721a..b8a03d30f9a 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc64le-*-* } } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ -/* { dg-options "-mcpu=power9 -O3" } */ +/* { dg-options "-mcpu=power9 -O3 -mfloat128" } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-final { scan-assembler "lxvx" } } */ /* { dg-final { scan-assembler "stxvx" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c new file mode 100644 index 00000000000..13b72872d74 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2" } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ + +#include <altivec.h> + +vector int +foo_r (int a) +{ + return (vector int) { a, a, a, a }; /* mtvsrws */ +} + +vector int +foo_r2 (int a) +{ + return vec_splats (a); /* mtvsrws */ +} + +vector int +foo_p (int *a) +{ + return (vector int) { *a, *a, *a, *a }; /* lxvwsx */ +} + +/* { dg-final { scan-assembler-times "mtvsrws" 2 } } */ +/* { dg-final { scan-assembler-times "lxvwsx" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c new file mode 100644 index 00000000000..2468e92dddb --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-2.c @@ -0,0 +1,38 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2" } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ + +#include <altivec.h> + +vector float +foo_r (float a) +{ + return (vector float) { a, a, a, a }; /* xscvdpspn/xxspltw */ +} + +vector float +foo_r2 (float a) +{ + return vec_splats (a); /* xscvdpspn/xxspltw */ +} + +vector float +foo_g (float *a) +{ + float f = *a; + + __asm__ (" # %0" : "+r" (f)); + return (vector float) { f, f, f, f }; /* mtvsrws */ +} + +vector float +foo_p (float *a) +{ + return (vector float) { *a, *a, *a, *a }; /* lxvwsx */ +} + +/* { dg-final { scan-assembler-times "xscvdpspn" 2 } } */ +/* { dg-final { scan-assembler-times "xxspltw" 2 } } */ +/* { dg-final { scan-assembler-times "mtvsrws" 1 } } */ +/* { dg-final { scan-assembler-times "lxvwsx" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c new file mode 100644 index 00000000000..8a121da2572 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-3.c @@ -0,0 +1,61 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2" } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ + +#include <altivec.h> + +typedef vector signed char v16qi_t; +typedef vector short v8hi_t; +typedef vector int v4si_t; +typedef vector long long v2di_t; + +void v16qi_0a (v16qi_t *p) { *p = (v16qi_t) { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; } +void v8hi_0a (v8hi_t *p) { *p = (v8hi_t) { 0, 0, 0, 0, 0, 0, 0, 0 }; } +void v4si_0a (v4si_t *p) { *p = (v4si_t) { 0, 0, 0, 0 }; } +void v2di_0a (v2di_t *p) { *p = (v2di_t) { 0, 0 }; } + +void v16qi_0b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)0); } +void v8hi_0b (v8hi_t *p) { *p = (v8hi_t) vec_splats ((short)0); } +void v4si_0b (v4si_t *p) { *p = (v4si_t) vec_splats ((int)0); } +void v2di_0b (v2di_t *p) { *p = (v2di_t) vec_splats ((long long)0); } + +void v16qi_m1a (v16qi_t *p) { *p = (v16qi_t) { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; } +void v8hi_m1a (v8hi_t *p) { *p = (v8hi_t) { -1, -1, -1, -1, -1, -1, -1, -1 }; } +void v4si_m1a (v4si_t *p) { *p = (v4si_t) { -1, -1, -1, -1 }; } +void v2di_m1a (v2di_t *p) { *p = (v2di_t) { -1, -1 }; } + +void v16qi_m1b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)-1); } +void v8hi_m1b (v8hi_t *p) { *p = (v8hi_t) vec_splats ((short)-1); } +void v4si_m1b (v4si_t *p) { *p = (v4si_t) vec_splats ((int)-1); } +void v2di_m1b (v2di_t *p) { *p = (v2di_t) vec_splats ((long long)-1); } + +void v16qi_5a (v16qi_t *p) { *p = (v16qi_t) { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 }; } +void v8hi_5a (v8hi_t *p) { *p = (v8hi_t) { 5, 5, 5, 5, 5, 5, 5, 5 }; } +void v4si_5a (v4si_t *p) { *p = (v4si_t) { 5, 5, 5, 5 }; } +void v2di_5a (v2di_t *p) { *p = (v2di_t) { 5, 5 }; } + +void v16qi_5b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)5); } +void v8hi_5b (v8hi_t *p) { *p = (v8hi_t) vec_splats ((short)5); } +void v4si_5b (v4si_t *p) { *p = (v4si_t) vec_splats ((int)5); } +void v2di_5b (v2di_t *p) { *p = (v2di_t) vec_splats ((long long)5); } + +void v16qi_33a (v16qi_t *p) { *p = (v16qi_t) { 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33 }; } +void v8hi_33a (v8hi_t *p) { *p = (v8hi_t) { 33, 33, 33, 33, 33, 33, 33, 33 }; } +void v4si_33a (v4si_t *p) { *p = (v4si_t) { 33, 33, 33, 33 }; } +void v2di_33a (v2di_t *p) { *p = (v2di_t) { 33, 33 }; } + +void v16qi_33b (v16qi_t *p) { *p = (v16qi_t) vec_splats ((signed char)33); } +void v8hi_33b (v8hi_t *p) { *p = (v8hi_t) vec_splats ((short)33); } +void v4si_33b (v4si_t *p) { *p = (v4si_t) vec_splats ((int)33); } +void v2di_33b (v2di_t *p) { *p = (v2di_t) vec_splats ((long long)33); } + +/* { dg-final { scan-assembler "xxspltib" } } */ +/* { dg-final { scan-assembler "vextsb2d" } } */ +/* { dg-final { scan-assembler "vextsb2w" } } */ +/* { dg-final { scan-assembler "vupk\[hl\]sb" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "lxvw4x" } } */ +/* { dg-final { scan-assembler-not "lxv " } } */ +/* { dg-final { scan-assembler-not "lxvx" } } */ +/* { dg-final { scan-assembler-not "lvx" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c b/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c new file mode 100644 index 00000000000..d643324afe1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/p9-splat-4.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2" } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ + +#include <altivec.h> + +vector long long foo (long long a) { return (vector long long) { a, a }; } + +/* { dg-final { scan-assembler "mtvsrdd" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr47755.c b/gcc/testsuite/gcc.target/powerpc/pr47755.c index 8feef291e56..d5feecac691 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr47755.c +++ b/gcc/testsuite/gcc.target/powerpc/pr47755.c @@ -3,7 +3,7 @@ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7" } */ -/* { dg-final { scan-assembler "xxlxor" } } */ +/* { dg-final { scan-assembler "xxlxor\|vspltis\[bhw\]" } } */ /* { dg-final { scan-assembler-not "lxvd2x" } } */ /* { dg-final { scan-assembler-not "lxvw4x" } } */ /* { dg-final { scan-assembler-not "lvx" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr71186.c b/gcc/testsuite/gcc.target/powerpc/pr71186.c new file mode 100644 index 00000000000..22762ccafb7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71186.c @@ -0,0 +1,32 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2" } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ + +static unsigned short x[(16384/sizeof(unsigned short))] __attribute__ ((aligned (16))); +static unsigned short y[(16384/sizeof(unsigned short))] __attribute__ ((aligned (16))); +static unsigned short a; + +void obfuscate(void *a, ...); + +static void __attribute__((noinline)) do_one(void) +{ + unsigned long i; + + obfuscate(x, y, &a); + + for (i = 0; i < (16384/sizeof(unsigned short)); i++) + y[i] = a * x[i]; + + obfuscate(x, y, &a); +} + +int main(void) +{ + unsigned long i; + + for (i = 0; i < 1000000; i++) + do_one(); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr71656-1.c b/gcc/testsuite/gcc.target/powerpc/pr71656-1.c new file mode 100644 index 00000000000..fa6b4ffb816 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71656-1.c @@ -0,0 +1,20 @@ +/* Test for reload ICE arising from POWER9 Vector Dform code generation. */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-O1 -mcpu=power9 -mpower9-dform-vector -mno-lra" } */ + +typedef __attribute__((altivec(vector__))) int type_t; +type_t +func (type_t *src) +{ + asm volatile ("# force the base reg on the load below to be spilled" + : /* no outputs */ + : /* no inputs */ + : "r0", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r14", "r15", + "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", + "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"); + return src[1]; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr71656-2.c b/gcc/testsuite/gcc.target/powerpc/pr71656-2.c new file mode 100644 index 00000000000..99855fa1667 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71656-2.c @@ -0,0 +1,47 @@ +/* Test for reload ICE arising from POWER9 Vector Dform code generation. */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-O3 -mcpu=power9 -mpower9-dform-vector -mno-lra -funroll-loops -fno-aggressive-loop-optimizations" } */ + +typedef double vec[3]; +struct vec_t +{ + vec x; + vec y; +}; +int a, j, k, l, m, n, o, p, q; +double b, i; +vec c; +double h[6]; +void func1 (vec); + +void +func2 (double *b) +{ + for (; k; k--) + for (; j <= k;) + for (; m <= q; m++) + for (; n <= k; n++) + for (; o <= l; o++) + { + j = p + m + n + o; + h[j] = i; + } +} + +void +func3 (void) +{ + struct vec_t d; + func1 (d.y); + func2 (&b); + for (; a;) + { + double *e = d.y, *g; + double f; + c[0] = g[0] + f * e[0]; + c[1] = g[1] + f * e[1]; + func1 (c); + } +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr71670.c b/gcc/testsuite/gcc.target/powerpc/pr71670.c new file mode 100644 index 00000000000..18fb62759d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71670.c @@ -0,0 +1,7 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O1" } */ + +volatile int a; +int b; +void fn1(void) { b + (long)b || a; } diff --git a/gcc/testsuite/gcc.target/powerpc/pr71698.c b/gcc/testsuite/gcc.target/powerpc/pr71698.c new file mode 100644 index 00000000000..c752f64e1c7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71698.c @@ -0,0 +1,13 @@ +/* Test for a reload ICE arising from trying to direct move a TDmode value. */ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-require-effective-target dfp } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-O1 -mcpu=power9 -mno-lra" } */ + +extern void testvad128 (int n, ...); +void +testitd128 (_Decimal128 g01d128) +{ + testvad128 (1, g01d128); +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr71720.c b/gcc/testsuite/gcc.target/powerpc/pr71720.c new file mode 100644 index 00000000000..732daf97595 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71720.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +/* Verify that we generate xxspltw <reg>,<reg>,0 for V4SFmode splat. */ + +vector float +splat_v4sf (float f) +{ + return (vector float) { f, f, f, f }; +} + +/* { dg-final { scan-assembler "xscvdpspn " } } */ +/* { dg-final { scan-assembler "xxspltw .*,.*,0" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr71763.c b/gcc/testsuite/gcc.target/powerpc/pr71763.c new file mode 100644 index 00000000000..7910a90b988 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71763.c @@ -0,0 +1,27 @@ +// PR target/71763 +// { dg-do compile } +// { dg-options "-O1 -mvsx" } +// { dg-xfail-if "PR70098" { lp64 && powerpc64_no_dm } } +// { dg-prune-output ".*internal compiler error.*" } + +int a, b; +float c; + +void fn2(void); + +void fn1(void) +{ + long d; + + for (d = 3; d; d--) { + for (a = 0; a <= 1; a++) { + b &= 1; + if (b) { + for (;;) { + fn2(); + c = d; + } + } + } + } +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr71805.c b/gcc/testsuite/gcc.target/powerpc/pr71805.c new file mode 100644 index 00000000000..02db059dff9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71805.c @@ -0,0 +1,113 @@ +/* { dg-require-effective-target p9vector_hw } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O3 --param tree-reassoc-width=1" } */ + +/* Originally from gcc.dg/vect/pr45752.c. */ +#include <stdarg.h> + +#ifdef __cplusplus +extern "C" { +#endif +extern void abort (void); +extern void exit (int); +#ifdef __cplusplus +} +#endif + +#define M00 100 +#define M10 216 +#define M20 23 +#define M30 237 +#define M40 437 + +#define M01 1322 +#define M11 13 +#define M21 27271 +#define M31 2280 +#define M41 284 + +#define M02 74 +#define M12 191 +#define M22 500 +#define M32 111 +#define M42 1114 + +#define M03 134 +#define M13 117 +#define M23 11 +#define M33 771 +#define M43 71 + +#define M04 334 +#define M14 147 +#define M24 115 +#define M34 7716 +#define M44 16 + +#define N 20 + +void foo (unsigned int *__restrict__ pInput, + unsigned int *__restrict__ pOutput, + unsigned int *__restrict__ pInput2, + unsigned int *__restrict__ pOutput2) +{ + unsigned int i, a, b, c, d, e; + + for (i = 0; i < N / 5; i++) + { + a = *pInput++; + b = *pInput++; + c = *pInput++; + d = *pInput++; + e = *pInput++; + + *pOutput++ = M00 * a + M01 * b + M02 * c + M03 * d + M04 * e; + *pOutput++ = M10 * a + M11 * b + M12 * c + M13 * d + M14 * e; + *pOutput++ = M20 * a + M21 * b + M22 * c + M23 * d + M24 * e; + *pOutput++ = M30 * a + M31 * b + M32 * c + M33 * d + M34 * e; + *pOutput++ = M40 * a + M41 * b + M42 * c + M43 * d + M44 * e; + + + a = *pInput2++; + b = *pInput2++; + c = *pInput2++; + d = *pInput2++; + e = *pInput2++; + + *pOutput2++ = M00 * a + M01 * b + M02 * c + M03 * d + M04 * e; + *pOutput2++ = M10 * a + M11 * b + M12 * c + M13 * d + M14 * e; + *pOutput2++ = M20 * a + M21 * b + M22 * c + M23 * d + M24 * e; + *pOutput2++ = M30 * a + M31 * b + M32 * c + M33 * d + M34 * e; + *pOutput2++ = M40 * a + M41 * b + M42 * c + M43 * d + M44 * e; + + } +} + +int main (int argc, const char* argv[]) +{ + unsigned int input[N], output[N], i, input2[N], output2[N]; + unsigned int check_results[N] + = {3208, 1334, 28764, 35679, 2789, 13028, 4754, 168364, 91254, 12399, + 22848, 8174, 307964, 146829, 22009, 32668, 11594, 447564, 202404, 31619 }; + unsigned int check_results2[N] + = {7136, 2702, 84604, 57909, 6633, 16956, 6122, 224204, 113484, 16243, + 26776, 9542, 363804, 169059, 25853, 36596, 12962, 503404, 224634, 35463 }; + + for (i = 0; i < N; i++) + { + input[i] = i%256; + input2[i] = i + 2; + output[i] = 0; + output2[i] = 0; + __asm__ volatile (""); + } + + foo (input, output, input2, output2); + + for (i = 0; i < N; i++) + if (output[i] != check_results[i] + || output2[i] != check_results2[i]) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-1.c b/gcc/testsuite/gcc.target/powerpc/signbit-1.c new file mode 100644 index 00000000000..bdfeb702663 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/signbit-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2 -mfloat128" } */ + +int do_signbit_kf (__float128 a) { return __builtin_signbit (a); } +int do_signbit_if (__ibm128 a) { return __builtin_signbit (a); } +int do_signbit_tf (long double a) { return __builtin_signbit (a); } + +/* { dg-final { scan-assembler-not "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "stxvw4x" } } */ +/* { dg-final { scan-assembler-not "stxsd" } } */ +/* { dg-final { scan-assembler-not "stxsdx" } } */ +/* { dg-final { scan-assembler-times "mfvsrd" 3 } } */ +/* { dg-final { scan-assembler-times "srdi" 3 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-2.c b/gcc/testsuite/gcc.target/powerpc/signbit-2.c new file mode 100644 index 00000000000..b5bd856d909 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/signbit-2.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-options "-mcpu=power9 -O2 -mfloat128" } */ + +int do_signbit_kf (__float128 *a) { return __builtin_signbit (*a); } + +/* { dg-final { scan-assembler-not "stxvd2x" } } */ +/* { dg-final { scan-assembler-not "stxvw4x" } } */ +/* { dg-final { scan-assembler-not "stxsd" } } */ +/* { dg-final { scan-assembler-not "stxsdx" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "lxvw4x" } } */ +/* { dg-final { scan-assembler-not "lxsd" } } */ +/* { dg-final { scan-assembler-not "lxsdx" } } */ +/* { dg-final { scan-assembler-times "ld" 1 } } */ +/* { dg-final { scan-assembler-times "srdi" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-3.c b/gcc/testsuite/gcc.target/powerpc/signbit-3.c new file mode 100644 index 00000000000..cd64143fc2f --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/signbit-3.c @@ -0,0 +1,172 @@ +/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-require-effective-target ppc_float128_sw } */ +/* { dg-options "-mcpu=power7 -O2 -mfloat128 -lm" } */ + +#ifdef DEBUG +#include <stdio.h> +#endif + +#include <stddef.h> +#include <stdint.h> +#include <inttypes.h> +#include <stdlib.h> +#include <math.h> + +#if defined(__BIG_ENDIAN__) +struct ieee128 { + uint64_t upper; + uint64_t lower; +}; + +#elif defined(__LITTLE_ENDIAN__) +struct ieee128 { + uint64_t lower; + uint64_t upper; +}; + +#else +#error "Unknown system" +#endif + +union ieee_union { + __float128 f128; + struct ieee128 st128; +}; + +#ifdef DEBUG +static int num_errors = 0; + +__attribute__((__noinline__)) +static void +failure (int expected, int got, __float128 x) +{ + unsigned sign; + unsigned exponent; + uint64_t mantissa1; + uint64_t mantissa2; + uint64_t upper; + uint64_t lower; + + union ieee_union u; + + u.f128 = x; + upper = u.st128.upper; + lower = u.st128.lower; + + sign = (unsigned)((upper >> 63) & 1); + exponent = (unsigned)((upper >> 48) & ((((uint64_t)1) << 16) - 1)); + mantissa1 = (upper & ((((uint64_t)1) << 48) - 1)); + mantissa2 = lower; + + printf ("Expected %d, got %d, %c 0x%.4x 0x%.12" PRIx64 " 0x%.16" PRIx64, + expected, got, + sign ? '-' : '+', + exponent, + mantissa1, + mantissa2); + + num_errors++; +} + +#else + +#define failure(E, G, F) abort () +#endif + +__attribute__((__noinline__)) +static void +test_signbit_arg (__float128 f128, int expected) +{ + int sign = __builtin_signbit (f128); + + if ((expected != 0 && sign == 0) + || (expected == 0 && sign != 0)) + failure (f128, expected, sign); +} + +__attribute__((__noinline__)) +static void +test_signbit_mem (__float128 *ptr, int expected) +{ + int sign = __builtin_signbit (*ptr); + + if ((expected != 0 && sign == 0) + || (expected == 0 && sign != 0)) + failure (*ptr, expected, sign); +} + +__attribute__((__noinline__)) +static void +test_signbit_gpr (__float128 *ptr, int expected) +{ + __float128 f128 = *ptr; + int sign; + + __asm__ (" # %0" : "+r" (f128)); + + sign = __builtin_signbit (f128); + if ((expected != 0 && sign == 0) + || (expected == 0 && sign != 0)) + failure (f128, expected, sign); +} + +__attribute__((__noinline__)) +static void +test_signbit (__float128 f128, int expected) +{ +#ifdef DEBUG + union ieee_union u; + u.f128 = f128; + printf ("Expecting %d, trying %-5g " + "(0x%.16" PRIx64 " 0x%.16" PRIx64 ")\n", + expected, (double)f128, + u.st128.upper, u.st128.lower); +#endif + + test_signbit_arg (f128, expected); + test_signbit_mem (&f128, expected); + test_signbit_gpr (&f128, expected); +} + +int +main (void) +{ + union ieee_union u; + + test_signbit (+0.0q, 0); + test_signbit (+1.0q, 0); + + test_signbit (-0.0q, 1); + test_signbit (-1.0q, 1); + + test_signbit (__builtin_copysign (__builtin_infq (), +1.0q), 0); + test_signbit (__builtin_copysign (__builtin_infq (), -1.0q), 1); + + test_signbit (__builtin_copysign (__builtin_nanq (""), +1.0q), 0); + test_signbit (__builtin_copysign (__builtin_nanq (""), -1.0q), 1); + + /* force the bottom double word to have specific bits in the 'sign' bit to + make sure we are picking the right word. */ + u.f128 = 1.0q; + u.st128.lower = 0ULL; + test_signbit (u.f128, 0); + + u.st128.lower = ~0ULL; + test_signbit (u.f128, 0); + + u.f128 = -1.0q; + u.st128.lower = 0ULL; + test_signbit (u.f128, 1); + + u.st128.lower = ~0ULL; + test_signbit (u.f128, 1); + +#ifdef DEBUG + printf ("%d error(s) were found\n", num_errors); + if (num_errors) + return num_errors; +#endif + + return 0; +} + diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c new file mode 100644 index 00000000000..4d66df8ffdf --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-0.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned int +doAbsoluteDifferenceUnsignedInt (__vector unsigned int *p, + __vector unsigned int *q) +{ + __vector unsigned int source_1, source_2; + __vector unsigned int result; + + source_1 = *p; + source_2 = *q; + + result = __builtin_vec_vadu (source_1, source_2); + return result; +} + +/* { dg-final { scan-assembler "vabsduw" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c new file mode 100644 index 00000000000..28c85655066 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned int +doAbsoluteDifferenceUnsignedIntMacro (__vector unsigned int *p, + __vector unsigned int *q) +{ + __vector unsigned int result, source_1, source_2; + + source_1 = *p; + source_2 = *q; + + result = vec_absd (source_1, source_2); + return result; +} + +/* { dg-final { scan-assembler "vabsduw" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c new file mode 100644 index 00000000000..726c90478c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-2.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned short +doAbsoluteDifferenceUnsignedShort (__vector unsigned short *p, + __vector unsigned short *q) +{ + __vector unsigned short source_1, source_2; + __vector unsigned short result; + + source_1 = *p; + source_2 = *q; + + result = __builtin_vec_vadu (source_1, source_2); + return result; +} + +/* { dg-final { scan-assembler "vabsduh" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c new file mode 100644 index 00000000000..d3618db7184 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-3.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned short +doAbsoluteDifferenceUnsignedShortMacro (__vector unsigned short *p, + __vector unsigned short *q) +{ + __vector unsigned short result, source_1, source_2; + + source_1 = *p; + source_2 = *q; + + result = vec_absd (source_1, source_2); + return result; +} + +/* { dg-final { scan-assembler "vabsduh" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c new file mode 100644 index 00000000000..e5744d13994 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-4.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned char +doAbsoluteDifferenceUnsignedChar (__vector unsigned char *p, + __vector unsigned char *q) +{ + __vector unsigned char source_1, source_2; + __vector unsigned char result; + + source_1 = *p; + source_2 = *q; + + result = __builtin_vec_vadu (source_1, source_2); + return result; +} + +/* { dg-final { scan-assembler "vabsdub" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c new file mode 100644 index 00000000000..5dc14a956f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsdu-5.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned char +doAbsoluteDifferenceUnsignedCharMacro (__vector unsigned char *p, + __vector unsigned char *q) +{ + __vector unsigned char result, source_1, source_2; + + source_1 = *p; + source_2 = *q; + + result = vec_absd (source_1, source_2); + return result; +} + +/* { dg-final { scan-assembler "vabsdub" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c new file mode 100644 index 00000000000..649811ae0ce --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned char +doAbsoluteDifferenceUnsigned (__vector unsigned char *p, + __vector unsigned char *q) +{ + __vector unsigned char source_1, source_2; + __vector unsigned char uc_result; + + source_1 = *p; + source_2 = *q; + + uc_result = __builtin_vec_vadub (source_1, source_2); + return uc_result; +} + +/* { dg-final { scan-assembler "vabsdub" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c new file mode 100644 index 00000000000..142c3d39af5 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsdub-2.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned char +doAbsoluteDifferenceUnsigned (__vector unsigned char *p, + __vector unsigned char *q) +{ + __vector unsigned char source_1, source_2; + __vector unsigned char uc_result; + + source_1 = *p; + source_2 = *q; + + uc_result = vec_absdb (source_1, source_2); + return uc_result; +} + +/* { dg-final { scan-assembler "vabsdub" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c new file mode 100644 index 00000000000..6d933b9aa78 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned short +doAbsoluteDifferenceUnsigned (__vector unsigned short *p, + __vector unsigned short *q) +{ + __vector unsigned short source_1, source_2; + __vector unsigned short us_result; + + source_1 = *p; + source_2 = *q; + + us_result = __builtin_vec_vaduh (source_1, source_2); + return us_result; +} + +/* { dg-final { scan-assembler "vabsduh" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c new file mode 100644 index 00000000000..bf28b713b2c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsduh-2.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned short +doAbsoluteDifferenceUnsignedMacro (__vector unsigned short *p, + __vector unsigned short *q) +{ + __vector unsigned short result, source_1, source_2; + + source_1 = *p; + source_2 = *q; + + result = vec_absdh (source_1, source_2); + return result; +} + +/* { dg-final { scan-assembler "vabsduh" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c new file mode 100644 index 00000000000..5188d68e143 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-1.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned int +doAbsoluteDifferenceUnsigned (__vector unsigned int *p, + __vector unsigned int *q) +{ + __vector unsigned int source_1, source_2; + __vector unsigned int ui_result; + + source_1 = *p; + source_2 = *q; + + ui_result = __builtin_vec_vaduw (source_1, source_2); + return ui_result; +} + +/* { dg-final { scan-assembler "vabsduw" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c new file mode 100644 index 00000000000..bf93d96d967 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vadsduw-2.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +/* This test should succeed on both 32- and 64-bit configurations. */ +#include <altivec.h> + +__vector unsigned int +doAbsoluteDifferenceUnsignedMacro (__vector unsigned int *p, + __vector unsigned int *q) +{ + __vector unsigned int result, source_1, source_2; + + source_1 = *p; + source_2 = *q; + + result = vec_absdw (source_1, source_2); + return result; +} + +/* { dg-final { scan-assembler "vabsduw" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vslv-0.c b/gcc/testsuite/gcc.target/powerpc/vslv-0.c new file mode 100644 index 00000000000..9ad04dd92e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vslv-0.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +__vector unsigned char +doCharShiftLeft (__vector unsigned char *p, __vector unsigned char *q) +{ + __vector unsigned char result, input, shift_distance; + result = __builtin_vec_vslv (input, shift_distance); + return result; +} + +/* { dg-final { scan-assembler "vslv" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vslv-1.c b/gcc/testsuite/gcc.target/powerpc/vslv-1.c new file mode 100644 index 00000000000..2d09543c814 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vslv-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +__vector unsigned char +doCharShiftLeft (__vector unsigned char *p, __vector unsigned char *q) +{ + __vector unsigned char result, input, shift_distance; + result = vec_slv (input, shift_distance); + return result; +} + +/* { dg-final { scan-assembler "vslv" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsrv-0.c b/gcc/testsuite/gcc.target/powerpc/vsrv-0.c new file mode 100644 index 00000000000..29c7e3fde20 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsrv-0.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +__vector unsigned char +doCharShiftLeft (__vector unsigned char *p, __vector unsigned char *q) +{ + __vector unsigned char result, input, shift_distance; + result = __builtin_vec_vsrv (input, shift_distance); + return result; +} + +/* { dg-final { scan-assembler "vsrv" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsrv-1.c b/gcc/testsuite/gcc.target/powerpc/vsrv-1.c new file mode 100644 index 00000000000..cd3f714bd64 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vsrv-1.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ +/* { dg-options "-mcpu=power9" } */ + +#include <altivec.h> + +__vector unsigned char +doCharShiftLeft (__vector unsigned char *p, __vector unsigned char *q) +{ + __vector unsigned char result, input, shift_distance; + result = vec_srv (input, shift_distance); + return result; +} + +/* { dg-final { scan-assembler "vsrv" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c index 28b62547a34..eb4a13081a2 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-2.c @@ -1,7 +1,8 @@ /* { dg-do compile { target { powerpc64le*-*-* } } } */ /* { dg-skip-if "do not override mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O0" } */ -/* { dg-require-effective-target p9vector_hw } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ /* { dg-final { scan-assembler-times "lxvd2x" 6 } } */ /* { dg-final { scan-assembler-times "lxvw4x" 6 } } */ /* { dg-final { scan-assembler-times "lxvh8x" 4 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c index 9a7a9943033..a116316c174 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c @@ -1,7 +1,8 @@ /* { dg-do compile { target { powerpc64-*-* } } } */ /* { dg-skip-if "do not override mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O0" } */ -/* { dg-require-effective-target p9vector_hw } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ /* { dg-final { scan-assembler-times "lxvx" 40 } } */ /* { dg-final { scan-assembler-times "stxvx" 40 } } */ diff --git a/gcc/testsuite/gcc.target/sparc/fpcmp.c b/gcc/testsuite/gcc.target/sparc/fpcmp.c new file mode 100644 index 00000000000..1255d67442f --- /dev/null +++ b/gcc/testsuite/gcc.target/sparc/fpcmp.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-mvis4" } */ + +typedef unsigned char vec8 __attribute__((vector_size(8))); + +long test_fpcmple8 (vec8 a, vec8 b) +{ + return __builtin_vis_fpcmple8 (a, b); +} + +long test_fpcmpgt8 (vec8 a, vec8 b) +{ + return __builtin_vis_fpcmpgt8 (a, b); +} + +/* { dg-final { scan-assembler "fpcmple8\t%" } } */ +/* { dg-final { scan-assembler "fpcmpgt8\t%" } } */ + diff --git a/gcc/testsuite/gcc.target/sparc/fpcmpu.c b/gcc/testsuite/gcc.target/sparc/fpcmpu.c new file mode 100644 index 00000000000..816a22d7078 --- /dev/null +++ b/gcc/testsuite/gcc.target/sparc/fpcmpu.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-mvis4" } */ + + +typedef short vec16 __attribute__((vector_size(8))); +typedef int vec32 __attribute__((vector_size(8))); + +long test_fpcmpule16 (vec16 a, vec16 b) +{ + return __builtin_vis_fpcmpule16 (a, b); +} + +long test_fpcmpugt16 (vec16 a, vec16 b) +{ + return __builtin_vis_fpcmpugt16 (a, b); +} + +long test_fpcmpule32 (vec32 a, vec32 b) +{ + return __builtin_vis_fpcmpule32 (a, b); +} + +long test_fpcmpugt32 (vec32 a, vec32 b) +{ + return __builtin_vis_fpcmpugt32 (a, b); +} + +/* { dg-final { scan-assembler "fpcmpule16\t%" } } */ +/* { dg-final { scan-assembler "fpcmpugt16\t%" } } */ +/* { dg-final { scan-assembler "fpcmpule32\t%" } } */ +/* { dg-final { scan-assembler "fpcmpugt32\t%" } } */ diff --git a/gcc/testsuite/gcc.target/sparc/vis4misc.c b/gcc/testsuite/gcc.target/sparc/vis4misc.c new file mode 100644 index 00000000000..b520b12b381 --- /dev/null +++ b/gcc/testsuite/gcc.target/sparc/vis4misc.c @@ -0,0 +1,126 @@ +/* { dg-do compile } */ +/* { dg-options "-mvis4" } */ +typedef int __v2si __attribute__((vector_size(8))); +typedef short __v4hi __attribute__((vector_size(8))); +typedef unsigned char __v8qi __attribute__((vector_size(8))); + +__v8qi test_fpadd8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpadd8 (x, y); +} + +__v8qi test_fpadds8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpadds8 (x, y); +} + +__v8qi test_fpaddus8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpaddus8 (x, y); +} + +__v4hi test_fpaddus16 (__v4hi x, __v4hi y) +{ + return __builtin_vis_fpaddus16 (x, y); +} + +__v8qi test_fpsub8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpsub8 (x, y); +} + +__v8qi test_fpsubs8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpsubs8 (x, y); +} + +__v8qi test_fpsubus8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpsubus8 (x, y); +} + +__v4hi test_fpsubus16 (__v4hi x, __v4hi y) +{ + return __builtin_vis_fpsubus16 (x, y); +} + +__v8qi test_fpmax8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpmax8 (x, y); +} + +__v4hi test_fpmax16 (__v4hi x, __v4hi y) +{ + return __builtin_vis_fpmax16 (x, y); +} + +__v2si test_fpmax32 (__v2si x, __v2si y) +{ + return __builtin_vis_fpmax32 (x, y); +} + +__v8qi test_fpmaxu8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpmaxu8 (x, y); +} + +__v4hi test_fpmaxu16 (__v4hi x, __v4hi y) +{ + return __builtin_vis_fpmaxu16 (x, y); +} + +__v2si test_fpmaxu32 (__v2si x, __v2si y) +{ + return __builtin_vis_fpmaxu32 (x, y); +} + +__v8qi test_fpmin8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpmin8 (x, y); +} + +__v4hi test_fpmin16 (__v4hi x, __v4hi y) +{ + return __builtin_vis_fpmin16 (x, y); +} + +__v2si test_fpmin32 (__v2si x, __v2si y) +{ + return __builtin_vis_fpmin32 (x, y); +} + +__v8qi test_fpminu8 (__v8qi x, __v8qi y) +{ + return __builtin_vis_fpminu8 (x, y); +} + +__v4hi test_fpminu16 (__v4hi x, __v4hi y) +{ + return __builtin_vis_fpminu16 (x, y); +} + +__v2si test_fpminu32 (__v2si x, __v2si y) +{ + return __builtin_vis_fpminu32 (x, y); +} + +/* { dg-final { scan-assembler "fpadd8\t%" } } */ +/* { dg-final { scan-assembler "fpadds8\t%" } } */ +/* { dg-final { scan-assembler "fpaddus8\t%" } } */ +/* { dg-final { scan-assembler "fpaddus16\t%" } } */ +/* { dg-final { scan-assembler "fpsub8\t%" } } */ +/* { dg-final { scan-assembler "fpsubs8\t%" } } */ +/* { dg-final { scan-assembler "fpsubus8\t%" } } */ +/* { dg-final { scan-assembler "fpsubus16\t%" } } */ +/* { dg-final { scan-assembler "fpmax8\t%" } } */ +/* { dg-final { scan-assembler "fpmax16\t%" } } */ +/* { dg-final { scan-assembler "fpmax32\t%" } } */ +/* { dg-final { scan-assembler "fpmaxu8\t%" } } */ +/* { dg-final { scan-assembler "fpmaxu16\t%" } } */ +/* { dg-final { scan-assembler "fpmaxu32\t%" } } */ +/* { dg-final { scan-assembler "fpmin8\t%" } } */ +/* { dg-final { scan-assembler "fpmin16\t%" } } */ +/* { dg-final { scan-assembler "fpmin32\t%" } } */ +/* { dg-final { scan-assembler "fpminu8\t%" } } */ +/* { dg-final { scan-assembler "fpminu16\t%" } } */ +/* { dg-final { scan-assembler "fpminu32\t%" } } */ |