From fe987a1fbb72f2fd298d6625e63520f2ef14fd93 Mon Sep 17 00:00:00 2001
From: Mark Shinwell <shinwell@codesourcery.com>
Date: Wed, 16 Aug 2006 18:59:17 +0000
Subject: 	gcc/ 	* config/arm/pr-support.c (__gnu_unwind_execute):
 Insert " + 1" in 	necessary places to pass the correct "number of
 registers" values 	to _Unwind_VRS_Pop.

	gcc/testsuite/
	* g++.dg/eh/arm-vfp-unwind.C: New test.


git-svn-id: https://gcc.gnu.org/svn/gcc/branches/csl/sourcerygxx-4_1@116186 138bc75d-0d04-0410-961f-82ee72b054a4
---
 ChangeLog.csl                            | 10 ++++++++
 gcc/config/arm/pr-support.c              |  8 +++----
 gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C | 39 ++++++++++++++++++++++++++++++++
 3 files changed, 53 insertions(+), 4 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C

diff --git a/ChangeLog.csl b/ChangeLog.csl
index 143f24fe55f..37212b34154 100644
--- a/ChangeLog.csl
+++ b/ChangeLog.csl
@@ -1,3 +1,13 @@
+2006-08-16  Mark Shinwell  <shinwell@codesourcery.com>
+
+	gcc/
+	* config/arm/pr-support.c (__gnu_unwind_execute): Insert " + 1" in
+	necessary places to pass the correct "number of registers" values
+	to _Unwind_VRS_Pop.
+
+	gcc/testsuite/
+	* g++.dg/eh/arm-vfp-unwind.C: New test.
+
 2006-08-14  Richard Sandiford  <richard@codesourcery.com>
 
 	gcc/
diff --git a/gcc/config/arm/pr-support.c b/gcc/config/arm/pr-support.c
index 072b4a98d5c..0e750bf3e09 100644
--- a/gcc/config/arm/pr-support.c
+++ b/gcc/config/arm/pr-support.c
@@ -224,7 +224,7 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws)
 	    {
 	      /* Pop VFP registers with fldmx.  */
 	      op = next_unwind_byte (uws);
-	      op = ((op & 0xf0) << 12) | (op & 0xf);
+	      op = ((op & 0xf0) << 12) | ((op & 0xf) + 1);
 	      if (_Unwind_VRS_Pop (context, _UVRSC_VFP, op, _UVRSD_VFPX)
 		  != _UVRSR_OK)
 		return _URC_FAILURE;
@@ -253,7 +253,7 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws)
 	    {
 	      /* Pop iWMMXt D registers.  */
 	      op = next_unwind_byte (uws);
-	      op = ((op & 0xf0) << 12) | (op & 0xf);
+	      op = ((op & 0xf0) << 12) | ((op & 0xf) + 1);
 	      if (_Unwind_VRS_Pop (context, _UVRSC_WMMXD, op, _UVRSD_UINT64)
 		  != _UVRSR_OK)
 		return _URC_FAILURE;
@@ -284,7 +284,7 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws)
 	    {
 	      /* Pop FPA registers.  */
 	      op = next_unwind_byte (uws);
-	      op = ((op & 0xf0) << 12) | (op & 0xf);
+	      op = ((op & 0xf0) << 12) | ((op & 0xf) + 1);
 	      if (_Unwind_VRS_Pop (context, _UVRSC_FPA, op, _UVRSD_FPAX)
 		  != _UVRSR_OK)
 		return _URC_FAILURE;
@@ -294,7 +294,7 @@ __gnu_unwind_execute (_Unwind_Context * context, __gnu_unwind_state * uws)
 	    {
 	      /* Pop VFP registers with fldmd.  */
 	      op = next_unwind_byte (uws);
-	      op = ((op & 0xf0) << 12) | (op & 0xf);
+	      op = ((op & 0xf0) << 12) | ((op & 0xf) + 1);
 	      if (_Unwind_VRS_Pop (context, _UVRSC_VFP, op, _UVRSD_DOUBLE)
 		  != _UVRSR_OK)
 		return _URC_FAILURE;
diff --git a/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C b/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C
new file mode 100644
index 00000000000..de9a4958224
--- /dev/null
+++ b/gcc/testsuite/g++.dg/eh/arm-vfp-unwind.C
@@ -0,0 +1,39 @@
+/* { dg-require-effective-target arm32 } */
+/* { dg-do run } */
+
+/* Test to catch off-by-one errors in arm/pr-support.c.  */
+
+#if defined (__VFP_FP__) && !defined (__SOFTFP__)
+
+#include <iostream>
+
+using namespace std;
+
+static void donkey ()
+{
+  asm volatile ("fcpyd d9, %P0" : : "w" (1.2345) : "d9");
+  throw 1;
+}
+
+int main()
+{
+  try
+    {
+      donkey ();
+    }
+  catch (int foo)
+    {
+      return 0;
+    }
+  return 1;
+}
+
+#else
+
+int main()
+{
+  return 0;
+}
+
+#endif
+
-- 
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