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; Options for the rs6000 port of the compiler
;
; Copyright (C) 2005 Free Software Foundation, Inc.
; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 2, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING. If not, write to the Free
; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
; 02110-1301, USA.
mpower
Target Report RejectNegative Mask(POWER)
Use POWER instruction set
mno-power
Target Report RejectNegative
Do not use POWER instruction set
mpower2
Target Report Mask(POWER2)
Use POWER2 instruction set
mpowerpc
Target Report RejectNegative Mask(POWERPC)
Use PowerPC instruction set
mno-powerpc
Target Report RejectNegative
Do not use PowerPC instruction set
mpowerpc64
Target Report Mask(POWERPC64)
Use PowerPC-64 instruction set
mpowerpc-gpopt
Target Report Mask(PPC_GPOPT)
Use PowerPC General Purpose group optional instructions
mpowerpc-gfxopt
Target Report Mask(PPC_GFXOPT)
Use PowerPC Graphics group optional instructions
mmfcrf
Target Report Mask(MFCRF)
Use PowerPC V2.01 single field mfcr instruction
mpopcntb
Target Report Mask(POPCNTB)
Use PowerPC V2.02 popcntb instruction
mfprnd
Target Report Mask(FPRND)
Use PowerPC V2.02 floating point rounding instructions
maltivec
Target Report Mask(ALTIVEC)
Use AltiVec instructions
mmultiple
Target Report Mask(MULTIPLE)
Generate load/store multiple instructions
mstring
Target Report Mask(STRING)
Generate string instructions for block moves
mnew-mnemonics
Target Report RejectNegative Mask(NEW_MNEMONICS)
Use new mnemonics for PowerPC architecture
mold-mnemonics
Target Report RejectNegative InverseMask(NEW_MNEMONICS)
Use old mnemonics for PowerPC architecture
msoft-float
Target Report RejectNegative Mask(SOFT_FLOAT)
Do not use hardware floating point
mhard-float
Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
Use hardware floating point
mno-update
Target Report RejectNegative Mask(NO_UPDATE)
Do not generate load/store with update instructions
mupdate
Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE)
Generate load/store with update instructions
mno-fused-madd
Target Report RejectNegative Mask(NO_FUSED_MADD)
Do not generate fused multiply/add instructions
mfused-madd
Target Report RejectNegative InverseMask(NO_FUSED_MADD, FUSED_MADD)
Generate fused multiply/add instructions
msched-prolog
Target Report Mask(SCHED_PROLOG)
Schedule the start and end of the procedure
msched-epilog
Target Undocumented Mask(SCHED_PROLOG) MaskExists
maix-struct-return
Target Report RejectNegative Var(aix_struct_return)
Return all structures in memory (AIX default)
msvr4-struct-return
Target Report RejectNegative Var(aix_struct_return,0) VarExists
Return small structures in registers (SVR4 default)
mxl-compat
Target Report Var(TARGET_XL_COMPAT)
Conform more closely to IBM XLC semantics
mswdiv
Target Report Var(swdiv)
Generate software floating point divide for better throughput
mno-fp-in-toc
Target Report RejectNegative Mask(NO_FP_IN_TOC)
Do not place floating point constants in TOC
mfp-in-toc
Target Report RejectNegative InverseMask(NO_FP_IN_TOC)
Place floating point constants in TOC
mno-sum-in-toc
Target RejectNegative Mask(NO_SUM_IN_TOC)
Do not place symbol+offset constants in TOC
msum-in-toc
Target RejectNegative InverseMask(NO_SUM_IN_TOC)
Place symbol+offset constants in TOC
; Output only one TOC entry per module. Normally linking fails if
; there are more than 16K unique variables/constants in an executable. With
; this option, linking fails only if there are more than 16K modules, or
; if there are more than 16K unique variables/constant in a single module.
;
; This is at the cost of having 2 extra loads and one extra store per
; function, and one less allocable register.
mminimal-toc
Target Report Mask(MINIMAL_TOC)
Use only one TOC entry per procedure
mfull-toc
Target Report
Put everything in the regular TOC
mvrsave
Target Report Var(TARGET_ALTIVEC_VRSAVE)
Generate VRSAVE instructions when generating AltiVec code
mvrsave=
Target RejectNegative Joined
-mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead
misel
Target Var(rs6000_isel)
Generate isel instructions
misel=
Target RejectNegative Joined
-misel=yes/no Deprecated option. Use -misel/-mno-isel instead
mspe
Target Var(rs6000_spe)
Generate SPE SIMD instructions on E500
mspe=
Target RejectNegative Joined
-mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead
mdebug=
Target RejectNegative Joined
-mdebug= Enable debug output
mabi=
Target RejectNegative Joined
-mabi= Specify ABI to use
mcpu=
Target RejectNegative Joined
-mcpu= Use features of and schedule code for given CPU
mtune=
Target RejectNegative Joined
-mtune= Schedule code for given CPU
mtraceback=
Target RejectNegative Joined
-mtraceback= Select full, part, or no traceback table
mlongcall
Target Report Var(rs6000_default_long_calls)
Avoid all range limits on call instructions
mwarn-altivec-long
Target Var(rs6000_warn_altivec_long) Init(1)
Warn about deprecated 'vector long ...' AltiVec type usage
mfloat-gprs=
Target RejectNegative Joined
-mfloat-gprs= Select GPR floating point method
mlong-double-
Target RejectNegative Joined UInteger
-mlong-double-<n> Specify size of long double (64 or 128 bits)
msched-costly-dep=
Target RejectNegative Joined
Determine which dependences between insns are considered costly
minsert-sched-nops=
Target RejectNegative Joined
Specify which post scheduling nop insertion scheme to apply
malign-
Target RejectNegative Joined
Specify alignment of structure fields default/natural
mprioritize-restricted-insns=
Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority)
Specify scheduling priority for dispatch slot restricted insns
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