diff options
author | Peter Griffin <peter.griffin@linaro.org> | 2015-03-25 16:54:42 +0100 |
---|---|---|
committer | Peter Griffin <peter.griffin@linaro.org> | 2015-09-28 05:00:51 +0100 |
commit | 54b7f683f139b8c27a7b03d7948f9d1da97ceb14 (patch) | |
tree | 5afba553d056f2e02b587c34d7d43dee78132fe4 | |
parent | d648e1c907ebe8d4021bdf110dcc13a30c1e3515 (diff) |
ARM: STi: DT: STiH407: Add FDMA driver dt nodes.
These nodes are required to get the fdma driver working
on STiH407 based silicon.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/stih407-family.dtsi | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index ae0527754000..7f3d6679c5f7 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -610,5 +610,59 @@ clocks = <&clk_sysin>; st,pwm-num-chan = <4>; }; + + /* fdma audio */ + fdma0: dma-controller@8e20000 { + compatible = "st,stih407-fdma-mpe31"; + reg = <0x8e20000 0x20000>; + interrupts = <GIC_SPI 5 IRQ_TYPE_NONE>; + dma-channels = <16>; + #dma-cells = <3>; + st,fdma-id = <0>; + clocks = <&clk_s_c0_flexgen CLK_FDMA>, + <&clk_s_c0_flexgen CLK_EXT2F_A9>, + <&clk_s_c0_flexgen CLK_EXT2F_A9>, + <&clk_s_c0_flexgen CLK_EXT2F_A9>; + clock-names = "fdma_slim", + "fdma_hi", + "fdma_low", + "fdma_ic"; + }; + + /* fdma app */ + fdma1: dma-controller@8e40000 { + compatible = "st,stih407-fdma-mpe31"; + reg = <0x8e40000 0x20000>; + interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; + dma-channels = <16>; + #dma-cells = <3>; + st,fdma-id = <1>; + clocks = <&clk_s_c0_flexgen CLK_FDMA>, + <&clk_s_c0_flexgen CLK_TX_ICN_DMU>, + <&clk_s_c0_flexgen CLK_TX_ICN_DMU>, + <&clk_s_c0_flexgen CLK_EXT2F_A9>; + clock-names = "fdma_slim", + "fdma_hi", + "fdma_low", + "fdma_ic"; + }; + + /* fdma free running */ + fdma2: dma-controller@8e60000 { + compatible = "st,stih407-fdma-mpe31"; + reg = <0x8e60000 0x20000>; + interrupts = <GIC_SPI 9 IRQ_TYPE_NONE>; + dma-channels = <16>; + #dma-cells = <3>; + st,fdma-id = <2>; + clocks = <&clk_s_c0_flexgen CLK_FDMA>, + <&clk_s_c0_flexgen CLK_EXT2F_A9>, + <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, + <&clk_s_c0_flexgen CLK_EXT2F_A9>; + clock-names = "fdma_slim", + "fdma_hi", + "fdma_low", + "fdma_ic"; + }; }; }; |