diff options
| -rw-r--r-- | boot.S | 71 |
1 files changed, 39 insertions, 32 deletions
@@ -17,49 +17,26 @@ _start: @ @ CPU initialisation @ - mrc p15, 0, r0, c0, c0, 5 @ MPIDR (ARMv7 only) - and r0, r0, #15 @ CPU number - cmp r0, #0 @ primary CPU? - beq 2f - - @ - @ Secondary CPUs (following the RealView SMP booting protocol) - @ - ldr r1, =filesystem - 0x100 - adr r2, 1f - ldmia r2, {r3 - r7} @ move the code to a location - stmia r1, {r3 - r7} @ less likely to be overridden -#ifdef VEXPRESS - ldr r0, =0x1c010030 @ VE SYS_FLAGS register -#else - ldr r0, =0x10000030 @ RealView SYS_FLAGS register -#endif - mov pc, r1 @ branch to the relocated code -1: -#ifdef VEXPRESS - wfe -#endif - ldr r1, [r0] - cmp r1, #0 - beq 1b - mov pc, r1 @ branch to the given address -#endif + mrc p15, 0, r4, c0, c0, 5 @ MPIDR (ARMv7 only) + and r4, r4, #15 @ CPU number @ @ Hypervisor / TrustZone initialization @ -2: + @ Set all interrupts to be non-secure ldr r0, =0x2c001000 @ Dist GIC base ldr r1, [r0, #0x04] @ Type Register - and r1, r1, #0x1f + cmp r4, #0 + andeq r1, r1, #0x1f + movne r1, #0 add r2, r0, #0x080 @ Security Register 0 mvn r3, #0 -3: str r3, [r2] +2: str r3, [r2] sub r1, r1, #1 add r2, r2, #4 @ Next security register cmp r1, #-1 - bne 3b + bne 2b @ Set GIC priority mask bit [7] = 1 ldr r0, =0x2c002000 @ CPU GIC base @@ -68,7 +45,7 @@ _start: @ Set NSACR to allow coprocessor access from non-secure mrc p15, 0, r0, c1, c1, 2 - ldr r1, =0x3fff + ldr r1, =0x43fff orr r0, r0, r1 mcr p15, 0, r0, c1, c1, 2 @@ -78,7 +55,37 @@ _start: mov r7, #0xffffffff smc #0 @ Change to NS-mode + @ Check CPU nr again + mrc p15, 0, r0, c0, c0, 5 @ MPIDR (ARMv7 only) + and r0, r0, #15 @ CPU number + cmp r0, #0 @ primary CPU? + beq 2f + + @ + @ Secondary CPUs (following the RealView SMP booting protocol) + @ + ldr r1, =filesystem - 0x100 + adr r2, 1f + ldmia r2, {r3 - r7} @ move the code to a location + stmia r1, {r3 - r7} @ less likely to be overridden +#ifdef VEXPRESS + ldr r0, =0x1c010030 @ VE SYS_FLAGS register +#else + ldr r0, =0x10000030 @ RealView SYS_FLAGS register +#endif + mov pc, r1 @ branch to the relocated code +1: +#ifdef VEXPRESS + wfe +#endif + ldr r1, [r0] + cmp r1, #0 + beq 1b + mov pc, r1 @ branch to the given address +#endif + +2: @ @ UART initialisation (38400 8N1) @ |