Age | Commit message (Collapse) | Author |
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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The ducati text and ipc sections have switched to use the
static carveout, and so there is no need to set-aside the
dynamic carveout memory (IPU - 7MB memory)
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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Signed-off-by: Andy Green <andy.green@linaro.org>
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OPP table has a wrong name for fdif clock, fixed the same.
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Acked-by: Vishwanath BS <vishwanath.bs@ti.com>
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DSP has two reset lines, one for MMU and another for the core
itself. The MMU reset line needs to be deasserted first so that
it can be programmed before deasserting the core reset. There is
a single hwmod device for DSP currently, and this would not allow
the remoteproc code to program and manage the DSP properly. This
device has therefore been split into two different hwmod devices
to allow independent control of the MMU and the processor core.
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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SL2IF is a module within the IVAHD domain, and has no reset
lines of its own. The hwmod setup initialization for SL2IF
requires that the IVA domain be enabled. The HWMOD_INIT_NO_RESET
flag on the iva hwmod keeps the IVA in reset and disabled,
causing the SL2IF to be stuck in transition.
The HWMOD_INIT_NO_IDLE flags are removed from all the IVA
hwmod structures, as when combined with the INIT_NO_RESET
would leave them in an improper hwmod state machine.
The above problems and fixed with the changes made, and also
help in achieving low power states for the device.
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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The HWMOD_INIT_NO_IDLE flag has been removed from the ISS
hwmod data. With this flag set, the ISS device is being
enabled and is never idled after the _setup step during
hwmod initialization.
This is not idled until the time ISS has been used and go
through a enable/disable sequence. This causes the chip not
to achieve a low power state after bootup.
Signed-off-by: Miguel Vadillo <vadillo@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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The IVA sequencer hwmod data for OMAP4 is missing clock names.
This may cause an improper hwmod setup, and would miss out on
the proper reference counting of the modules using the IVA
clock. This has been corrected.
Signed-off-by: Chandra Sekhar.Anagani <chandu@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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The SL2IF hwmod data for OMAP4 is missing the chip version and
the clock domain name fields. The absence of chip name caused
the hwmod to be ignored altogether during registration, and
the lack of the clock domain caused the hwmod setup to fail,
rendering ipu pretty-much non-functional, and may lead to a
boot failure.
This has been corrected.
Signed-off-by: Chandra Sekhar.Anagani <chandu@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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The FDIF hwmod data for OMAP4 is missing the chip version and
the clock domain name fields. The absence of chip name caused
the hwmod to be ignored altogether during registration, and
the lack of the clock domain caused the hwmod setup to fail,
rendering fdif use-cases non-functional.
This missing data has been added.
Signed-off-by: Chandra Sekhar.Anagani <chandu@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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IPU is missing the clock names on the individual processor
pseudo-hwmod data and clock domain on the main ipu hwmod.
Adding the clock names help keep the reference count. The
lack of the clock domain causes the hwmod setup to be
incomplete and may lead to a boot failure.
This data has been added.
Signed-off-by: Chandra Sekhar Anagani <chandu@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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The OMX driver does not need TILER for basic messaging. The
call to tiler_virt2phys() is moved behind a check for
CONFIG_TI_TILER to break the dependency. If TILER is not
included in the kernel then only mappings of
RPC_OMX_MAP_INFO_NONE are allowed. Others would return an
error back to userspace.
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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SGX544 requires Y and UV to be contiguous in SGX virtual address space. This
is done by using single FD for two ion handles.
Change-Id: I33ced876905d74e6293a2c32df0612f01a23d13f
Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
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This patch adds return values to the pa to da conversion function.
This will help in propagation of proper error codes to the calling
functions.
Change-Id: Ie547f7b7e7c51eff4b7998cbd336a61663995708
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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All aux clocks are derived from CORE or PER dpll post divider(m3x2).
However on OMAP5, there are additional OPT clock controls between the
DPLL post divider and the leaf aux clock. This OPT clock control nodes
merely support enabling or disabling the corresponding clock output.
The aux clock requests in rpmsg resmgr have been adapted to request a
desired rate for a aux clock by accounting for this additional OPT
clock control node.
Signed-off-by: Suman Anna <s-anna@ti.com>
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Camera requires an additional regulator on OMAP5. Added
the support for requesting this new regulator through rpmsg
resource manager.
The bound check for the regulator id has also been made
robust.
Signed-off-by: Suman Anna <s-anna@ti.com>
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Add support for cam2pwr and cam2csi regulators to enable
camera functionality on the OMAP5 SEVM board.
Signed-off-by: Suman Anna <s-anna@ti.com>
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This patch sets the cam/iss clock domain from HW_AUTO to just
SW_SUP. This patch is based on a similar patch done for OMAP4,
"ARM: OMAP: clockdomain: set iss clk domain to just SWSUP"
This is done because CAM domain has no module wake-up dependency
with any other clock domain of the device and the dynamic
dependency from L3_main_2 is always disabled, the domain needs
to be in force wakeup in order to be able to be used or accessed
for configuration.
Also since there is no clock in the domain managed automatically
by the hardware, so there is no need to configure automatic
clock domain transition. SW should keep the SW_WKUP domain
transition as long as a module in the domain is required to
be functional.
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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This patch accompanies the omap4 softreset delay patch to include omap5.
See "omap: hwmod: add softreset delay field".
Signed-off-by: Cris Jansson <cjansson@ti.com>
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Corrected the iva hwmod data to have separate hwmod devices
to deal with multiple processors with associated reset
lines.
The iva sequencers do not need a dedicated sysconfig. Hence,
a separate hwmod class is defined for them.
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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Corrected the iss hwmod data, and enabled it.
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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Corrected the ipu hwmod data to have the correct
ipu address space, and separate hwmod devices
to deal with multiple processors with associated
reset lines.
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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Added hwmod data for sl2if.
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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Added hwmod data for fdif.
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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This patch adds clock data for ipu, iva, iss and sl2if
Also corrected fdif clock data.
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
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Calling request_firmware_nowait is just adding a little delay
before requesting the firwmare. Sometimes, it is not enough for
udev or FS to be ready, causing an issue loading ducati firmware.
Now, we make sure udev is up before requesting the firmware and
also retrying when request_firmware returns -ENOENT.
NOTE: This fixes the issue when the kernel boots but there is not
userspace yet (as when charging the phone). As soon as there is
userspace the remoteproc firmware will be requested.
Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
Signed-off-by: Hervé Fache <h-fache@ti.com>
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This patch includes memory carveout changes based off
the original change made for omap4.
Signed-off-by: Hervé Fache <h-fache@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
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Else a minimal build (without remoteproc) ends up with build error:
arch/arm/plat-omap/built-in.o: In function `rproc_user_release':
arch/arm/plat-omap/rproc_user.c:63: undefined reference to `rproc_set_secure'
arch/arm/plat-omap/built-in.o: In function `rproc_user_write':
arch/arm/plat-omap/rproc_user.c:123: undefined reference to `rproc_set_secure'
arch/arm/plat-omap/rproc_user.c:114: undefined reference to `rproc_set_secure'
This patch is an extension of the original patch done for omap4
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
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Signed-off-by: Cris Jansson <cjansson@ti.com>
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Mailbox in OMAP5 functions the same way as in OMAP4.
Added the necessary macros and compiler options to
add support for OMAP5.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Cris Jansson <cjansson@ti.com>
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Added CONFIG_ARCH_OMAP5 and cpu_is_omap54xx() checks
along side those for OMAP4, to enable OMAP5.
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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Added the necessary macros and compiler options to
add support for OMAP5
Signed-off-by: Cris Jansson <cjansson@ti.com>
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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Need to enable hwspinlock for omap5. Hence enabled the
dependency for hwspinlock on ARCH_OMAP5.
Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
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