(pcb "/home/grant/hacking/hardware/96boards uart/96boards-uart.dsn" (parser (string_quote ") (space_in_quoted_tokens on) (host_cad "KiCad's Pcbnew") (host_version "(22-Jun-2014 BZR 4027)-stable") ) (resolution um 10) (unit um) (structure (layer F.Cu (type signal) (property (index 0) ) ) (layer B.Cu (type signal) (property (index 1) ) ) (boundary (path pcb 0 90000 -108000 90000 -122000 140000 -122000 140000 -108000 90000 -108000) ) (via "Via[0-1]_889:635_um" "Via[0-1]_889:0_um") (rule (width 254) (clearance 254.1) (clearance 254.1 (type default_smd)) (clearance 63.5 (type smd_smd)) ) ) (placement (component SOT23_6 (place Q1 118500 -117500 front 0 (PN DMN601DMK)) ) (component SM0402_r (place R1 115500 -119000 front 0 (PN R)) (place R3 115500 -116000 back 180 (PN R)) (place R2 121500 -116000 front 180 (PN R)) (place R4 121500 -119000 front 180 (PN R)) ) (component "SIL-6" (place P2 106000 -119000 front 0 (PN CONN_6)) ) (component PIN_ARRAY_2MM_20X2 (place P1 119000 -112000 front 0 (PN CONN_20X2)) ) (component "SIL2MM-8" (place P3 131000 -119000 front 0 (PN CONN_8)) ) ) (library (image SOT23_6 (outline (path signal 127 -508 -762 -1270 -254)) (outline (path signal 127 1270 -762 -1333.5 -762)) (outline (path signal 127 -1333.5 -762 -1333.5 762)) (outline (path signal 127 -1333.5 762 1270 762)) (outline (path signal 127 1270 762 1270 -762)) (pin Rect[T]Pad_701.04x1000.76_um 6 -952.5 1270) (pin Rect[T]Pad_701.04x1000.76_um 5 0 1270) (pin Rect[T]Pad_701.04x1000.76_um 4 952.5 1270) (pin Rect[T]Pad_701.04x1000.76_um 3 952.5 -1270) (pin Rect[T]Pad_701.04x1000.76_um 2 0 -1270) (pin Rect[T]Pad_701.04x1000.76_um 1 -952.5 -1270) ) (image SM0402_r (outline (path signal 71.12 -254 381 -762 381)) (outline (path signal 71.12 -762 381 -762 -381)) (outline (path signal 71.12 -762 -381 -254 -381)) (outline (path signal 71.12 254 381 762 381)) (outline (path signal 71.12 762 381 762 -381)) (outline (path signal 71.12 762 -381 254 -381)) (pin Rect[T]Pad_398.78x599.44_um 1 -449.58 0) (pin Rect[T]Pad_398.78x599.44_um 2 449.58 0) ) (image "SIL-6" (outline (path signal 304.8 -7620 -1270 -7620 1270)) (outline (path signal 304.8 -7620 1270 7620 1270)) (outline (path signal 304.8 7620 1270 7620 -1270)) (outline (path signal 304.8 7620 -1270 -7620 -1270)) (outline (path signal 304.8 -5080 -1270 -5080 1270)) (pin Rect[A]Pad_1397x1397_um 1 -6350 0) (pin Round[A]Pad_1397_um 2 -3810 0) (pin Round[A]Pad_1397_um 3 -1270 0) (pin Round[A]Pad_1397_um 4 1270 0) (pin Round[A]Pad_1397_um 5 3810 0) (pin Round[A]Pad_1397_um 6 6350 0) ) (image PIN_ARRAY_2MM_20X2 (outline (path signal 304.8 20540 -2540 -20540 -2540)) (outline (path signal 304.8 20540 2540 -20540 2540)) (outline (path signal 304.8 20540 2540 20540 -2540)) (outline (path signal 304.8 -20540 2540 -20540 -2540)) (pin Rect[A]Pad_1200x1200_um 1 -19000 -1000) (pin Round[A]Pad_1200_um 2 -19000 1000) (pin Round[A]Pad_1200_um 11 -9000 -1000) (pin Round[A]Pad_1200_um 4 -17000 1000) (pin Round[A]Pad_1200_um 13 -7000 -1000) (pin Round[A]Pad_1200_um 6 -15000 1000) (pin Round[A]Pad_1200_um 15 -5000 -1000) (pin Round[A]Pad_1200_um 8 -13000 1000) (pin Round[A]Pad_1200_um 17 -3000 -1000) (pin Round[A]Pad_1200_um 10 -11000 1000) (pin Round[A]Pad_1200_um 19 -1000 -1000) (pin Round[A]Pad_1200_um 12 -9000 1000) (pin Round[A]Pad_1200_um 21 1000 -1000) (pin Round[A]Pad_1200_um 14 -7000 1000) (pin Round[A]Pad_1200_um 23 3000 -1000) (pin Round[A]Pad_1200_um 16 -5000 1000) (pin Round[A]Pad_1200_um 25 5000 -1000) (pin Round[A]Pad_1200_um 18 -3000 1000) (pin Round[A]Pad_1200_um 27 7000 -1000) (pin Round[A]Pad_1200_um 20 -1000 1000) (pin Round[A]Pad_1200_um 29 9000 -1000) (pin Round[A]Pad_1200_um 22 1000 1000) (pin Round[A]Pad_1200_um 31 11000 -1000) (pin Round[A]Pad_1200_um 24 3000 1000) (pin Round[A]Pad_1200_um 26 5000 1000) (pin Round[A]Pad_1200_um 33 13000 -1000) (pin Round[A]Pad_1200_um 28 7000 1000) (pin Round[A]Pad_1200_um 32 11000 1000) (pin Round[A]Pad_1200_um 34 13000 1000) (pin Round[A]Pad_1200_um 36 15000 1000) (pin Round[A]Pad_1200_um 38 17000 1000) (pin Round[A]Pad_1200_um 35 15000 -1000) (pin Round[A]Pad_1200_um 37 17000 -1000) (pin Round[A]Pad_1200_um 3 -17000 -1000) (pin Round[A]Pad_1200_um 5 -15000 -1000) (pin Round[A]Pad_1200_um 7 -13000 -1000) (pin Round[A]Pad_1200_um 9 -11000 -1000) (pin Round[A]Pad_1200_um 39 19000 -1000) (pin Round[A]Pad_1200_um 40 19000 1000) (pin Round[A]Pad_1200_um 30 9000 1000) ) (image "SIL2MM-8" (outline (path signal 304.8 -8000 1000 8000 1000)) (outline (path signal 304.8 8000 1000 8000 -1000)) (outline (path signal 304.8 8000 -1000 -8000 -1000)) (outline (path signal 304.8 -8000 -1000 -8000 1000)) (outline (path signal 304.8 -6000 -1000 -6000 1000)) (pin Rect[A]Pad_1200x1200_um 1 -7000 0) (pin Round[A]Pad_1200_um 2 -5000 0) (pin Round[A]Pad_1200_um 3 -3000 0) (pin Round[A]Pad_1200_um 4 -1000 0) (pin Round[A]Pad_1200_um 5 1000 0) (pin Round[A]Pad_1200_um 6 3000 0) (pin Round[A]Pad_1200_um 7 5000 0) (pin Round[A]Pad_1200_um 8 7000 0) ) (padstack Round[A]Pad_1200_um (shape (circle F.Cu 1200)) (shape (circle B.Cu 1200)) (attach off) ) (padstack Round[A]Pad_1397_um (shape (circle F.Cu 1397)) (shape (circle B.Cu 1397)) (attach off) ) (padstack Rect[T]Pad_398.78x599.44_um (shape (rect F.Cu -199.39 -299.72 199.39 299.72)) (attach off) ) (padstack Rect[T]Pad_701.04x1000.76_um (shape (rect F.Cu -350.52 -500.38 350.52 500.38)) (attach off) ) (padstack Rect[A]Pad_1200x1200_um (shape (rect F.Cu -600 -600 600 600)) (shape (rect B.Cu -600 -600 600 600)) (attach off) ) (padstack Rect[A]Pad_1397x1397_um (shape (rect F.Cu -698.5 -698.5 698.5 698.5)) (shape (rect B.Cu -698.5 -698.5 698.5 698.5)) (attach off) ) (padstack "Via[0-1]_889:635_um" (shape (circle F.Cu 889)) (shape (circle B.Cu 889)) (attach off) ) (padstack "Via[0-1]_889:0_um" (shape (circle F.Cu 889)) (shape (circle B.Cu 889)) (attach off) ) ) (network (net +1.8V (pins Q1-5 Q1-2 R1-1 R2-1 P1-35) ) (net /UART0_RXD (pins Q1-4 R2-2 P1-7) ) (net /UART0_TXD (pins Q1-1 R1-2 P1-5) ) (net GND (pins P2-1 P1-1 P1-2 P3-8) ) (net "N-000003" (pins Q1-6 R3-2 P2-5 P3-4) ) (net "N-000005" (pins Q1-3 R4-2 P2-4 P3-5) ) (net VCC (pins R3-1 R4-1 P2-3 P3-6) ) (class kicad_default "" +1.8V /UART0_RXD /UART0_TXD GND "N-000003" "N-000005" VCC (circuit (use_via Via[0-1]_889:635_um) ) (rule (width 254) (clearance 254.1) ) ) ) (wiring (wire (path B.Cu 254 100000 -113000 100000 -118650 99650 -119000)(net GND)(type protect)) (wire (path B.Cu 254 100000 -111000 100000 -113000)(net GND)(type protect)) ) )