diff options
author | Marc Zyngier <maz@kernel.org> | 2020-04-25 15:24:49 +0100 |
---|---|---|
committer | Sumit Garg <sumit.garg@linaro.org> | 2020-05-05 12:01:36 +0100 |
commit | ccad64b280378470631a3472d08eec4e8407a24c (patch) | |
tree | aaa443d4f296fd6587df42c016b2a1e04ad2fa47 | |
parent | 3e5bd3ee412683907d0362e0533eea2f5875db42 (diff) |
irqchip/gic: Handle SGIs as standard interrupts
Signed-off-by: Marc Zyngier <maz@kernel.org>
-rw-r--r-- | drivers/irqchip/irq-gic.c | 30 |
1 files changed, 6 insertions, 24 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 8a8a24df1b0b..d879606589b7 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -337,31 +337,13 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); irqnr = irqstat & GICC_IAR_INT_ID_MASK; - if (likely(irqnr > 15 && irqnr < 1020)) { - if (static_branch_likely(&supports_deactivate_key)) - writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); - isb(); - handle_domain_irq(gic->domain, irqnr, regs); - continue; - } - if (irqnr < 16) { + if (unlikely(irqnr >= 1020)) + break; + + if (static_branch_likely(&supports_deactivate_key)) writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); - if (static_branch_likely(&supports_deactivate_key)) - writel_relaxed(irqstat, cpu_base + GIC_CPU_DEACTIVATE); -#ifdef CONFIG_SMP - /* - * Ensure any shared data written by the CPU sending - * the IPI is read after we've read the ACK register - * on the GIC. - * - * Pairs with the write barrier in gic_raise_softirq - */ - smp_rmb(); - handle_IPI(irqnr, regs); -#endif - continue; - } - break; + isb(); + handle_domain_irq(gic->domain, irqnr, regs); } while (1); } |