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authorMisael Lopez Cruz <misael.lopez@ti.com>2014-10-07 01:56:00 -0500
committerMisael Lopez Cruz <misael.lopez@ti.com>2015-01-23 14:13:12 -0600
commit5958f8b537f83ad5097a6aec6f57d2aac4d57df1 (patch)
tree784a96cb831ed1ab8d9b1cb04ebda266ab08bf31 /arch
parent2805e8414843eac8b7d182262a39cb891d408eb6 (diff)
ARM: DTS: dra7: Add McASP2 and McASP6
Add McASP2 and McASP6 device-tree entries. McASP2 is configured and used from the DSP side, except for the PM which is taken care on the MPU side. Change-Id: I9f468f5864f1816a7a298ad67c76d1347565fb87 Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/dra7.dtsi28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 608ae94b9aa..a687ade531a 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1837,6 +1837,18 @@
status = "disabled";
};
+ mcasp2: mcasp@48464000 {
+ compatible = "ti,dra7-mcasp-audio";
+ ti,hwmods = "mcasp2";
+ reg = <0x48464000 0x2000>;
+ reg-names = "mpu";
+ dmas = <&sdma 131 &dmacb>, <&sdma 130 &dmacb>;
+ dma-names = "tx", "rx";
+ clocks = <&mcasp2_ahclkx_mux>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
mcasp3: mcasp@48468000 {
compatible = "ti,dra7-mcasp-audio";
ti,hwmods = "mcasp3";
@@ -1852,6 +1864,22 @@
status = "disabled";
};
+ mcasp6: mcasp@48474000 {
+ compatible = "ti,dra7-mcasp-audio";
+ ti,hwmods = "mcasp6";
+ reg = <0x48474000 0x2000>,
+ <0x4844c000 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+ dmas = <&sdma 139 &dmacb>, <&sdma 138 &dmacb>;
+ dma-names = "tx", "rx";
+ clocks = <&mcasp6_ahclkx_mux>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+
vip1: vip@0x48970000 {
compatible = "ti,vip1";
reg = <0x48970000 0x10000>,