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authorSumit Semwal <sumit.semwal@linaro.org>2019-08-06 21:47:09 +0530
committerSumit Semwal <sumit.semwal@linaro.org>2020-10-13 15:16:57 +0530
commitf95ed82607c6d4237dcdf01469cd6dffde0799ed (patch)
tree42d485b455dccba80c64df35e77b65b76a93d05a
parentb434f3b59a8dc72761fa0acaab31da41414405e2 (diff)
dts: beryllium: add DSI and panel bits.
Enabling the Display panel for beryllium requires DSI, labibb regulators, wled and panel dts nodes to be added. It is also required to keep some of the regulators as always-on. - updated for lab and ibb name changes - updated on top of minimal dts - added couple of clocks to protected clocks Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org> Change-Id: I43ac818d69e78118a5c3b7b66b75531b65284a75
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845-beryllium.dts83
1 files changed, 82 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-beryllium.dts b/arch/arm64/boot/dts/qcom/sdm845-beryllium.dts
index 5016f3cd5c02..2e0cab906c68 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-beryllium.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-beryllium.dts
@@ -49,6 +49,7 @@
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
+ vdda_mipi_dsi0_pll:
vreg_l1a_0p875: ldo1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
@@ -73,6 +74,14 @@
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
+ vreg_l14a_1p88: ldo14 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
vreg_l17a_1p3: ldo17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
@@ -103,10 +112,12 @@
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
+ vdda_mipi_dsi0_1p2:
vreg_l26a_1p2: ldo26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-boot-on;
};
};
};
@@ -114,7 +125,16 @@
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
- <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
+ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+ <GCC_LPASS_Q6_AXI_CLK>,
+ <GCC_LPASS_SWAY_CLK>;
+};
+
+&gpu {
+ zap-shader {
+ memory-region = <&gpu_mem>;
+ firmware-name = "qcom/sdm845/a630_zap.mbn";
+ };
};
/ {
@@ -282,3 +302,64 @@
bias-pull-up;
};
};
+
+&dsi0 {
+ status = "okay";
+ vdda-supply = <&vdda_mipi_dsi0_1p2>;
+
+ ports {
+ port@1 {
+ endpoint {
+ remote-endpoint = <&tianma_nt36672a_in_0>;
+ data-lanes = <0 1 2 3>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "tianma,nt36672a";
+ reg = <0>;
+ vddi0-supply = <&vreg_l14a_1p88>;
+ lab-supply = <&lab>;
+ ibb-supply = <&ibb>;
+
+ reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "panel_active", "panel_suspend";
+ pinctrl-0 = <&sde_dsi_active>;
+ pinctrl-1 = <&sde_dsi_suspend>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ tianma_nt36672a_in_0: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+ };
+ };
+};
+
+&dsi0_phy {
+ status = "okay";
+ vdds-supply = <&vdda_mipi_dsi0_pll>;
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_mdp {
+ status = "okay";
+};
+
+&pmi8998_wled {
+ status = "okay";
+ qcom,current-limit-microamp = <20000>;
+ qcom,enabled-strings = <0 1>;
+ qcom,cabc;
+ qcom,switching-freq = <600>;
+};