diff options
| author | Lucas Stach <dev@lynxeye.de> | 2012-09-26 00:14:35 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:00 -0700 |
| commit | 676ae068d9af8c4848dc8f3a66d65e2bff066239 (patch) | |
| tree | 1749db469181d5b5e3ec52bddf0bc669c773fb7e /drivers/usb/host/ehci-fsl.c | |
| parent | c7e3b2b58636704d504ac270031d87b716d8b273 (diff) | |
usb: ehci: rework to take advantage of new lowlevel interface
Kill off ehci-core.h
It was used to specify some static controller data. To support more than
one controller being active at any time we have to carry the controller
data ourselfes. Change the ehci interface accordingly.
NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed
to do the same thing as other platforms. But the change for now is at least
compile clean.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/usb/host/ehci-fsl.c')
| -rw-r--r-- | drivers/usb/host/ehci-fsl.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index b2d294ee88..7b8f033b03 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -29,7 +29,6 @@ #include <hwconfig.h> #include "ehci.h" -#include "ehci-core.h" /* * Create the appropriate control structures to manage @@ -37,7 +36,7 @@ * * Excerpts from linux ehci fsl driver. */ -int ehci_hcd_init(void) +int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { struct usb_ehci *ehci; const char *phy_type = NULL; @@ -49,9 +48,9 @@ int ehci_hcd_init(void) #endif ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR; - hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); - hcor = (struct ehci_hcor *)((uint32_t) hccr + - HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); + *hcor = (struct ehci_hcor *)((uint32_t) *hccr + + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); /* Set to Host mode */ setbits_le32(&ehci->usbmode, CM_HOST); @@ -82,14 +81,14 @@ int ehci_hcd_init(void) setbits_be32(&ehci->control, UTMI_PHY_EN); udelay(1000); /* delay required for PHY Clk to appear */ #endif - out_le32(&(hcor->or_portsc[0]), PORT_PTS_UTMI); + out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI); } else { #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY) clrbits_be32(&ehci->control, UTMI_PHY_EN); setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI); udelay(1000); /* delay required for PHY Clk to appear */ #endif - out_le32(&(hcor->or_portsc[0]), PORT_PTS_ULPI); + out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI); } /* Enable interface. */ @@ -108,7 +107,7 @@ int ehci_hcd_init(void) * Destroy the appropriate control structures corresponding * the the EHCI host controller. */ -int ehci_hcd_stop(void) +int ehci_hcd_stop(int index) { return 0; } |