Dump some registers when hitting an unexpected exception

At the moment, no information is printed on the UART whenever we hit
an unexpected exception, not even an error message. This is not great
from the user's perspective, who has got no idea of what is going on.

Now we print an error message, as well as the state of some of the
registers. This includes general-purpose registers, as well as some
system registers.

This is implemented for TFTF running:

- in AArch64 state, at EL2;
- in AArch64 state, at NS-EL1;
- in AArch32 state.

We might want to dump more registers in the future but this patch
at least provides a basis we can build upon.

Also, the SP_EL0 has been removed from the list of registers saved in
the CPU context because TFTF always uses SP_ELx and does not touch
SP_EL0 at all.

Change-Id: I56e4afa917b53b5ccccff1d5d09ac8ccfaa6ae49
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/include/lib/aarch32/arch.h b/include/lib/aarch32/arch.h
index 71013a7..9b46601 100644
--- a/include/lib/aarch32/arch.h
+++ b/include/lib/aarch32/arch.h
@@ -514,6 +514,7 @@
 #define ATS1CPR		p15, 0, c7, c8, 0
 #define ATS1HR		p15, 4, c7, c8, 0
 #define DBGOSDLR	p14, 0, c1, c3, 4
+#define HSR		p15, 4, c5, c2, 0
 
 /* Debug register defines. The format is: coproc, opt1, CRn, CRm, opt2 */
 #define HDCR		p15, 4, c1, c1, 1