diff options
author | Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> | 2023-11-13 16:18:49 +0100 |
---|---|---|
committer | Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> | 2023-11-14 17:59:22 +0200 |
commit | a97f4665d15b2b7db8468c375a89489ab7c84254 (patch) | |
tree | 727d5ca58cffcdc6fbed85d09b0bf6b827aff5e9 | |
parent | e7781c84e9b36c948aa84721a09d96ee9e2b6eef (diff) |
refactor(qemu): change way how we enable cpu features
We have to handle wide selection of cpu cores in one TF-A binary:
- v8.0: a53, a57, a72
- v8.2: a55, a76, n1
- v8.4: v1
- v9.0: a710, n2
And then we have QEMU's hybrid: 'max' which has everything QEMU can
emulate.
TF-A for QEMU platforms was built for v8.5 architecture. But turned out
that 'max' has v8.7 flag now (HCX) which we need to have. And this
enabled set of mandatory features which made TF-A not-bootable on
v8.0/8.2 cpus.
So I decided to follow Arm FVP way and do build for v8.0 with set of
feature flags enabled. This way we have bare minimum to make v8.0 cpus
boot. And then all features from newer cores are enabled with runtime
check which makes them boot.
Tested with BSA/SBSA ACS and Debian Linux 6.5 kernel.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Change-Id: Ib87bdab992536c65ce0747ce1520682eafc18d39
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
-rw-r--r-- | plat/qemu/common/common.mk | 57 |
1 files changed, 38 insertions, 19 deletions
diff --git a/plat/qemu/common/common.mk b/plat/qemu/common/common.mk index 020dc1f81..2dcac69bc 100644 --- a/plat/qemu/common/common.mk +++ b/plat/qemu/common/common.mk @@ -29,18 +29,6 @@ QEMU_CPU_LIBS := lib/cpus/aarch64/aem_generic.S \ lib/cpus/aarch64/qemu_max.S PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} - -# Cpu core architecture level: -# v8.0: a53, a57, a72 -# v8.2: a55, a76, n1 -# v8.4: v1 -# v9.0: a710, n2 -# -# let treat v9.0 as v8.5 as they share cpu features -# https://developer.arm.com/documentation/102378/0201/Armv8-x-and-Armv9-x-extensions-and-features - -ARM_ARCH_MAJOR := 8 -ARM_ARCH_MINOR := 5 endif PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ @@ -91,7 +79,44 @@ BL31_SOURCES += ${QEMU_CPU_LIBS} \ # CPU flag enablement ifeq (${ARCH},aarch64) -# Later QEMU versions support SME and SVE. +# Cpu core architecture level: +# v8.0: a53, a57, a72 +# v8.2: a55, a76, n1 +# v8.4: v1 +# v9.0: a710, n2 +# +# +# We go v8.0 by default and will enable all features we want + +ARM_ARCH_MAJOR := 8 +ARM_ARCH_MINOR := 0 + +# 8.0 +ENABLE_FEAT_CSV2_2 := 2 + +# 8.1 +ENABLE_FEAT_PAN := 2 +ENABLE_FEAT_VHE := 2 + +# 8.2 +# TF-A currently does not permit dynamic detection of FEAT_RAS +# so this is the only safe setting +ENABLE_FEAT_RAS := 0 + +# 8.4 +ENABLE_FEAT_SEL2 := 2 +ENABLE_FEAT_DIT := 2 + +# 8.5 +ENABLE_FEAT_RNG := 2 +ENABLE_FEAT_SB := 2 + +# 8.6 +ENABLE_FEAT_FGT := 2 + +# 8.7 +ENABLE_FEAT_HCX := 2 + # SPM_MM is not compatible with ENABLE_SVE_FOR_NS (build breaks) ifeq (${SPM_MM},1) ENABLE_SVE_FOR_NS := 0 @@ -101,12 +126,6 @@ else ENABLE_SME_FOR_NS := 2 endif -# QEMU will use the RNDR instruction for the stack protector canary. -ENABLE_FEAT_RNG := 2 - -# QEMU 7.2+ has support for FGT and Linux needs it enabled to boot on max -ENABLE_FEAT_FGT := 2 - # Treating this as a memory-constrained port for now USE_COHERENT_MEM := 0 |