diff options
author | Niklas Cassel <niklas.cassel@linaro.org> | 2019-06-27 16:02:15 +0200 |
---|---|---|
committer | Andy Gross <agross@kernel.org> | 2019-06-28 00:20:37 -0500 |
commit | 8291e15108cde33c3e086a34af5381c95cc7aa87 (patch) | |
tree | bc4ffa074187c8dde7a9d470f5da2df9cbfaea48 | |
parent | 79e7739f7b877d05de8f162a3ae8006657436df0 (diff) |
arm64: dts: qcom: qcs404: Add missing space for cooling-cells propertyqcom-arm64-for-5.3-2
There should be a space both before and after the equal sign.
Add a missing space for the cooling cells property.
Fixes: f48cee3239a1 ("arm64: dts: qcom: qcs404: Add thermal zones for each sensor")
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Acked-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
-rw-r--r-- | arch/arm64/boot/dts/qcom/qcs404.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 01a51f381850..3d0789775009 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -35,7 +35,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; - #cooling-cells= <2>; + #cooling-cells = <2>; }; CPU1: cpu@101 { @@ -45,7 +45,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; - #cooling-cells= <2>; + #cooling-cells = <2>; }; CPU2: cpu@102 { @@ -55,7 +55,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; - #cooling-cells= <2>; + #cooling-cells = <2>; }; CPU3: cpu@103 { @@ -65,7 +65,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; - #cooling-cells= <2>; + #cooling-cells = <2>; }; L2_0: l2-cache { |