diff options
| author | Tushar Behera <tushar.behera@linaro.org> | 2013-04-15 15:43:45 +0530 |
|---|---|---|
| committer | Tushar Behera <tushar.behera@linaro.org> | 2013-05-22 17:08:52 +0530 |
| commit | d880467aee8e1f7a0239f3e812861be8c3347173 (patch) | |
| tree | 12e7834cba277b0b7ddd3ad0fdfd549e9d24dfa2 | |
| parent | 83897e9801f08eb729443dd952975f1961512f02 (diff) | |
ARM: EXYNOS: Set arch_sys_counter as default clocksource
The Exynos 5250 includes an architected timer which is on core and
very cheap to read.
Enabling the architected timer can lead to a significant performance
improvement for timer sensitive workloads such as TCP/IP.
It turns out that both arch_sys_counter and mct-frc have a rating of
400. On bootup, arch_sys_counter is initialized first then the
clocksource changes to mct-frc when that initialises later on.
If the rating of mct-frc is reduced below 400, then arch_sys_counter
becomes the default.
Suggested-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
| -rw-r--r-- | drivers/clocksource/exynos_mct.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 662fcc06582..376897cb322 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -27,6 +27,8 @@ #include <asm/localtimer.h> #include <asm/mach/time.h> +#include <plat/cpu.h> + #define EXYNOS4_MCTREG(x) (x) #define EXYNOS4_MCT_G_CNT_L EXYNOS4_MCTREG(0x100) #define EXYNOS4_MCT_G_CNT_U EXYNOS4_MCTREG(0x104) @@ -194,6 +196,10 @@ static void __init exynos4_clocksource_init(void) { exynos4_mct_frc_start(0, 0); + if (soc_is_exynos5250()) { + mct_frc.rating = 399; + } + if (clocksource_register_hz(&mct_frc, clk_rate)) panic("%s: can't register clocksource\n", mct_frc.name); } |