diff options
| author | Rahul Sharma <rahul.sharma@samsung.com> | 2013-05-10 10:33:37 +0530 |
|---|---|---|
| committer | Tushar Behera <tushar.behera@linaro.org> | 2013-06-19 16:54:33 +0530 |
| commit | 610e40ca037e87ad5950e0e9aef18ea352fafdd8 (patch) | |
| tree | c757143057ce92dbc8c510677ea35ae183bc4070 | |
| parent | f3372cab2053534ffab631522c00d2c06634f7fe (diff) | |
clk/exynos: add sclk_hdmiphy in the special clocks list
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5250-clock.txt | 1 | ||||
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt index 830fee6d0ce..a5e1e97235e 100644 --- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt @@ -59,6 +59,7 @@ clock which they consume. sclk_spi0 154 sclk_spi1 155 sclk_spi2 156 + sclk_hdmiphy 157 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 15dad372d02..2c71056369f 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -87,6 +87,7 @@ enum exynos5250_clks { sclk_mmc0, sclk_mmc1, sclk_mmc2, sclk_mmc3, sclk_sata, sclk_usb3, sclk_jpeg, sclk_uart0, sclk_uart1, sclk_uart2, sclk_uart3, sclk_pwm, sclk_audio1, sclk_audio2, sclk_spdif, sclk_spi0, sclk_spi1, sclk_spi2, + sclk_hdmiphy, /* gate clocks */ gscl0 = 256, gscl1, gscl2, gscl3, gscl_wa, gscl_wb, smmu_gscl0, @@ -196,7 +197,7 @@ struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = { /* fixed rate clocks generated inside the soc */ struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000), FRATE(none, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000), |