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Diffstat (limited to 'ArmPkg/Include/Chipset/ArmV7.h')
-rw-r--r--ArmPkg/Include/Chipset/ArmV7.h20
1 files changed, 19 insertions, 1 deletions
diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
index 3d1b4eea..e64deb14 100644
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ b/ArmPkg/Include/Chipset/ArmV7.h
@@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -19,6 +19,9 @@
#include <Chipset/ArmV7Mmu.h>
#include <Chipset/ArmV7ArchTimer.h>
+// ARM Interrupt ID in Exception Table
+#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ
+
// Domain Access Control Register
#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))
@@ -26,6 +29,21 @@
#define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a)))
#define DOMAIN_ACCESS_CONTROL_MANAGER(a) (3UL << (2 * (a)))
+// CPSR - Coprocessor Status Register definitions
+#define CPSR_MODE_USER 0x10
+#define CPSR_MODE_FIQ 0x11
+#define CPSR_MODE_IRQ 0x12
+#define CPSR_MODE_SVC 0x13
+#define CPSR_MODE_ABORT 0x17
+#define CPSR_MODE_HYP 0x1A
+#define CPSR_MODE_UNDEFINED 0x1B
+#define CPSR_MODE_SYSTEM 0x1F
+#define CPSR_MODE_MASK 0x1F
+#define CPSR_ASYNC_ABORT (1 << 8)
+#define CPSR_IRQ (1 << 7)
+#define CPSR_FIQ (1 << 6)
+
+
// CPACR - Coprocessor Access Control Register definitions
#define CPACR_CP_DENIED(cp) 0x00
#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF)