diff options
| author | Richard Sandiford <rdsandiford@googlemail.com> | 2007-07-04 19:55:18 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2007-07-04 19:55:18 +0000 |
| commit | 0fdf1951981eafd070b503e8dab596d7c9ad07a7 (patch) | |
| tree | 143ad53c6904d6a00fde2e6724f8ab2b08b05532 | |
| parent | e600c1cf4e3a85c6b30e44e650b815e7b1524488 (diff) | |
gas/
* config/tc-mips.c (mips_cpu_info_table): Add new entries for
{24k,24ke,34k,74k}f{2_1,1_1,x}. Also add an entry for 74kf3_2.
Deprecate *x and *fx.
* doc/c-mips.texi: Document the new CPU arguments. Deprecate
*x and *fx.
| -rw-r--r-- | gas/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/config/tc-mips.c | 24 | ||||
| -rw-r--r-- | gas/doc/c-mips.texi | 17 |
3 files changed, 45 insertions, 4 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 32aa3fad28..784ca765e0 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2007-07-04 Richard Sandiford <richard@codesourcery.com> + + * config/tc-mips.c (mips_cpu_info_table): Add new entries for + {24k,24ke,34k,74k}f{2_1,1_1,x}. Also add an entry for 74kf3_2. + Deprecate *x and *fx. + * doc/c-mips.texi: Document the new CPU arguments. Deprecate + *x and *fx. + 2007-07-04 H.J. Lu <hongjiu.lu@intel.com> * config/obj-coff.h (x86_64_target_format): Renamed to ... diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 79114df3e6..42626ab630 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -14784,24 +14784,48 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "m4k", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, { "m4kp", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kc", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "24kf2_1", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kf", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "24kf1_1", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, + /* Deprecated forms of the above. */ + { "24kfx", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kx", 0, ISA_MIPS32R2, CPU_MIPS32R2 }, /* 24KE is a 24K with DSP ASE, other ASEs are optional. */ { "24kec", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "24kef2_1", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kef", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "24kef1_1", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, + /* Deprecated forms of the above. */ + { "24kefx", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, { "24kex", MIPS_CPU_ASE_DSP, ISA_MIPS32R2, CPU_MIPS32R2 }, /* 34K is a 24K with DSP and MT ASE, other ASEs are optional. */ { "34kc", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "34kf2_1", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, + ISA_MIPS32R2, CPU_MIPS32R2 }, { "34kf", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "34kf1_1", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, + ISA_MIPS32R2, CPU_MIPS32R2 }, + /* Deprecated forms of the above. */ + { "34kfx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, + ISA_MIPS32R2, CPU_MIPS32R2 }, { "34kx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, /* 74K with DSP and DSPR2 ASE, other ASEs are optional. */ { "74kc", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "74kf2_1", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2, + ISA_MIPS32R2, CPU_MIPS32R2 }, { "74kf", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "74kf1_1", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2, + ISA_MIPS32R2, CPU_MIPS32R2 }, + { "74kf3_2", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2, + ISA_MIPS32R2, CPU_MIPS32R2 }, + /* Deprecated forms of the above. */ + { "74kfx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2, + ISA_MIPS32R2, CPU_MIPS32R2 }, { "74kx", MIPS_CPU_ASE_DSP | MIPS_CPU_ASE_DSPR2, ISA_MIPS32R2, CPU_MIPS32R2 }, diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index f92cb0098d..9f197268b0 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -249,17 +249,22 @@ rm9000, m4k, m4kp, 24kc, +24kf2_1, 24kf, -24kx, +24kf1_1, 24kec, +24kef2_1, 24kef, -24kex, +24kef1_1, 34kc, +34kf2_1, 34kf, -34kx, +34kf1_1, 74kc, +74kf2_1, 74kf, -74kx, +74kf1_1, +74kf3_2, 5kc, 5kf, 20kc, @@ -268,6 +273,10 @@ sb1, sb1a @end quotation +For compatibility reasons, @samp{@var{n}x} and @samp{@var{b}fx} are +accepted as synonyms for @samp{@var{n}f1_1}. These values are +deprecated. + @item -mtune=@var{cpu} Schedule and tune for a particular MIPS cpu. Valid @var{cpu} values are identical to @samp{-march=@var{cpu}}. |