diff options
| author | Jan Beulich <jbeulich@suse.com> | 2022-08-03 09:01:10 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-08-03 09:01:10 +0200 |
| commit | 5844ccaac7d7e628b8c3feea725d87fd4bafbdf6 (patch) | |
| tree | 22ce821fc2c8312e8538803e4c296674e39750f7 | |
| parent | 0aea480cd8e1656c2cc09ea9fa0318941bafba24 (diff) | |
x86: improve/shorten vector zeroing-idiom optimization conditional
- Drop the rounding type check: We're past template matching, and none
of the involved insns support embedded rounding.
- Drop the extension opcode check: None of the involved opcodes have
variants with it being other than None.
- Instead check opcode space, even if just to be on the safe side going
forward.
- Reduce the number of comparisons by folding two groups.
| -rw-r--r-- | gas/config/tc-i386.c | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 78dad4ebdf..62d583be47 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4329,24 +4329,19 @@ optimize_encoding (void) && !i.types[2].bitfield.xmmword && (i.tm.opcode_modifier.vex || ((!i.mask.reg || i.mask.zeroing) - && i.rounding.type == rc_none && is_evex_encoding (&i.tm) && (i.vec_encoding != vex_encoding_evex || cpu_arch_isa_flags.bitfield.cpuavx512vl || i.tm.cpu_flags.bitfield.cpuavx512vl || (i.tm.operand_types[2].bitfield.zmmword && i.types[2].bitfield.ymmword)))) - && ((i.tm.base_opcode == 0x55 - || i.tm.base_opcode == 0x57 - || i.tm.base_opcode == 0xdf - || i.tm.base_opcode == 0xef - || i.tm.base_opcode == 0xf8 - || i.tm.base_opcode == 0xf9 - || i.tm.base_opcode == 0xfa - || i.tm.base_opcode == 0xfb - || i.tm.base_opcode == 0x42 - || i.tm.base_opcode == 0x47) - && i.tm.extension_opcode == None)) + && i.tm.opcode_modifier.opcodespace == SPACE_0F + && ((i.tm.base_opcode | 2) == 0x57 + || i.tm.base_opcode == 0xdf + || i.tm.base_opcode == 0xef + || (i.tm.base_opcode | 3) == 0xfb + || i.tm.base_opcode == 0x42 + || i.tm.base_opcode == 0x47)) { /* Optimize: -O1: VOP, one of vandnps, vandnpd, vxorps, vxorpd, vpsubb, vpsubd, |