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authorIgor Zamyatin <igor.zamyatin@intel.com>2014-11-18 10:52:36 +0300
committerH.J. Lu <hjl.tools@gmail.com>2014-11-18 05:40:17 -0800
commitd258b828287a863376af60a1ef7ceafbccc83d93 (patch)
treeac8f8a3251ce8afda52a8a190099042fc4b8baca /gas
parent470e2f4e300e5f84b1c35070df43d69b501e0b91 (diff)
Add -z bndplt to generate BND prefix in PLT entries
This patch adds "-z bndplt" option Linux/x86-64 linker to generate BND prefix in PLT entries. It also updated Linux/x86-64 assembler not to generate R_X86_64_PLT32_BND nor R_X86_64_PC32_BND relocations. bfd/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * elf64-x86-64.c (elf_x86_64_check_relocs): Enable MPX PLT only for -z bndplt. gas/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * config/tc-i386-intel.c (i386_operator): Remove last argument from lex_got call. * config/tc-i386.c (reloc): Remove bnd_prefix from parameters' list. Return always BFD_RELOC_32_PCREL. * (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND. * (output_jump): Update call to reloc accordingly. * (output_interseg_jump): Likewise. * (output_disp): Likewise. * (output_imm): Likewise. * (x86_cons_fix_new): Likewise. * (lex_got): Remove bnd_prefix from parameters' list in macro and declarations. Don't use BFD_RELOC_X86_64_PLT32_BND. * (x86_cons): Update call to lex_got accordingly. * (i386_immediate): Likewise. * (i386_displacement): Likewise. * (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor BFD_RELOC_X86_64_PC32_BND. * (tc_gen_reloc): Likewise. include/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * bfdlink.h (struct bfd_link_info): Add bndplt. ld/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * emulparams/elf_x86_64.sh (BNDPLT): Set to yes for x86_64. * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle "-z bndplt" if BNDPLT is yes. (gld${EMULATION_NAME}_list_options): Add "-z bndplt" entry. * ld.texinfo: Add description for bndplt. ld/testsuite/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * testsuite/ld-x86-64/bnd-ifunc-1.d: Add bndplt option. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. Update dissassembly sections. * testsuite/ld-x86-64/mpx.exp: Handle mpx3 and mpx4 tests. * testsuite/ld-x86-64/mpx1a.rd: Remove _BND from relocation name. * testsuite/ld-x86-64/mpx1c.rd: Likewise. * testsuite/ld-x86-64/mpx2a.rd: Likewise. * testsuite/ld-x86-64/mpx2c.rd: Likewise. * testsuite/ld-x86-64/mpx3.dd: New file. * testsuite/ld-x86-64/mpx3a.s: Likewise. * testsuite/ld-x86-64/mpx3b.s: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4a.s: Likewise. * testsuite/ld-x86-64/mpx4b.s: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog21
-rw-r--r--gas/config/tc-i386-intel.c4
-rw-r--r--gas/config/tc-i386.c60
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/i386/x86-64-mpx-branch-1.d16
-rw-r--r--gas/testsuite/gas/i386/x86-64-mpx-branch-2.d16
6 files changed, 58 insertions, 64 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index cd4467faba..943c239b21 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,24 @@
+2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
+
+ * config/tc-i386-intel.c (i386_operator): Remove last argument
+ from lex_got call.
+ * config/tc-i386.c (reloc): Remove bnd_prefix from parameters'
+ list. Return always BFD_RELOC_32_PCREL.
+ * (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND.
+ * (output_jump): Update call to reloc accordingly.
+ * (output_interseg_jump): Likewise.
+ * (output_disp): Likewise.
+ * (output_imm): Likewise.
+ * (x86_cons_fix_new): Likewise.
+ * (lex_got): Remove bnd_prefix from parameters' list in macro and
+ declarations. Don't use BFD_RELOC_X86_64_PLT32_BND.
+ * (x86_cons): Update call to lex_got accordingly.
+ * (i386_immediate): Likewise.
+ * (i386_displacement): Likewise.
+ * (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor
+ BFD_RELOC_X86_64_PC32_BND.
+ * (tc_gen_reloc): Likewise.
+
2014-11-18 Jan Beulich <jbeulich@suse.com>
* config/tc-aarch64.c (s_aarch64_arch_extension): New.
diff --git a/gas/config/tc-i386-intel.c b/gas/config/tc-i386-intel.c
index b55d985f5a..86b96ebef6 100644
--- a/gas/config/tc-i386-intel.c
+++ b/gas/config/tc-i386-intel.c
@@ -141,9 +141,7 @@ operatorT i386_operator (const char *name, unsigned int operands, char *pc)
int adjust = 0;
char *gotfree_input_line = lex_got (&i.reloc[this_operand],
&adjust,
- &intel_state.reloc_types,
- (i.bnd_prefix != NULL
- || add_bnd_prefix));
+ &intel_state.reloc_types);
if (!gotfree_input_line)
break;
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 97e326c2fc..b6ac90266f 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2830,7 +2830,6 @@ static bfd_reloc_code_real_type
reloc (unsigned int size,
int pcrel,
int sign,
- int bnd_prefix,
bfd_reloc_code_real_type other)
{
if (other != NO_RELOC)
@@ -2909,9 +2908,7 @@ reloc (unsigned int size,
{
case 1: return BFD_RELOC_8_PCREL;
case 2: return BFD_RELOC_16_PCREL;
- case 4: return (bnd_prefix && object_64bit
- ? BFD_RELOC_X86_64_PC32_BND
- : BFD_RELOC_32_PCREL);
+ case 4: return BFD_RELOC_32_PCREL;
case 8: return BFD_RELOC_64_PCREL;
}
as_bad (_("cannot do %u byte pc-relative relocation"), size);
@@ -6776,13 +6773,7 @@ output_branch (void)
/* 1 possible extra opcode + 4 byte displacement go in var part.
Pass reloc in fr_var. */
- frag_var (rs_machine_dependent, 5,
- ((!object_64bit
- || i.reloc[0] != NO_RELOC
- || (i.bnd_prefix == NULL && !add_bnd_prefix))
- ? i.reloc[0]
- : BFD_RELOC_X86_64_PC32_BND),
- subtype, sym, off, p);
+ frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);
}
static void
@@ -6858,10 +6849,7 @@ output_jump (void)
}
fixP = fix_new_exp (frag_now, p - frag_now->fr_literal, size,
- i.op[0].disps, 1, reloc (size, 1, 1,
- (i.bnd_prefix != NULL
- || add_bnd_prefix),
- i.reloc[0]));
+ i.op[0].disps, 1, reloc (size, 1, 1, i.reloc[0]));
/* All jumps handled here are signed, but don't use a signed limit
check for 32 and 16 bit jumps as we want to allow wrap around at
@@ -6927,7 +6915,7 @@ output_interseg_jump (void)
}
else
fix_new_exp (frag_now, p - frag_now->fr_literal, size,
- i.op[1].imms, 0, reloc (size, 0, 0, 0, i.reloc[1]));
+ i.op[1].imms, 0, reloc (size, 0, 0, i.reloc[1]));
if (i.op[0].imms->X_op != O_constant)
as_bad (_("can't handle non absolute segment in `%s'"),
i.tm.name);
@@ -7206,10 +7194,7 @@ output_disp (fragS *insn_start_frag, offsetT insn_start_off)
}
p = frag_more (size);
- reloc_type = reloc (size, pcrel, sign,
- (i.bnd_prefix != NULL
- || add_bnd_prefix),
- i.reloc[n]);
+ reloc_type = reloc (size, pcrel, sign, i.reloc[n]);
if (GOT_symbol
&& GOT_symbol == i.op[n].disps->X_add_symbol
&& (((reloc_type == BFD_RELOC_32
@@ -7300,7 +7285,7 @@ output_imm (fragS *insn_start_frag, offsetT insn_start_off)
sign = 0;
p = frag_more (size);
- reloc_type = reloc (size, 0, sign, 0, i.reloc[n]);
+ reloc_type = reloc (size, 0, sign, i.reloc[n]);
/* This is tough to explain. We end up with this one if we
* have operands that look like
@@ -7393,7 +7378,7 @@ void
x86_cons_fix_new (fragS *frag, unsigned int off, unsigned int len,
expressionS *exp, bfd_reloc_code_real_type r)
{
- r = reloc (len, 0, cons_sign, 0, r);
+ r = reloc (len, 0, cons_sign, r);
#ifdef TE_PE
if (exp->X_op == O_secrel)
@@ -7419,7 +7404,7 @@ x86_address_bytes (void)
#if !(defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) || defined (OBJ_MACH_O)) \
|| defined (LEX_AT)
-# define lex_got(reloc, adjust, types, bnd_prefix) NULL
+# define lex_got(reloc, adjust, types) NULL
#else
/* Parse operands of the form
<symbol>@GOTOFF+<nnn>
@@ -7433,8 +7418,7 @@ x86_address_bytes (void)
static char *
lex_got (enum bfd_reloc_code_real *rel,
int *adjust,
- i386_operand_type *types,
- int bnd_prefix)
+ i386_operand_type *types)
{
/* Some of the relocations depend on the size of what field is to
be relocated. But in our callers i386_immediate and i386_displacement
@@ -7569,8 +7553,6 @@ lex_got (enum bfd_reloc_code_real *rel,
*adjust = len;
memcpy (tmpbuf + first, past_reloc, second);
tmpbuf[first + second] = '\0';
- if (bnd_prefix && *rel == BFD_RELOC_X86_64_PLT32)
- *rel = BFD_RELOC_X86_64_PLT32_BND;
return tmpbuf;
}
@@ -7603,8 +7585,7 @@ lex_got (enum bfd_reloc_code_real *rel,
static char *
lex_got (enum bfd_reloc_code_real *rel ATTRIBUTE_UNUSED,
int *adjust ATTRIBUTE_UNUSED,
- i386_operand_type *types,
- int bnd_prefix ATTRIBUTE_UNUSED)
+ i386_operand_type *types)
{
static const struct
{
@@ -7705,7 +7686,7 @@ x86_cons (expressionS *exp, int size)
int adjust = 0;
save = input_line_pointer;
- gotfree_input_line = lex_got (&got_reloc, &adjust, NULL, 0);
+ gotfree_input_line = lex_got (&got_reloc, &adjust, NULL);
if (gotfree_input_line)
input_line_pointer = gotfree_input_line;
@@ -7939,9 +7920,7 @@ i386_immediate (char *imm_start)
save_input_line_pointer = input_line_pointer;
input_line_pointer = imm_start;
- gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types,
- (i.bnd_prefix != NULL
- || add_bnd_prefix));
+ gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
if (gotfree_input_line)
input_line_pointer = gotfree_input_line;
@@ -8198,9 +8177,7 @@ i386_displacement (char *disp_start, char *disp_end)
*displacement_string_end = '0';
}
#endif
- gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types,
- (i.bnd_prefix != NULL
- || add_bnd_prefix));
+ gotfree_input_line = lex_got (&i.reloc[this_operand], NULL, &types);
if (gotfree_input_line)
input_line_pointer = gotfree_input_line;
@@ -9160,8 +9137,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
&& (fixP->fx_r_type == BFD_RELOC_32_PCREL
|| fixP->fx_r_type == BFD_RELOC_64_PCREL
|| fixP->fx_r_type == BFD_RELOC_16_PCREL
- || fixP->fx_r_type == BFD_RELOC_8_PCREL
- || fixP->fx_r_type == BFD_RELOC_X86_64_PC32_BND)
+ || fixP->fx_r_type == BFD_RELOC_8_PCREL)
&& !use_rela_relocations)
{
/* This is a hack. There should be a better way to handle this.
@@ -9230,7 +9206,6 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
{
case BFD_RELOC_386_PLT32:
case BFD_RELOC_X86_64_PLT32:
- case BFD_RELOC_X86_64_PLT32_BND:
/* Make the jump instruction point to the address of the operand. At
runtime we merely add the offset to the actual PLT entry. */
value = -4;
@@ -10354,7 +10329,6 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
#endif
case BFD_RELOC_X86_64_PLT32:
- case BFD_RELOC_X86_64_PLT32_BND:
case BFD_RELOC_X86_64_GOT32:
case BFD_RELOC_X86_64_GOTPCREL:
case BFD_RELOC_386_PLT32:
@@ -10415,10 +10389,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
break;
case 1: code = BFD_RELOC_8_PCREL; break;
case 2: code = BFD_RELOC_16_PCREL; break;
- case 4:
- code = (fixp->fx_r_type == BFD_RELOC_X86_64_PC32_BND
- ? fixp-> fx_r_type : BFD_RELOC_32_PCREL);
- break;
+ case 4: code = BFD_RELOC_32_PCREL; break;
#ifdef BFD64
case 8: code = BFD_RELOC_64_PCREL; break;
#endif
@@ -10511,7 +10482,6 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
switch (code)
{
case BFD_RELOC_X86_64_PLT32:
- case BFD_RELOC_X86_64_PLT32_BND:
case BFD_RELOC_X86_64_GOT32:
case BFD_RELOC_X86_64_GOTPCREL:
case BFD_RELOC_X86_64_TLSGD:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index bf37ba8bcd..40989b3d43 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com>
+
+ * gas/i386/x86-64-mpx-branch-1.d: Don't use *_BND relocations.
+ * gas/i386/x86-64-mpx-branch-2.d: Likewise.
+
2014-11-18 Jan Beulich <jbeulich@suse.com>
* gas/aarch64/crc32-directive.d: New.
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d b/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
index 5edb1c76eb..c07002911c 100644
--- a/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
+++ b/gas/testsuite/gas/i386/x86-64-mpx-branch-1.d
@@ -8,8 +8,8 @@
Disassembly of section .text:
0+ <foo1-0xc>:
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32_BND \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32_BND \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
0+c <foo1>:
[ ]*[a-f0-9]+: f2 eb fd bnd jmp c <foo1>
@@ -20,9 +20,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2>
0+24 <foo2>:
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32 foo-0x4
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-branch-2.d b/gas/testsuite/gas/i386/x86-64-mpx-branch-2.d
index 86fb360a2b..5bb6a57c1e 100644
--- a/gas/testsuite/gas/i386/x86-64-mpx-branch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-mpx-branch-2.d
@@ -8,8 +8,8 @@
Disassembly of section .text:
0+ <foo1-0xc>:
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32_BND \*ABS\*\+0x10003c
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32_BND \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 6 <foo1-0x6> 2: R_X86_64_PC32 \*ABS\*\+0x10003c
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq c <foo1> 8: R_X86_64_PC32 \*ABS\*\+0x10003c
0+c <foo1>:
[ ]*[a-f0-9]+: f2 eb fd bnd jmp c <foo1>
@@ -20,9 +20,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2>
0+24 <foo2>:
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32_BND foo-0x4
-[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32_BND foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32 foo-0x4
+[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32 foo-0x4
+[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32 foo-0x4