diff options
| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:56:09 +0000 |
|---|---|---|
| committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:56:42 +0000 |
| commit | 1cad938de57a1577e5fe4b4afcabe889a8b9b9d7 (patch) | |
| tree | 0a83cfe3b99989bb705595bb9bf0855553e25e15 /include | |
| parent | 7bb5f07c8aa5168009f1e7b6857a30f0ee5ad16a (diff) | |
aarch64: [SME] Add ZERO instruction
This patch is adding ZERO (a list of 64-bit element ZA tiles)
instruction.
gas/ChangeLog:
* config/tc-aarch64.c (parse_sme_list_of_64bit_tiles):
New parser.
(parse_operands): Handle OPND_SME_list_of_64bit_tiles.
* testsuite/gas/aarch64/sme-4-illegal.d: New test.
* testsuite/gas/aarch64/sme-4-illegal.l: New test.
* testsuite/gas/aarch64/sme-4-illegal.s: New test.
* testsuite/gas/aarch64/sme-4.d: New test.
* testsuite/gas/aarch64/sme-4.s: New test.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_opnd): New operand
AARCH64_OPND_SME_list_of_64bit_tiles.
opcodes/ChangeLog:
* aarch64-opc.c (print_sme_za_list): New printing function.
(aarch64_print_operand): Handle OPND_SME_list_of_64bit_tiles.
* aarch64-opc.h (enum aarch64_field_kind): New bitfield
FLD_SME_zero_mask.
* aarch64-tbl.h (struct aarch64_opcode): New ZERO instruction.
aarch64-asm-2.c: Regenerate.
aarch64-dis-2.c: Regenerate.
aarch64-opc-2.c: Regenerate.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/aarch64.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 249450c1ab..a224b8ad85 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -450,6 +450,7 @@ enum aarch64_opnd AARCH64_OPND_SME_ZA_HV_idx_src, /* SME source ZA tile vector. */ AARCH64_OPND_SME_ZA_HV_idx_dest, /* SME destination ZA tile vector. */ AARCH64_OPND_SME_Pm, /* SME scalable predicate register, bits [15:13]. */ + AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */ AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */ AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */ }; |