| Age | Commit message (Expand) | Author |
|---|
| 2021-04-19 | aarch64: New instructions for maintenance of GPT entries cached in a TLB | Przemyslaw Wirkus |
| 2021-04-19 | aarch64: Add new data cache maintenance operations | Przemyslaw Wirkus |
| 2021-04-19 | arm64: add two initializers | Jan Beulich |
| 2021-04-16 | aarch64: Define RME system registers | Przemyslaw Wirkus |
| 2021-04-16 | Update the ChangeLog, and add the missing entries. | Nelson Chu |
| 2021-04-13 | ENABLE_CHECKING in bfd, opcodes, binutils, ld | Alan Modra |
| 2021-04-09 | AArch64: Fix Atomic LD64/ST64 classification. | Tejas Belagod |
| 2021-04-09 | PowerPC disassembly of pcrel references | Alan Modra |
| 2021-04-08 | PR27684, PowerPC missing mfsprg0 and others | Alan Modra |
| 2021-04-08 | PR27676, PowerPC missing extended dcbt, dcbtst mnemonics | Alan Modra |
| 2021-04-06 | Return symbol from symbol_at_address_func | Alan Modra |
| 2021-04-05 | C99 opcodes configury | Alan Modra |
| 2021-04-01 | Remove strneq macro and use startswith. | Martin Liska |
| 2021-04-01 | PR27675, PowerPC missing extended mnemonic mfummcr2 | Alan Modra |
| 2021-03-31 | Use bool in opcodes | Alan Modra |
| 2021-03-31 | Remove bfd_stdint.h | Alan Modra |
| 2021-03-30 | x86: drop seg_entry | Jan Beulich |
| 2021-03-30 | x86: drop REGNAM_{AL,AX,EAX} | Jan Beulich |
| 2021-03-30 | x86: adjust st(<N>) parsing | Jan Beulich |
| 2021-03-29 | x86: move some opcode table entries | Jan Beulich |
| 2021-03-29 | x86: VPSADBW's source operands are also commutative | Jan Beulich |
| 2021-03-29 | x86: fold SSE2AVX and their base MMX/SSE templates | Jan Beulich |
| 2021-03-29 | x86: undo Prefix_0X<nn> use in opcode table | Jan Beulich |
| 2021-03-29 | x86: shrink some struct insn_template fields | Jan Beulich |
| 2021-03-29 | x86: derive opcode encoding space attribute from base opcode | Jan Beulich |
| 2021-03-29 | TRUE/FALSE simplification | Alan Modra |
| 2021-03-29 | opcodes int vs bfd_boolean fixes | Alan Modra |
| 2021-03-26 | x86-64: don't accept supposedly disabled MOVQ forms | Jan Beulich |
| 2021-03-25 | [NIOS2] Fix disassembly of br.n instruction. | Hafiz Abid Qadeer |
| 2021-03-25 | x86: flag bad S/G insn operand combinations | Jan Beulich |
| 2021-03-25 | x86: flag as bad AVX512 insns with EVEX.z set but EVEX.aaa clear | Jan Beulich |
| 2021-03-25 | x86: fix AMD Zen3 insns | Jan Beulich |
| 2021-03-25 | PR27647 PowerPC extended conditional branch mnemonics | Alan Modra |
| 2021-03-24 | x86: derive opcode length from opcode value | Jan Beulich |
| 2021-03-24 | x86: derive mandatory prefix attribute from base opcode | Jan Beulich |
| 2021-03-24 | x86: don't use opcode_length to identify pseudo prefixes | Jan Beulich |
| 2021-03-23 | x86: re-number PREFIX_0X<nn> | Jan Beulich |
| 2021-03-23 | x86: re-order two fields of struct insn_template | Jan Beulich |
| 2021-03-23 | x86: split opcode prefix and opcode space representation | Jan Beulich |
| 2021-03-22 | Add startswith function and use it instead of CONST_STRNEQ. | Martin Liska |
| 2021-03-16 | RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructions | Kuan-Lin Chen |
| 2021-03-12 | aarch64: Add few missing system registers | Przemyslaw Wirkus |
| 2021-03-12 | Re: x86: correct decoding of nop/reserved space (0f18 ... 0x1f) | Alan Modra |
| 2021-03-11 | x86: re-order logic in OP_XMM() | Jan Beulich |
| 2021-03-11 | x86: drop a few redundant EVEX-related checks | Jan Beulich |
| 2021-03-11 | x86: remove stray uses of xmmq_mode | Jan Beulich |
| 2021-03-10 | x86/Intel: correct AVX512 S/G disassembly | Jan Beulich |
| 2021-03-10 | x86: re-arrange enumerator and table entry order | Jan Beulich |
| 2021-03-10 | x86: reuse further VEX entries for EVEX | Jan Beulich |
| 2021-03-10 | x86: reuse VEX entries for EVEX vperm{q,pd} | Jan Beulich |
