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path: root/opcodes/aarch64-opc.c
AgeCommit message (Expand)Author
2022-01-02Update year range in copyright notice of binutils filesAlan Modra
2021-12-03aarch64: Fix uninitialised memoryRichard Sandiford
2021-12-02aarch64: Enforce P/M/E order for MOPS instructionsRichard Sandiford
2021-12-02aarch64: Add support for +mopsRichard Sandiford
2021-12-02aarch64: Add Armv8.8-A system registersRichard Sandiford
2021-12-02aarch64: Add id_aa64isar2_el1Richard Sandiford
2021-12-02aarch64: Tweak insn sequence codeRichard Sandiford
2021-12-02aarch64: Add maximum immediate value to aarch64_sys_regRichard Sandiford
2021-11-30aarch64: Add missing system registers [PR27145]Richard Sandiford
2021-11-30aarch64: Make LOR registers conditional on +lorRichard Sandiford
2021-11-30aarch64: Remove ZIDR_EL1Richard Sandiford
2021-11-30aarch64: Allow writes to MFAR_EL3Richard Sandiford
2021-11-30aarch64: Mark PMSIDR_EL1 as read-onlyRichard Sandiford
2021-11-30aarch64: Remove duplicate system register entriesRichard Sandiford
2021-11-25Fix building the AArch64 assembler and disassembler when assertions are disab...Nick Clifton
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add new SME system registersPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add ZERO instructionPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus
2021-11-17aarch64: [SME] Add SME instructionsPrzemyslaw Wirkus
2021-04-19aarch64: New instructions for maintenance of GPT entries cached in a TLBPrzemyslaw Wirkus
2021-04-19aarch64: Add new data cache maintenance operationsPrzemyslaw Wirkus
2021-04-16aarch64: Define RME system registersPrzemyslaw Wirkus
2021-03-31Use bool in opcodesAlan Modra
2021-03-31Remove bfd_stdint.hAlan Modra
2021-03-29TRUE/FALSE simplificationAlan Modra
2021-03-12aarch64: Add few missing system registersPrzemyslaw Wirkus
2021-01-11aarch64: Remove support for CSREKyrylo Tkachov
2021-01-08Treat the AArch64 register id_aa64mmfr2_el1 as a core system register.Nick Clifton
2021-01-01Update year range in copyright notice of binutils filesAlan Modra
2020-11-09aarch64: Update LS64 feature with system registerPrzemyslaw Wirkus
2020-11-09aarch64: Limit Rt register number for LS64 load/store instructionsPrzemyslaw Wirkus
2020-11-04aarch64: Update feature RAS system registersPrzemyslaw Wirkus
2020-10-28aarch64: Add CSR PDEC instructionPrzemyslaw Wirkus
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus
2020-10-22[PATCH][GAS][AArch64] Define BRBE system registersPrzemyslaw Wirkus
2020-10-22aarch64: Define CSRE system registersPrzemyslaw Wirkus
2020-09-28This patch introduces ETMv4 (Embedded Trace Macrocell) system registers for t...Przemyslaw Wirkus
2020-09-28This patch introduces ETE (Embedded Trace Extension) system registers for the...Przemyslaw Wirkus
2020-09-28This patch introduces TRBE (Trace Buffer Extension) system registers for the ...Przemyslaw Wirkus
2020-09-08aarch64: Add support for Armv8-R system registersAlex Coplan
2020-08-12aarch64: Add support for MPAM system registersAlex Coplan
2020-08-10[aarch64] GAS doesn't validate the architecture version for any tlbi register...Przemyslaw Wirkus
2020-06-11[PATCH]: aarch64: Refactor representation of system registersAlex Coplan
2020-04-30AArch64: add GAS support for UDF instructionAlex Coplan
2020-04-20[AArch64, Binutils] Add missing TSB instructionSudakshina Das
2020-02-26Indent labelsAlan Modra
2020-01-01Update year range in copyright notice of binutils filesAlan Modra
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