| Age | Commit message (Expand) | Author |
|---|
| 2021-03-10 | x86/Intel: correct AVX512 S/G disassembly | Jan Beulich |
| 2021-03-10 | x86: reuse further VEX entries for EVEX | Jan Beulich |
| 2021-03-10 | x86: reuse VEX entries for EVEX vperm{q,pd} | Jan Beulich |
| 2021-03-10 | x86: re-arrange order of decode for various EVEX opcodes | Jan Beulich |
| 2020-07-14 | x86: drop Rdq, Rd, and MaskR | Jan Beulich |
| 2020-07-14 | x86: simplify decode of opcodes valid with (embedded) 66 prefix only | Jan Beulich |
| 2020-07-14 | x86: drop need_vex_reg | Jan Beulich |
| 2020-07-14 | x86: extend %BW use to VP{COMPRESS,EXPAND}{B,W} | Jan Beulich |
| 2020-07-14 | x86-64: fix {,V}PCMPESTR{I,M} disassembly in Intel mode | Jan Beulich |
| 2020-07-14 | x86: fold VCMP_Fixup() into CMP_Fixup() | Jan Beulich |
| 2020-07-07 | x86: introduce %BW to avoid going through vex_w_table[] | Jan Beulich |
| 2020-07-06 | x86: use %LW / %XW instead of going through vex_w_table[] | Jan Beulich |
| 2020-07-06 | x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands | Jan Beulich |
| 2020-07-06 | x86: drop EVEX table entries that can be made served by VEX ones | Jan Beulich |
| 2020-07-06 | x86: AVX512 VPERM{D,Q,PS,PD} insns need to honor EVEX.L'L | Jan Beulich |
| 2020-07-06 | x86: AVX512 extract/insert insns need to honor EVEX.L'L | Jan Beulich |
| 2020-07-06 | x86: honor VEX.W for VCVT{PH2PS,PS2PH} | Jan Beulich |
| 2020-07-06 | x86: drop EVEX table entries that can be served by VEX ones | Jan Beulich |
| 2020-07-06 | x86: replace EXqScalarS by EXqVexScalarS | Jan Beulich |
| 2020-07-06 | x86: replace EX{d,q}Scalar by EXxmm_m{d,q} | Jan Beulich |
| 2020-06-09 | x86: utilize X macro in EVEX decoding | Jan Beulich |
| 2019-07-01 | x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D} | Jan Beulich |
| 2019-06-27 | i386: Check vector length for scatter/gather prefetch instructions | H.J. Lu |
| 2019-06-25 | x86: drop dqa_mode | Jan Beulich |
| 2019-06-21 | i386: Break i386-dis-evex.h into small files | H.J. Lu |
