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path: root/opcodes/i386-opc.tbl
AgeCommit message (Expand)Author
2022-08-03x86: properly mark i386-only insnsJan Beulich
2022-08-03x86: also use D for MOVBEJan Beulich
2022-08-02x86: XOP shift insns don't really allow B suffixJan Beulich
2022-08-01x86: SKINIT with operand needs IgnoreSizeJan Beulich
2022-07-29x86: drop stray NoRex64 from KeyLocker insnsJan Beulich
2022-07-21x86: replace wrong attributes on VCVTDQ2PH{X,Y}Jan Beulich
2022-07-21x86/Intel: correct AVX512F scatter insn element sizesJan Beulich
2022-07-18x86: correct VMOVSH attributesJan Beulich
2022-07-06x86: make D attribute usable for XOP and FMA4 insnsJan Beulich
2022-07-04x86: fold Disp32S and Disp32Jan Beulich
2022-06-29x86: drop stray NoRex64 from XBEGINJan Beulich
2022-05-27x86: re-work AVX512 embedded rounding / SAEJan Beulich
2022-04-27x86: VFPCLASSSH is Evex.LLIGJan Beulich
2022-04-19x86: VCMPSH is Evex.LLIGJan Beulich
2022-04-19x86: drop stray CheckRegSize from VFPCLASSPHJan Beulich
2022-03-18x86: also fold remaining multi-vector-size shift insnsJan Beulich
2022-03-18x86: drop stray CheckRegSize from VEXTRACT{F,I}32X4Jan Beulich
2022-03-18x86: fold certain AVX2 templates into their AVX counterpartsJan Beulich
2022-01-06x86: drop NoAVX insn attributeJan Beulich
2022-01-06x86: drop NoAVX from POPCNTJan Beulich
2022-01-06x86: drop some "comm" template parametersJan Beulich
2022-01-06x86: templatize FMA insn templatesJan Beulich
2022-01-02Update year range in copyright notice of binutils filesAlan Modra
2021-08-05[PATCH 1/2] Enable Intel AVX512_FP16 instructionsCui,Lili
2021-07-14x86: Add int1 as one byte opcode 0xf1H.J. Lu
2021-04-26x86: optimize LEAJan Beulich
2021-03-29x86: move some opcode table entriesJan Beulich
2021-03-29x86: VPSADBW's source operands are also commutativeJan Beulich
2021-03-29x86: fold SSE2AVX and their base MMX/SSE templatesJan Beulich
2021-03-29x86: undo Prefix_0X<nn> use in opcode tableJan Beulich
2021-03-26x86-64: don't accept supposedly disabled MOVQ formsJan Beulich
2021-03-25x86: fix AMD Zen3 insnsJan Beulich
2021-03-24x86: derive opcode length from opcode valueJan Beulich
2021-03-24x86: don't use opcode_length to identify pseudo prefixesJan Beulich
2021-03-23x86: split opcode prefix and opcode space representationJan Beulich
2021-03-09x86: fold some prefix related attributes into a single oneJan Beulich
2021-03-09x86-64: make SYSEXIT handling similar to SYSRET'sJan Beulich
2021-03-03x86: infer operand count of templatesJan Beulich
2021-02-16x86: CVTPI2PD has special behaviorJan Beulich
2021-02-16x86: have preprocessor expand macrosJan Beulich
2021-01-01Update year range in copyright notice of binutils filesAlan Modra
2020-10-20Add AMD znver3 processor supportGanesh Gopalasubramanian
2020-10-16Enhancement for avx-vnni patchCui,Lili
2020-10-14x86: Support Intel AVX VNNIH.J. Lu
2020-10-14x86: Add support for Intel HRESET instructionLili Cui
2020-10-14x86: Support Intel UINTRLili Cui
2020-10-14x86: Remove the prefix byte from non-VEX/EVEX base_opcodeH.J. Lu
2020-10-13x86: Rename VexOpcode to OpcodePrefixH.J. Lu
2020-09-24Add support for Intel TDX instructions.Cui,Lili
2020-09-23Enable support to Intel Keylocker instructionsTerry Guo
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