| Age | Commit message (Expand) | Author |
|---|
| 2021-07-03 | Add markers for 2.37 branch | Nick Clifton |
| 2021-07-02 | Re: Fix minor NDS32 renaming snafu | Alan Modra |
| 2021-07-01 | cgen: split GUILE setting out | Mike Frysinger |
| 2021-07-01 | opcodes: constify & local meps macros | Mike Frysinger |
| 2021-07-01 | opcodes: cleanup nds32 variables | Mike Frysinger |
| 2021-07-01 | opcodes: constify & localize z80 opcodes | Mike Frysinger |
| 2021-07-01 | opcodes: constify & scope microblaze opcodes | Mike Frysinger |
| 2021-07-01 | opcodes: constify aarch64_opcode_tables | Mike Frysinger |
| 2021-06-22 | opcodes: make use of __builtin_popcount when available | Andrew Burgess |
| 2021-06-22 | picojava assembler and disassembler fixes | Alan Modra |
| 2021-06-19 | ubsan: vax: pointer overflow | Alan Modra |
| 2021-06-19 | Fix another strncpy warning | Alan Modra |
| 2021-06-17 | powerpc: move cell "or rx,rx,rx" hints | Alan Modra |
| 2021-06-03 | PR1202, mcore disassembler: wrong address loopt | Alan Modra |
| 2021-06-02 | arc: Construct disassembler options dynamically | Shahab Vahedi |
| 2021-05-29 | PowerPC table driven -Mraw disassembly | Alan Modra |
| 2021-05-29 | MIPS/opcodes: Reorder legacy COP0, COP2, COP3 opcode instructions | Maciej W. Rozycki |
| 2021-05-29 | MIPS/opcodes: Accurately record coprocessor opcode CPU/ISA membership | Maciej W. Rozycki |
| 2021-05-29 | MIPS/opcodes: Remove DMFC3 and DMTC3 instructions | Maciej W. Rozycki |
| 2021-05-29 | MIPS/opcodes: Disassemble the RFE instruction | Maciej W. Rozycki |
| 2021-05-29 | MIPS/opcodes: Add legacy CP1 control register names | Maciej W. Rozycki |
| 2021-05-29 | MIPS/opcodes: Do not use CP0 register names for control registers | Maciej W. Rozycki |
| 2021-05-29 | MIPS/opcodes: Add TX39 CP0 register names | Maciej W. Rozycki |
| 2021-05-29 | MIPS/opcodes: Free up redundant `g' operand code | Maciej W. Rozycki |
| 2021-05-29 | microMIPS/opcodes: Refer FPRs rather than FCRs with DMTC1 | Maciej W. Rozycki |
| 2021-05-27 | PowerPC: Add new xxmr and xxlnot extended mnemonics | Peter Bergner |
| 2021-05-25 | Regen cris files | Alan Modra |
| 2021-05-24 | opcodes: cris: move desc & opc files from sim/ | Mike Frysinger |
| 2021-05-18 | RISC-V: PR27814, Objdump crashes when disassembling a non-ELF RISC-V binary. | Job Noorman |
| 2021-05-17 | arm: Fix bugs with MVE vmov from two GPRs to vector lanes | Alex Coplan |
| 2021-05-11 | Fix an illegal memory access when attempting to disassemble a corrupt TIC30 b... | Nick Clifton |
| 2021-05-06 | or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha() | Stafford Horne |
| 2021-05-01 | opcodes: xtensa: support branch visualization | Max Filippov |
| 2021-04-26 | x86: optimize LEA | Jan Beulich |
| 2021-04-23 | opcodes: xtensa: display loaded literal value | Max Filippov |
| 2021-04-23 | opcodes: xtensa: improve literal output | Max Filippov |
| 2021-04-19 | aarch64: New instructions for maintenance of GPT entries cached in a TLB | Przemyslaw Wirkus |
| 2021-04-19 | aarch64: Add new data cache maintenance operations | Przemyslaw Wirkus |
| 2021-04-19 | arm64: add two initializers | Jan Beulich |
| 2021-04-16 | aarch64: Define RME system registers | Przemyslaw Wirkus |
| 2021-04-16 | Update the ChangeLog, and add the missing entries. | Nelson Chu |
| 2021-04-16 | RISC-V: compress "addi d,CV,z" to "c.mv d,CV" | Lifang Xia |
| 2021-04-13 | ENABLE_CHECKING in bfd, opcodes, binutils, ld | Alan Modra |
| 2021-04-09 | AArch64: Fix Atomic LD64/ST64 classification. | Tejas Belagod |
| 2021-04-09 | PowerPC disassembly of pcrel references | Alan Modra |
| 2021-04-08 | PR27684, PowerPC missing mfsprg0 and others | Alan Modra |
| 2021-04-08 | PR27676, PowerPC missing extended dcbt, dcbtst mnemonics | Alan Modra |
| 2021-04-06 | Return symbol from symbol_at_address_func | Alan Modra |
| 2021-04-05 | C99 opcodes configury | Alan Modra |
| 2021-04-01 | Remove strneq macro and use startswith. | Martin Liska |
