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AgeCommit message (Expand)Author
2021-11-12Don't compile some opcodes files when bfd is 32-bit onlyAlan Modra
2021-11-11RISC-V: Dump objects according to the elf architecture attribute.Nelson Chu
2021-11-05Missing va_end in aarch64-dis.cAlan Modra
2021-11-02opcodes: d10v: simplify header includesMike Frysinger
2021-11-01arm: add armv9-a architecture to -marchPrzemyslaw Wirkus
2021-10-28ubsan: arm: undefined shiftAlan Modra
2021-10-27RISC-V: Tidy riscv assembler and disassembler.Nelson Chu
2021-10-27opcodes: Fix RPATH not being set for dynamic libbfd dependencyMaciej W. Rozycki
2021-10-24LoongArch opcodes supportliuzhensong
2021-10-11z80/disassembler: call memory_error_func when appropriateAndrew Burgess
2021-10-11s12z/disassembler: call memory_error_func when appropriateAndrew Burgess
2021-10-07RISC-V: Support aliases for Zbs instructionsPhilipp Tomsich
2021-10-07RISC-V: Add support for Zbs instructionsPhilipp Tomsich
2021-10-07RISC-V: Split Zb[abc] into commented sectionsPhilipp Tomsich
2021-09-28x86: Print {bad} on invalid broadcast in OP_E_memoryCui,Lili
2021-09-27configure: regenerate in all projects that use libtool.m4Nick Alcock
2021-09-25PowerPC: Enable mfppr mfppr32, mtppr and mtppr32 extended mnemonics on POWER5Peter Bergner
2021-09-20riscv: print .2byte or .4byte before an unknown instruction encodingAndrew Burgess
2021-09-13[gdb/tdep] Reset force_thumb in parse_arm_disassembler_optionsTom de Vries
2021-09-08RISC-V: Pretty print values formed with lui and addiw.Jim Wilson
2021-09-06Add a sanity check to the init_nfp6000_mecsr_sec() function in the NFP disass...Yinjun Zhang
2021-09-03pj: asan: out of bounds, ubsan: left shift of negativeAlan Modra
2021-09-02Add support for the haiku operating system. These are the os support patches...Alexander von Gluck IV
2021-09-02Fix the V850 assembler's generation of relocations for the st.b instruction.Nick Clifton
2021-09-01nfp: add validity check of island and meYinjun Zhang
2021-08-30RISC-V: PR28291, Fix the gdb fails that PR27916 caused.Nelson Chu
2021-08-30RISC-V: PR27916, Support mapping symbols.Nelson Chu
2021-08-24FT32: Remove recursion in ft32_opcodeJames Bowman (FTDI-UK)
2021-08-19x86: Put back 3 aborts in OP_E_memoryH.J. Lu
2021-08-19x86: Avoid abort on invalid broadcastH.J. Lu
2021-08-17opcodes: Fix the auxiliary register numbers for ARC HSShahab Vahedi
2021-08-13PR28168: [CSKY] Fix stack overflow in disassemblerLifang Xia
2021-08-11Deprecate a.out support for NetBSD targets.John Ericson
2021-08-10Updated Serbian and Russian translations for various sub-directoriesNick Clifton
2021-08-05[PATCH 1/2] Enable Intel AVX512_FP16 instructionsCui,Lili
2021-08-04IBM Z: Remove lpswey parameterAndreas Krebbel
2021-07-27Correct gs264e bfd_mach in mips_arch_choices.Chenghua Xu
2021-07-26PATCH [9/10] arm: add 'pacg' instruction for Armv8.1-M pacbti extensionAndrea Corallo
2021-07-26PATCH [8/10] arm: add 'autg' instruction for Armv8.1-M pacbti extensionAndrea Corallo
2021-07-26PATCH [7/10] arm: add 'bxaut' instruction for Armv8.1-M pacbti extensionAndrea Corallo
2021-07-26PATCH [4/10] arm: add 'pac' instruction for Armv8.1-M pacbti extensionAndrea Corallo
2021-07-26PATCH [3/10] arm: add 'aut' instruction for Armv8.1-M pacbti extensionAndrea Corallo
2021-07-26PATCH [2/10] arm: add 'pacbti' instruction for Armv8.1-M pacbti extensionAndrea Corallo
2021-07-26PATCH [1/10] arm: add 'bti' instruction for Armv8.1-M pacbti extensionAndrea Corallo
2021-07-23x86: express unduly set rounding control bits in disassemblyJan Beulich
2021-07-22x86: drop dq{b,d}_modeJan Beulich
2021-07-22x86: drop vex_scalar_w_dq_modeJan Beulich
2021-07-22x86: drop xmm_m{b,w,d,q}_modeJan Beulich
2021-07-22x86: fold duplicate vector register printing codeJan Beulich
2021-07-22x86: drop vex_mode and vex_scalar_modeJan Beulich