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AgeCommit message (Expand)Author
2021-11-15sim: cris: touch up rvdummy handlingMike Frysinger
2021-11-15sim: cris: replace custom "dest" test field with new --argv0Mike Frysinger
2021-11-15sim: run: add --argv0 option to control argv[0]Mike Frysinger
2021-11-15sim: split program path out of argv vectorMike Frysinger
2021-11-15sim: bfin: fix mach/xfail usage in testsMike Frysinger
2021-11-13sim: sh: fix switch-bool warningsMike Frysinger
2021-11-13sim: sh: rework carry checks to not rely on integer overflowsMike Frysinger
2021-11-11sim: testsuite: drop sim_compile cover functionMike Frysinger
2021-11-11sim: cris: stop testing a.out explicitly [ld/13900]Mike Frysinger
2021-11-11sim: io: tweak compiler workaround with error outputMike Frysinger
2021-11-10sim: testsuite: delete unused arm remote host logicMike Frysinger
2021-11-10sim: synacor: simplify test generationMike Frysinger
2021-11-10sim: frv: flip trapdump default back to offMike Frysinger
2021-11-09sim: sh: simplify testsuite a bitMike Frysinger
2021-11-08sim: cris: clean up missing func prototype warningsMike Frysinger
2021-11-06sim: sh: fix conversion of PC to an integerMike Frysinger
2021-11-06sim: sh: clean up time(NULL) callMike Frysinger
2021-11-06sim: sh: break utime logic out of _WIN32 checkMike Frysinger
2021-11-06sim: sh: drop errno externMike Frysinger
2021-11-06sim: sh: fix isnan redefinition with mingw targetsMike Frysinger
2021-11-06sim: arm/bfin/rx: undefine page size from system headersMike Frysinger
2021-11-06sim: ppc: switch to libiberty environ.hMike Frysinger
2021-11-06sim: sh: enable -Werror everywhereMike Frysinger
2021-11-06sim: sh: fix uninitialized variable usage with pdmsbMike Frysinger
2021-11-06sim: sh: constify a few read-only lookup tablesMike Frysinger
2021-11-06sim: sh: fix various parentheses warningsMike Frysinger
2021-11-06sim: sh: fix unused-value warningsMike Frysinger
2021-11-06sim: sh: rework register layout with anonymous unions & structsMike Frysinger
2021-11-06sim: mips: use sim_fpu_to{32,64}u to fix build warningsTiezhu Yang
2021-11-06sim: clarify license text via COPYING fileMike Frysinger
2021-11-03sim: mips: fix missing prototype in multi-run generationMike Frysinger
2021-11-03sim: ppc: inline common sim-fpu.c logicMike Frysinger
2021-11-03sim: ppc: switch to common builds for callback objectsMike Frysinger
2021-11-03sim: mloop: mark a few conditionally used funcs as unusedMike Frysinger
2021-11-02sim: hoist cgen mloop rules up to common buildsMike Frysinger
2021-11-02sim: hoist mn10300 & v850 igen rules up to common buildsMike Frysinger
2021-11-02sim: hoist gencode & opc2c build rules up to common buildsMike Frysinger
2021-11-02gdb/sim: update my email addressAndrew Burgess
2021-11-01sim: iq2000: reduce -Wno-error scopeMike Frysinger
2021-11-01sim: lm32: reduce -Wno-error scopeMike Frysinger
2021-11-01sim: frv: reduce -Wno-error scopeMike Frysinger
2021-11-01sim: m32r: reduce -Wno-error scopeMike Frysinger
2021-11-01sim: mips: reduce -Wno-error scopeMike Frysinger
2021-11-01sim: erc32: reduce -Wno-error scopeMike Frysinger
2021-11-01sim: cris: reduce -Wno-error scopeMike Frysinger
2021-11-01sim: sh: reduce -Wno-error scopeMike Frysinger
2021-11-01sim: or1k: build with -WerrorMike Frysinger
2021-11-01sim: igen: minor build output alignment fixMike Frysinger
2021-11-01sim: ppc: fix the printf fix for 32-bit systemsMike Frysinger
2021-11-01sim: m68hc11: clean up pointer castsMike Frysinger
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