diff options
| author | Aditya Nandakumar <aditya_nandakumar@apple.com> | 2019-01-16 00:40:37 +0000 |
|---|---|---|
| committer | Aditya Nandakumar <aditya_nandakumar@apple.com> | 2019-01-16 00:40:37 +0000 |
| commit | 2299ac9fffedab9688896bbc12d3e419a152dc12 (patch) | |
| tree | a3a8f57815401fa1c13e36273ed7a93bcdafd414 /llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp | |
| parent | fe32bcd513ed4817708fd7dc4114590eb98ff6e6 (diff) | |
[GISel]: Add support for CSEing continuously during GISel passes.
https://reviews.llvm.org/D52803
This patch adds support to continuously CSE instructions during
each of the GISel passes. It consists of a GISelCSEInfo analysis pass
that can be used by the CSEMIRBuilder.
Diffstat (limited to 'llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp b/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp index c355a0e86d2..1cff1c8396e 100644 --- a/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp +++ b/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp @@ -73,7 +73,7 @@ bool MipsPreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) { auto *TPC = &getAnalysis<TargetPassConfig>(); MipsPreLegalizerCombinerInfo PCInfo; Combiner C(PCInfo, TPC); - return C.combineMachineInstrs(MF); + return C.combineMachineInstrs(MF, nullptr); } char MipsPreLegalizerCombiner::ID = 0; |