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| author | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2018-09-30 17:26:58 +0000 |
|---|---|---|
| committer | Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> | 2018-09-30 17:26:58 +0000 |
| commit | d14b882959d9d743e8396983cdc698a03bb1a12f (patch) | |
| tree | b1e06dd4d772e102dddc9b7cd61a2d77388b4eb3 /llvm/test | |
| parent | 84a00c9449cc5388af55e08f4a95ef260fa23169 (diff) | |
[PHIElimination] Lower a PHI node with only undef uses as IMPLICIT_DEF
Summary:
The lowering of PHI nodes used to detect if all inputs originated
from IMPLICIT_DEF's. If so the PHI node was replaced by an
IMPLICIT_DEF. Now we also consider undef uses when checking the
inputs. So if all inputs are implicitly defined or undef we
lower the PHI to an IMPLICIT_DEF. This makes
PHIElimination::LowerPHINode more consistent as it checks
both implicit and undef properties at later stages.
Reviewers: MatzeB, tstellar
Reviewed By: MatzeB
Subscribers: jvesely, nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D52558
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir b/llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir new file mode 100644 index 00000000000..61a3551c8a4 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir @@ -0,0 +1,69 @@ +# RUN: llc -mtriple amdgcn -run-pass livevars -run-pass phi-node-elimination -o - %s | FileCheck %s + +################################################################################ +# This test used to hit an assert in PHIElimination: +# PHIElimination::LowerPHINode(llvm::MachineBasicBlock&, llvm::MachineBasicBlock::iterator): Assertion `KillInst->readsRegister(SrcReg) && "Cannot find kill instruction"' + +--- +name: foo +tracksRegLiveness: true +body: | + bb.0: + S_CBRANCH_SCC0 %bb.2, implicit undef $scc + + bb.1: + %1:sreg_32_xm0 = S_MOV_B32 255 + S_BRANCH %bb.3 + + bb.2: + %2:sreg_32_xm0 = S_MOV_B32 254 + + bb.3: + dead %3:sreg_32_xm0 = PHI undef %2, %bb.2, undef %1, %bb.1 + %4:sreg_32_xm0 = PHI %2, %bb.2, %1, %bb.1 + S_NOP 0, implicit %4 +... + +# CHECK-LABEL: name: foo +# CHECK: bb.3: +# CHECK-NEXT: %3:sreg_32_xm0 = COPY killed %4 +# CHECK-NEXT: dead %2:sreg_32_xm0 = IMPLICIT_DEF +# CHECK-NEXT: S_NOP 0, implicit killed %3 + + +################################################################################ +# Similar test as above, but with swapped order for the PHI nodes. +# With this PHI node order we did not hit the assert, but we used to get +# +# bb.3: +# dead %3:sreg_32_xm0 = COPY killed %4 +# %2:sreg_32_xm0 = COPY %4 +# S_NOP 0, implicit killed %2 +# +# which looks weird regarding killed flags for %4. + +--- +name: bar +tracksRegLiveness: true +body: | + bb.0: + S_CBRANCH_SCC0 %bb.2, implicit undef $scc + + bb.1: + %1:sreg_32_xm0 = S_MOV_B32 255 + S_BRANCH %bb.3 + + bb.2: + %2:sreg_32_xm0 = S_MOV_B32 254 + + bb.3: + %4:sreg_32_xm0 = PHI %2, %bb.2, %1, %bb.1 + dead %3:sreg_32_xm0 = PHI undef %2, %bb.2, undef %1, %bb.1 + S_NOP 0, implicit %4 +... + +# CHECK-LABEL: name: bar +# CHECK: bb.3: +# CHECK-NEXT: dead %3:sreg_32_xm0 = IMPLICIT_DEF +# CHECK-NEXT: %2:sreg_32_xm0 = COPY killed %4 +# CHECK-NEXT: S_NOP 0, implicit killed %2 |