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authorNirav Dave <niravd@google.com>2019-01-15 17:09:23 +0000
committerNirav Dave <niravd@google.com>2019-01-15 17:09:23 +0000
commit57946df81e8748699b79634f1eb38a4fbf79e4d7 (patch)
tree5360fac2cc924109116b5a651e98ba31be0d5243 /llvm
parentf6aec44071b7efd716ed31154c63f53d94becfed (diff)
[SelectionDAG] Check membership of register in class for single
register constraints. NFCI. Now that X86's ST(7) constraints are fixed this check can be reinstated.
Diffstat (limited to 'llvm')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp7
1 files changed, 1 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 1db7d78caf8..871ab9b2988 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -7429,13 +7429,8 @@ static void GetRegistersForValue(SelectionDAG &DAG, const SDLoc &DL,
// Do not check for single registers.
if (AssignedReg) {
- Regs.push_back(AssignedReg);
- --NumRegs;
- if (NumRegs) {
for (; *I != AssignedReg; ++I)
- assert(I != RC->end() && "Didn't find reg!");
- ++I;
- }
+ assert(I != RC->end() && "AssignedReg should be member of RC");
}
for (; NumRegs; --NumRegs, ++I) {