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path: root/llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
AgeCommit message (Expand)Author
2019-01-15AMDGPU: Raise the priority of MAD24 in instruction selection.linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfigChangpeng Fang
2018-11-29[AMDGPU] Add and update scalar instructionsGraham Sellers
2018-11-12AMDGPU: Adding more median3 patternsAakanksha Patil
2018-10-22DAG: Change behavior of fminnum/fmaxnum nodesMatt Arsenault
2018-08-31AMDGPU: Remove remnants of old address space mappingMatt Arsenault
2018-08-21[AMDGPU] Support idot2 pattern.Farhana Aleen
2018-07-30AMDGPU: Reduce code size with fcanonicalize (fneg x)Matt Arsenault
2018-07-27AMDGPU/R600: Add MOV instructions to BFE patternsJan Vesely
2018-06-28AMDGPU: Separate R600 and GCN TableGen filesTom Stellard
2018-06-22AMDGPU: Add patterns for i32/i64 local atomic load/storeMatt Arsenault
2018-06-15[AMDGPU] Recognize x & ~(-1 << y) pattern.Roman Lebedev
2018-06-15[AMDGPU] Recognize x & ((1 << y) - 1) pattern.Roman Lebedev
2018-06-15[AMDGPU] Recognize x & (-1 >> (32 - y)) pattern.Roman Lebedev
2018-03-16[AMDGPU] Supported ds_write_b128 generation.Farhana Aleen
2018-03-09[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local a...Farhana Aleen
2018-02-07AMDGPU: Select BFI patterns with 64-bit intsMatt Arsenault
2018-01-29AMDGPU: Move ADDRIndirect complex pattern into R600Instructions.tdTom Stellard
2017-12-04AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instructionJan Vesely
2017-11-13AMDGPU: Select d16 loads into low component of registerMatt Arsenault
2017-10-24AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1)Marek Olsak
2017-10-23AMDGPU: Cleanup local atomic node namesMatt Arsenault
2017-10-03AMDGPU: Remove global isGCN predicatesMatt Arsenault
2017-09-20AMDGPU: Move r600 only code into r600 only td fileMatt Arsenault
2017-09-20AMDGPU: Match load d16 hi instructionsMatt Arsenault
2017-09-20AMDGPU: Cleanup load/store PatFragsMatt Arsenault
2017-09-20AMDGPU: Match store d16_hi instructionsMatt Arsenault
2017-08-30[AMDGPU] Use v_max_f* for fcanonicalizeStanislav Mekhanoshin
2017-08-16[AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodesDmitry Preobrazhensky
2017-07-29AMDGPU: Start selecting global instructionsMatt Arsenault
2017-04-26[AMDGPU][MC] Added check for truncation of SOPK imm operandDmitry Preobrazhensky
2017-03-27[AMDGPU] Get address space mapping by target triple environmentYaxun Liu
2017-02-27AMDGPU: Use v_med3_{f16|i16|u16}Matt Arsenault
2017-02-27AMDGPU: Support v2i16/v2f16 packed operationsMatt Arsenault
2017-02-23AMDGPU: Add another BFE patternMatt Arsenault
2017-02-21AMDGPU: Redefine clamp node as clamp 0.0-1.0Matt Arsenault
2017-02-02AMDGPU: Use source modifiers with f16->f32 conversionsMatt Arsenault
2017-01-31AMDGPU: Generalize matching of v_med3_f32Matt Arsenault
2017-01-13[AMDGPU] Implement f16 fcopysign and fcopysign(f32, f64)Konstantin Zhuravlyov
2017-01-12AMDGPU: Fix sub_oneuse being marked commutativeMatt Arsenault
2016-12-23AMDGPU: split ret/noret patterns for global atomicsJan Vesely
2016-12-22AMDGPU: Implement f16 fcanonicalizeMatt Arsenault
2016-11-13[AMDGPU] Add f16 support (VI+)Konstantin Zhuravlyov
2016-11-10AMDGPU: Add VI i16 supportTom Stellard
2016-11-04Revert "AMDGPU: Add VI i16 support"Tom Stellard
2016-11-03AMDGPU: Add VI i16 supportTom Stellard
2016-10-20[AMDGPU] add fcopysign(f64, f32) patternValery Pykhtin
2016-10-07Target: Remove unused patterns and transforms. NFC.Peter Collingbourne
2016-09-09AMDGPU] Assembler: better support for immediate literals in assembler.Sam Kolton
2016-09-05[AMDGPU] Refactor FLAT TD instructionsValery Pykhtin
2016-08-24AMDGPU : Add V_SAD_U32 instruction pattern.Wei Ding
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