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path: root/llvm/lib/Target/Hexagon
AgeCommit message (Expand)Author
2018-07-30[Hexagon] Simplify A4_rcmp[n]eqi R, 0Krzysztof Parzyszek
2018-07-25[Hexagon] Properly scale bit index when extracting elements from vNi1Krzysztof Parzyszek
2018-07-23[Hexagon] Handle unnamed globals in HexagonConstExprKrzysztof Parzyszek
2018-07-13[Hexagon] Avoid introducing calls into coalesced range of HVX vector pairsKrzysztof Parzyszek
2018-07-13[TableGen] Support multi-alternative pattern fragmentsUlrich Weigand
2018-07-11[CodeGen] Emit more precise AssertZext/AssertSext nodes.Eli Friedman
2018-07-10[Hexagon] Add implicit uses even when untied explicit uses are presentKrzysztof Parzyszek
2018-06-29[Hexagon] Remove unused instruction itineraties, NFCKrzysztof Parzyszek
2018-06-26[Hexagon] Add a "generic" cpuBrendon Cahoon
2018-06-20[Hexagon] Remove 'T' from HasVNN predicates, NFCKrzysztof Parzyszek
2018-06-19[Hexagon] Fix the value of HexagonII::TypeCVI_FIRSTKrzysztof Parzyszek
2018-06-19[Hexagon] Enforce restrictions on packetizing cache instructionsKrzysztof Parzyszek
2018-06-12[DAGCombiner] Recognize more patterns for ABSKrzysztof Parzyszek
2018-06-12[Hexagon] Make floating point operations expensive for vectorizationKrzysztof Parzyszek
2018-06-12[SelectionDAG] Provide default expansion for rotatesKrzysztof Parzyszek
2018-06-11[Hexagon] Late predicate producers cannot be used as dot-new sourcesKrzysztof Parzyszek
2018-06-06[Hexagon] Implement vector-pair zero as V6_vsubw_dvKrzysztof Parzyszek
2018-06-06[Hexagon] Split CTPOP of vector pairsKrzysztof Parzyszek
2018-06-06[MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixupPeter Smith
2018-06-05[Hexagon] Add pattern to generate 64-bit neg instructionKrzysztof Parzyszek
2018-06-05[Hexagon] Add more patterns for generating abs/absp instructionsKrzysztof Parzyszek
2018-06-05[Hexagon] Minor cleanups in isel loweringKrzysztof Parzyszek
2018-06-04Move Analysis/Utils/Local.h back to TransformsDavid Blaikie
2018-06-01[Hexagon] Avoid UB when shifting unsigned integer left by 32Krzysztof Parzyszek
2018-06-01[Hexagon] Select HVX code for vector CTPOP, CTLZ, and CTTZKrzysztof Parzyszek
2018-06-01[SelectionDAG] Expand UADDO/USUBO into ADD/SUBCARRY if legal for targetKrzysztof Parzyszek
2018-06-01Set ADDE/ADDC/SUBE/SUBC to expand by defaultAmaury Sechet
2018-05-30[Hexagon] Use vector align-left when shift amount fits in 3 bitsKrzysztof Parzyszek
2018-05-25Replace AA's uses of uint64_t with LocationSize; NFC.George Burgess IV
2018-05-25[Hexagon] Fix packing source vectors in shufflevector selectionKrzysztof Parzyszek
2018-05-22[Hexagon] Add patterns for accumulating HVX comparesKrzysztof Parzyszek
2018-05-21MC: Separate creating a generic object writer from creating a target object w...Peter Collingbourne
2018-05-21MC: Change MCAsmBackend::writeNopData() to take a raw_ostream instead of an M...Peter Collingbourne
2018-05-21Fix up a few grammar issues.Eric Christopher
2018-05-18Support: Simplify endian stream interface. NFCI.Peter Collingbourne
2018-05-18MC: Change the streamer ctors to take an object writer instead of a stream. N...Peter Collingbourne
2018-05-18[Hexagon] Generate post-increment for floating point typesBrendon Cahoon
2018-05-18[RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvancedShiva Chen
2018-05-17[Hexagon] Use addAliasForDirective for data directivesAlex Bradbury
2018-05-16[Hexagon] Fix the order of operands when selecting QCATKrzysztof Parzyszek
2018-05-16[Hexagon] Mark HVX vector predicate bitwise ops as legal, add patternsKrzysztof Parzyszek
2018-05-16Fix up a misleading format warning.Eric Christopher
2018-05-15[Hexagon] Remove unused function from subtargetKrzysztof Parzyszek
2018-05-15[Hexagon] Remove unused flag from subtarget and (non)corresponding testKrzysztof Parzyszek
2018-05-14[Hexagon] Add a target feature to control using small data sectionKrzysztof Parzyszek
2018-05-14[Hexagon] Add a target feature for generating new-value storesKrzysztof Parzyszek
2018-05-14[Hexagon] Add a target feature for memop generationKrzysztof Parzyszek
2018-05-14[Hexagon] Avoid predicate copies to integer registers from store-lockedKrzysztof Parzyszek
2018-05-14Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen
2018-05-09[Hexagon] Add patterns for vector shift-and-accumulateKrzysztof Parzyszek
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