summaryrefslogtreecommitdiff
path: root/llvm/lib/Target/RISCV
AgeCommit message (Expand)Author
2018-12-20[RISCV] Properly evaluate fixup_riscv_pcrel_lo12Alex Bradbury
2018-12-13[RISCV] Add support for the various RISC-V FMA instruction variantsAlex Bradbury
2018-12-07[Targets] Add errors for tiny and kernel codemodel on targets that don't supp...David Green
2018-12-01[RISCV] Remove RV64I SLLW/SRLW/SRAW patterns and add new test casesAlex Bradbury
2018-11-30[RISCV] Add additional CSR instruction aliases (imm. operands)Alex Bradbury
2018-11-30[RISCV] Add UNIMP instruction (32- and 16-bit forms)Alex Bradbury
2018-11-30[TargetLowering][RISCV] Introduce isSExtCheaperThanZExt hook and implement fo...Alex Bradbury
2018-11-30[RISCV] Introduce codegen patterns for instructions introduced in RV64IAlex Bradbury
2018-11-29[RISCV] Implement codegen for cmpxchg on RV32IAAlex Bradbury
2018-11-28[RISCV] Support .option push and .option popAlex Bradbury
2018-11-16[RISCV][NFC] Define and use the new CA instruction formatAlex Bradbury
2018-11-16[RISCV] Constant materialisation for RV64IAlex Bradbury
2018-11-15[RISCV] Mark C.EBREAK instruction as having side effectsAlex Bradbury
2018-11-15[RISCV] Mark FREM as ExpandAlex Bradbury
2018-11-15[RISCV] Introduce the RISCVMatInt::generateInstSeq helperAlex Bradbury
2018-11-12[RISCV] Support .option relax and .option norelaxAlex Bradbury
2018-11-09[RISCV] Avoid unnecessary XOR for seteq/setne 0Alex Bradbury
2018-11-02[RISCV] Add some missing expansions for floating-point intrinsicsAlex Bradbury
2018-10-25[RISCV] Use PatFrags for variable shift patternsAlex Bradbury
2018-10-12[RISCV] Eliminate unnecessary masking of promoted shift amountsAlex Bradbury
2018-10-11[RISCV] Fix disassembling of fence instruction with invalid fieldAna Pazos
2018-10-06[RISCV] Compress addiw rd, x0, simm6 to c.li rd, simm6Alex Bradbury
2018-10-04[RISCV] Support named operands for CSR instructions.Ana Pazos
2018-10-04[RISCV] Remove overzealous is64Bit checksAlex Bradbury
2018-10-04[RISCV] Bugfix for floats passed on the stack with the ILP32 ABI on RV32FAlex Bradbury
2018-10-04[RISCV][NFC] Fix naming of RISCVISelLowering::{LowerRETURNADDR,LowerFRAMEADDR}linaro-local/ci/tcwg-llvm-kernel-baseline-aarch64-master-stableAlex Bradbury
2018-10-03[RISCV] Handle redundant SplitF64+BuildPairF64 pairs in a DAGCombineAlex Bradbury
2018-10-03[RISCV][NFC] Refactor LocVT<->ValVT converstion in RISCVISelLoweringAlex Bradbury
2018-10-03[RISCV][NFCI] Handle redundant splitf64+buildpairf64 pairs during instruction...Alex Bradbury
2018-10-03[RISCV][NFC] Refactor RISCVDAGToDAGISel::SelectAlex Bradbury
2018-10-03[RISCV] Gate float<->int and double<->int conversion patterns on IsRV32Alex Bradbury
2018-10-03[RISCV] Remove XLenVT==i32 assumptions from RISCVInstrInfo tdAlex Bradbury
2018-10-03[RISCV] Gate simm32 materialisation pattern and SW pattern on IsRV32Alex Bradbury
2018-09-20[RISCV][MC] Modify evaluateConstantImm interface to allow reuse from addExprAlex Bradbury
2018-09-20[RISCV][MC] Improve parsing of jal/j operandsAlex Bradbury
2018-09-19[RISCV] Codegen for i8, i16, and i32 atomicrmw with RV32AAlex Bradbury
2018-09-18[RISCV][MC] Use a custom ParserMethod for the bare_symbol operand typeAlex Bradbury
2018-09-18[RISCV][MC] Reject bare symbols for the simm12 operand typeAlex Bradbury
2018-09-18[RISCV][MC] Tighten up checking of sybol operands to lui and auipcAlex Bradbury
2018-09-13 [RISCV][MC] Reject bare symbols for the simm6 and simm6nonzero operand typesAna Pazos
2018-09-13[RISCV] Fix decoding of invalid instruction with C extension enabled.Ana Pazos
2018-09-10[Target] Untangle disassemblersBenjamin Kramer
2018-09-07[RISCV] Fix crash in decoding instruction with unknown floating point roundin...Ana Pazos
2018-09-07[RISCV] Fix AddressSanitizer heap-buffer-overflow in disassemblingAna Pazos
2018-08-30 [RISCV] Fixed SmallVector.h Assertion `idx < size()'Ana Pazos
2018-08-27[RISCV] atomic_store_nn have a different layout to regular storeRoger Ferrer Ibanez
2018-08-24[RISCV] Fixed Assertion`Kind == Immediate && "Invalid type access!"' failed.Ana Pazos
2018-08-24 [RISCV] Fix std::advance slownessAna Pazos
2018-08-17[RISCV] Remove unused functionRoger Ferrer Ibanez
2018-08-14[RISCV] Fix incorrect use of MCInstBuilderRoger Ferrer Ibanez
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-17 00:24:08 +0000