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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-03-15 18:28:54 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-03-15 18:28:54 +0000 |
| commit | 1ec395523d89878edc86889c00c117ab2f4b88eb (patch) | |
| tree | 463f529a0f5d8b940aa530d4ec06d57799193a50 | |
| parent | 775bf626982dc8b22e92af244fd58962a651c4dc (diff) | |
[Thumb2] Regenerate rotate tests
| -rw-r--r-- | llvm/test/CodeGen/Thumb2/thumb2-ror.ll | 33 |
1 files changed, 24 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/Thumb2/thumb2-ror.ll b/llvm/test/CodeGen/Thumb2/thumb2-ror.ll index 71b00153c298..90d92014ceb6 100644 --- a/llvm/test/CodeGen/Thumb2/thumb2-ror.ll +++ b/llvm/test/CodeGen/Thumb2/thumb2-ror.ll @@ -1,21 +1,36 @@ -; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s -; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s -check-prefix=THUMB1 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s +; RUN: llc < %s -mtriple=thumb-eabi | FileCheck %s -check-prefix=THUMB1 -; CHECK-LABEL: f1: -; CHECK: ror.w r0, r0, #22 define i32 @f1(i32 %a) { +; CHECK-LABEL: f1: +; CHECK: @ %bb.0: +; CHECK-NEXT: ror.w r0, r0, #22 +; CHECK-NEXT: bx lr +; +; THUMB1-LABEL: f1: +; THUMB1: @ %bb.0: +; THUMB1-NEXT: movs r1, #22 +; THUMB1-NEXT: rors r0, r1 +; THUMB1-NEXT: bx lr %l8 = shl i32 %a, 10 %r8 = lshr i32 %a, 22 %tmp = or i32 %l8, %r8 ret i32 %tmp } -; CHECK-LABEL: f2: -; CHECK-NOT: and -; CHECK: ror -; THUMB1: f2 -; THUMB1: and define i32 @f2(i32 %v, i32 %nbits) { +; CHECK-LABEL: f2: +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: rors r0, r1 +; CHECK-NEXT: bx lr +; +; THUMB1-LABEL: f2: +; THUMB1: @ %bb.0: @ %entry +; THUMB1-NEXT: movs r2, #31 +; THUMB1-NEXT: ands r2, r1 +; THUMB1-NEXT: rors r0, r2 +; THUMB1-NEXT: bx lr entry: %and = and i32 %nbits, 31 %shr = lshr i32 %v, %and |