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-rw-r--r--clang/unittests/Format/FormatTestVerilog.cpp69
-rw-r--r--clang/unittests/Format/TokenAnnotatorTest.cpp7
2 files changed, 76 insertions, 0 deletions
diff --git a/clang/unittests/Format/FormatTestVerilog.cpp b/clang/unittests/Format/FormatTestVerilog.cpp
index 30fe334a83f5..8b3b10c982ef 100644
--- a/clang/unittests/Format/FormatTestVerilog.cpp
+++ b/clang/unittests/Format/FormatTestVerilog.cpp
@@ -139,6 +139,75 @@ TEST_F(FormatTestVerilog, Delay) {
"x = x;"));
}
+TEST_F(FormatTestVerilog, Hierarchy) {
+ verifyFormat("module x;\n"
+ "endmodule");
+ // Test that the end label is on the same line as the end keyword.
+ verifyFormat("module x;\n"
+ "endmodule : x");
+ // Test that things inside are indented.
+ verifyFormat("module x;\n"
+ " generate\n"
+ " endgenerate\n"
+ "endmodule");
+ verifyFormat("program x;\n"
+ " generate\n"
+ " endgenerate\n"
+ "endprogram");
+ verifyFormat("interface x;\n"
+ " generate\n"
+ " endgenerate\n"
+ "endinterface");
+ verifyFormat("task x;\n"
+ " generate\n"
+ " endgenerate\n"
+ "endtask");
+ verifyFormat("function x;\n"
+ " generate\n"
+ " endgenerate\n"
+ "endfunction");
+ verifyFormat("class x;\n"
+ " generate\n"
+ " endgenerate\n"
+ "endclass");
+ // Test that they nest.
+ verifyFormat("module x;\n"
+ " program x;\n"
+ " program x;\n"
+ " endprogram\n"
+ " endprogram\n"
+ "endmodule");
+ // Test that an extern declaration doesn't change the indentation.
+ verifyFormat("extern module x;\n"
+ "x = x;");
+ // Test complex headers
+ verifyFormat("extern module x\n"
+ " import x.x::x::*;\n"
+ " import x;\n"
+ " #(parameter x)\n"
+ " (output x);");
+ verifyFormat("module x\n"
+ " import x.x::x::*;\n"
+ " import x;\n"
+ " #(parameter x)\n"
+ " (output x);\n"
+ " generate\n"
+ " endgenerate\n"
+ "endmodule : x");
+ verifyFormat("virtual class x\n"
+ " (x)\n"
+ " extends x(x)\n"
+ " implements x, x, x;\n"
+ " generate\n"
+ " endgenerate\n"
+ "endclass : x\n");
+ verifyFormat("function automatic logic [1 : 0] x\n"
+ " (input x);\n"
+ " generate\n"
+ " endgenerate\n"
+ "endfunction : x");
+}
+
TEST_F(FormatTestVerilog, If) {
verifyFormat("if (x)\n"
" x = x;");
diff --git a/clang/unittests/Format/TokenAnnotatorTest.cpp b/clang/unittests/Format/TokenAnnotatorTest.cpp
index afc673961caf..9fe89eead213 100644
--- a/clang/unittests/Format/TokenAnnotatorTest.cpp
+++ b/clang/unittests/Format/TokenAnnotatorTest.cpp
@@ -831,6 +831,13 @@ TEST_F(TokenAnnotatorTest, UnderstandsVerilogOperators) {
ASSERT_EQ(Tokens.size(), 7u);
EXPECT_TOKEN(Tokens[1], tok::colon, TT_VerilogBlockLabelColon);
EXPECT_TOKEN(Tokens[4], tok::colon, TT_VerilogBlockLabelColon);
+ // Test that the dimension colon is annotated correctly.
+ Tokens = Annotate("var [1 : 0] x;");
+ ASSERT_EQ(Tokens.size(), 9u) << Tokens;
+ EXPECT_TOKEN(Tokens[3], tok::colon, TT_BitFieldColon);
+ Tokens = Annotate("extern function [1 : 0] x;");
+ ASSERT_EQ(Tokens.size(), 10u) << Tokens;
+ EXPECT_TOKEN(Tokens[4], tok::colon, TT_BitFieldColon);
}
} // namespace