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authorWilco <wdijkstr@arm.com>2014-06-02 12:44:21 +0100
committerWill Newton <will.newton@linaro.org>2014-06-06 12:10:04 +0100
commit78ce27f9eef44c7d24df56c1c31124db9ad99b48 (patch)
tree25191156a724a6f616cd19c75c66bc9a34ef9874
parente4e25824bf80c63426e1f55831ecdbbe2fdca990 (diff)
Remove ISB after FPCR write.
-rw-r--r--libc/ports/ChangeLog.aarch64.linaro5
-rw-r--r--libc/ports/sysdeps/aarch64/fpu/fpu_control.h7
2 files changed, 7 insertions, 5 deletions
diff --git a/libc/ports/ChangeLog.aarch64.linaro b/libc/ports/ChangeLog.aarch64.linaro
index a3460ffc3..65de2f98c 100644
--- a/libc/ports/ChangeLog.aarch64.linaro
+++ b/libc/ports/ChangeLog.aarch64.linaro
@@ -1,5 +1,10 @@
2014-06-02 Wilco <wdijkstr@arm.com>
+ * sysdeps/aarch64/fpu/fpu_control.h (_FPU_SETCW): Remove ISB after
+ FPCR write.
+
+2014-06-02 Wilco <wdijkstr@arm.com>
+
[BZ #17009]
* sysdeps/aarch64/fpu/feupdateenv (feupdateenv):
Rewrite to reduce FPCR/FPSR accesses.
diff --git a/libc/ports/sysdeps/aarch64/fpu/fpu_control.h b/libc/ports/sysdeps/aarch64/fpu/fpu_control.h
index 6a265e89b..d5a890d99 100644
--- a/libc/ports/sysdeps/aarch64/fpu/fpu_control.h
+++ b/libc/ports/sysdeps/aarch64/fpu/fpu_control.h
@@ -24,11 +24,8 @@
#define _FPU_GETCW(fpcr) \
__asm__ __volatile__ ("mrs %0, fpcr" : "=r" (fpcr))
-#define _FPU_SETCW(fpcr) \
- { \
- __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr)); \
- __asm__ __volatile__ ("isb"); \
- }
+#define _FPU_SETCW(fpcr) \
+ __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr))
#define _FPU_GETFPSR(fpsr) \
__asm__ __volatile__ ("mrs %0, fpsr" : "=r" (fpsr))