diff options
author | Wilco <wdijkstr@arm.com> | 2014-06-02 12:20:17 +0100 |
---|---|---|
committer | Will Newton <will.newton@linaro.org> | 2014-06-06 12:08:20 +0100 |
commit | e4e25824bf80c63426e1f55831ecdbbe2fdca990 (patch) | |
tree | 15e0c8b59605f0ad5ffd87078126b168d062ecfd | |
parent | 2bf7179f31bdade372f3fc8763a9a9a837b77c5f (diff) |
Rewrite feupdateenv (BZ 17009).
-rw-r--r-- | libc/ports/ChangeLog.aarch64.linaro | 6 | ||||
-rw-r--r-- | libc/ports/sysdeps/aarch64/fpu/feupdateenv.c | 59 |
2 files changed, 60 insertions, 5 deletions
diff --git a/libc/ports/ChangeLog.aarch64.linaro b/libc/ports/ChangeLog.aarch64.linaro index 411359d17..a3460ffc3 100644 --- a/libc/ports/ChangeLog.aarch64.linaro +++ b/libc/ports/ChangeLog.aarch64.linaro @@ -1,3 +1,9 @@ +2014-06-02 Wilco <wdijkstr@arm.com> + + [BZ #17009] + * sysdeps/aarch64/fpu/feupdateenv (feupdateenv): + Rewrite to reduce FPCR/FPSR accesses. + 2014-05-20 Will Newton <will.newton@linaro.org> * sysdeps/unix/sysv/linux/aarch64/nptl/sysdep-cancel.h (PSEUDO): diff --git a/libc/ports/sysdeps/aarch64/fpu/feupdateenv.c b/libc/ports/sysdeps/aarch64/fpu/feupdateenv.c index 6d64a9b72..ac2f6fe7f 100644 --- a/libc/ports/sysdeps/aarch64/fpu/feupdateenv.c +++ b/libc/ports/sysdeps/aarch64/fpu/feupdateenv.c @@ -22,16 +22,65 @@ int feupdateenv (const fenv_t *envp) { + fpu_control_t fpcr; + fpu_control_t fpcr_new; + fpu_control_t updated_fpcr; fpu_fpsr_t fpsr; + fpu_fpsr_t fpsr_new; + int excepts; - /* Get the current exception state. */ + _FPU_GETCW (fpcr); _FPU_GETFPSR (fpsr); + excepts = fpsr & FE_ALL_EXCEPT; - /* Install new environment. */ - fesetenv (envp); + if ((envp != FE_DFL_ENV) && (envp != FE_NOMASK_ENV)) + { + fpcr_new = envp->__fpcr; + fpsr_new = envp->__fpsr | excepts; - /* Raise the saved exceptions. */ - feraiseexcept (fpsr & FE_ALL_EXCEPT); + if (fpcr != fpcr_new) + _FPU_SETCW (fpcr_new); + + if (fpsr != fpsr_new) + _FPU_SETFPSR (fpsr_new); + + if (excepts & (fpcr_new >> FE_EXCEPT_SHIFT)) + return feraiseexcept (excepts); + + return 0; + } + + fpcr_new = fpcr & _FPU_RESERVED; + fpsr_new = fpsr & (_FPU_FPSR_RESERVED | FE_ALL_EXCEPT); + + if (envp == FE_DFL_ENV) + { + fpcr_new |= _FPU_DEFAULT; + fpsr_new |= _FPU_FPSR_DEFAULT; + } + else + { + fpcr_new |= _FPU_FPCR_IEEE; + fpsr_new |= _FPU_FPSR_IEEE; + } + + _FPU_SETFPSR (fpsr_new); + + if (fpcr != fpcr_new) + { + _FPU_SETCW (fpcr_new); + + /* Trapping exceptions are optional in AArch64; the relevant enable + bits in FPCR are RES0 hence the absence of support can be detected + by reading back the FPCR and comparing with the required value. */ + _FPU_GETCW (updated_fpcr); + + if (fpcr_new & ~updated_fpcr) + return 1; + } + + if (excepts & (fpcr_new >> FE_EXCEPT_SHIFT)) + return feraiseexcept (excepts); return 0; } |