Merge from FSF arm/aarch64-4.7-branch r196346..r196381.

6 files changed, 84 insertions, 9 deletions

diff --git a/ChangeLog.linaro b/ChangeLog.linaro
index ec86ac05d4e..21e8f2486ef 100644
--- a/ChangeLog.linaro
+++ b/ChangeLog.linaro
@@ -1,5 +1,50 @@
 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
 
+	Merge from FSF arm/aarch64-4.7-branch r196346..r196381.
+
+	Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196346:
+	[AArch64/AArch64-4.7] Fix warning - aarch64_simd_make_constant has no prototype.
+	
+	gcc/
+	* config/aarch64/aarch64.c
+	(aarch64_simd_make_constant): Make static.
+
+	Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196348:
+	[AArch64/AArch64-4.7] Fix warning - No previous prototype for aarch64_init_simd_builtins.
+	
+	gcc/
+	* config/aarch64/aarch64-builtins.c
+	(aarch64_init_simd_builtins): Make static.
+
+	Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196351:
+	[AArch64/AArch64-4.7] Fix warning - aarch64_mangle_type has no prototype.
+	
+	gcc/
+	* config/aarch64/aarch64.c (aarch64_mangle_type): Make static.
+
+	Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196353:
+	[AArch64/AArch64-4.7] Fix warning - Unused variable in aarch64_float_const_representable.
+	
+	gcc/
+	* config/aarch64/aarch64.c
+	(aarch64_float_const_representable): Remove unused variable.
+
+	Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196375:
+	[AArch64-4.7] Fix warning: TARGET_FIXED_CONDITION_CODE_REGS redefined.
+	
+	gcc/
+	* config/aarch64/aarch64.c:
+	Fix typo in `#undef TARGET_FIXED_CONDITION_CODE_REGS'
+
+	Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196381:
+	[AArch64/AArch64-4.7][libgcc] Silence warnings in sync-cache.c
+	
+	libgcc/
+	* config/aarch64/sync-cache.c
+	(__aarch64_sync_cache_range): Silence warnings.
+
+2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
+
 	Merge from FSF GCC 4.7.3 (svn branches/gcc-4_7-branch 197188).
 
 2013-04-03  Christophe Lyon  <christophe.lyon@linaro.org>
diff --git a/gcc/ChangeLog.aarch64 b/gcc/ChangeLog.aarch64
index f2b93b156bd..d6c870e5575 100644
--- a/gcc/ChangeLog.aarch64
+++ b/gcc/ChangeLog.aarch64
@@ -1,3 +1,27 @@
+2013-03-01  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/aarch64/aarch64.c:
+	Fix typo in `#undef TARGET_FIXED_CONDITION_CODE_REGS'
+
+2013-02-28  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/aarch64/aarch64.c
+	(aarch64_float_const_representable): Remove unused variable.
+
+2013-02-28  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/aarch64/aarch64.c (aarch64_mangle_type): Make static.
+
+2013-02-28  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/aarch64/aarch64-builtins.c
+	(aarch64_init_simd_builtins): Make static.
+
+2013-02-28  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/aarch64/aarch64.c
+	(aarch64_simd_make_constant): Make static.
+
 2013-02-22  James Greenhalgh  <james.greenhalgh@arm.com>
 
 	* config/aarch64/aarch64-simd-builtins.def: Add copyright header.
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index d1b229e473b..fc346e7fa41 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -310,7 +310,7 @@ static GTY(()) tree aarch64_builtin_decls[AARCH64_BUILTIN_MAX];
 #define NUM_DREG_TYPES 6
 #define NUM_QREG_TYPES 6
 
-void
+static void
 aarch64_init_simd_builtins (void)
 {
   unsigned int i, fcode = AARCH64_SIMD_BUILTIN_BASE + 1;
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index ed5b6bbf270..5bc6f843357 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -5979,7 +5979,7 @@ static aarch64_simd_mangle_map_entry aarch64_simd_mangle_map[] = {
 
 /* Implement TARGET_MANGLE_TYPE.  */
 
-const char *
+static const char *
 aarch64_mangle_type (const_tree type)
 {
   /* The AArch64 ABI documents say that "__va_list" has to be
@@ -6581,7 +6581,7 @@ aarch64_simd_dup_constant (rtx vals)
    constants (for vec_init) or CONST_VECTOR, efficiently into a
    register.  Returns an RTX to copy into the register, or NULL_RTX
    for a PARALLEL that can not be converted into a CONST_VECTOR.  */
-rtx
+static rtx
 aarch64_simd_make_constant (rtx vals)
 {
   enum machine_mode mode = GET_MODE (vals);
@@ -7083,7 +7083,7 @@ aarch64_float_const_representable_p (rtx x)
   /* This represents our current view of how many bits
      make up the mantissa.  */
   int point_pos = 2 * HOST_BITS_PER_WIDE_INT - 1;
-  int sign, exponent;
+  int exponent;
   unsigned HOST_WIDE_INT mantissa, mask;
   HOST_WIDE_INT m1, m2;
   REAL_VALUE_TYPE r, m;
@@ -7100,8 +7100,7 @@ aarch64_float_const_representable_p (rtx x)
       || REAL_VALUE_MINUS_ZERO (r))
     return false;
 
-  /* Extract sign and exponent.  */
-  sign = REAL_VALUE_NEGATIVE (r) ? 1 : 0;
+  /* Extract exponent.  */
   r = real_value_abs (&r);
   exponent = REAL_EXP (&r);
 
@@ -7820,7 +7819,7 @@ aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
 #undef TARGET_EXPAND_BUILTIN_VA_START
 #define TARGET_EXPAND_BUILTIN_VA_START aarch64_expand_builtin_va_start
 
-#undef TARGET_FIXED_CONDITION_CODE_REG
+#undef TARGET_FIXED_CONDITION_CODE_REGS
 #define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs
 
 #undef TARGET_FUNCTION_ARG
diff --git a/libgcc/ChangeLog.aarch64 b/libgcc/ChangeLog.aarch64
index b8be3cf88dd..bbfe2d36a1d 100644
--- a/libgcc/ChangeLog.aarch64
+++ b/libgcc/ChangeLog.aarch64
@@ -1,3 +1,8 @@
+2013-03-01  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/aarch64/sync-cache.c
+	(__aarch64_sync_cache_range): Silence warnings.
+
 2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>
 
 	* config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cast the
diff --git a/libgcc/config/aarch64/sync-cache.c b/libgcc/config/aarch64/sync-cache.c
index 66b7afedc1f..cc1d8ff7099 100644
--- a/libgcc/config/aarch64/sync-cache.c
+++ b/libgcc/config/aarch64/sync-cache.c
@@ -18,6 +18,8 @@
    along with GCC; see the file COPYING3.  If not see
    <http://www.gnu.org/licenses/>.  */
 
+void __aarch64_sync_cache_range (const void *, const void *);
+
 void
 __aarch64_sync_cache_range (const void *base, const void *end)
 {
@@ -43,7 +45,7 @@ __aarch64_sync_cache_range (const void *base, const void *end)
   address = (const char*) ((__UINTPTR_TYPE__) base
 			   & ~ (__UINTPTR_TYPE__) (dcache_lsize - 1));
 
-  for (address; address < (const char *) end; address += dcache_lsize)
+  for (; address < (const char *) end; address += dcache_lsize)
     asm volatile ("dc\tcvau, %0"
 		  :
 		  : "r" (address)
@@ -55,7 +57,7 @@ __aarch64_sync_cache_range (const void *base, const void *end)
   address = (const char*) ((__UINTPTR_TYPE__) base
 			   & ~ (__UINTPTR_TYPE__) (icache_lsize - 1));
 
-  for (address; address < (const char *) end; address += icache_lsize)
+  for (; address < (const char *) end; address += icache_lsize)
     asm volatile ("ic\tivau, %0"
 		  :
 		  : "r" (address)