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authorYvan Roux <yvan.roux@linaro.org>2016-09-04 14:30:49 +0200
committerYvan Roux <yvan.roux@linaro.org>2016-09-07 22:08:41 +0200
commit3d5553db199eba2a88dc3923cbe953b0895d643e (patch)
tree11e4556e8292c5a3845f343792d34ae1dd289d1a
parentb52a5acf8da6ba25c9b0eef20c9fe6b59dd68128 (diff)
gcc/
Backport from trunk r239772. 2016-08-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/70473 * config/arm/cortex-a8-neon.md (cortex_a8_vfp_muld): Reduce reservation duration to 15 cycles. (cortex_a8_vfp_macs): Likewise. (cortex_a8_vfp_macd): Likewise. (cortex_a8_vfp_divs): Likewise. (cortex_a8_vfp_divd): Likewise. Change-Id: I5af61ce70108b3bff57dba89c8cdd07ab628792d
-rw-r--r--gcc/config/arm/cortex-a8-neon.md14
1 files changed, 9 insertions, 5 deletions
diff --git a/gcc/config/arm/cortex-a8-neon.md b/gcc/config/arm/cortex-a8-neon.md
index 45f861f6c6f..b16c29974a7 100644
--- a/gcc/config/arm/cortex-a8-neon.md
+++ b/gcc/config/arm/cortex-a8-neon.md
@@ -357,30 +357,34 @@
(eq_attr "type" "fmuls"))
"cortex_a8_vfp,cortex_a8_vfplite*11")
+;; Don't model a reservation for more than 15 cycles as this explodes the
+;; state space of the automaton for little gain. It is unlikely that the
+;; scheduler will find enough instructions to hide the full latency of the
+;; instructions.
(define_insn_reservation "cortex_a8_vfp_muld" 17
(and (eq_attr "tune" "cortexa8")
(eq_attr "type" "fmuld"))
- "cortex_a8_vfp,cortex_a8_vfplite*16")
+ "cortex_a8_vfp,cortex_a8_vfplite*15")
(define_insn_reservation "cortex_a8_vfp_macs" 21
(and (eq_attr "tune" "cortexa8")
(eq_attr "type" "fmacs,ffmas"))
- "cortex_a8_vfp,cortex_a8_vfplite*20")
+ "cortex_a8_vfp,cortex_a8_vfplite*15")
(define_insn_reservation "cortex_a8_vfp_macd" 26
(and (eq_attr "tune" "cortexa8")
(eq_attr "type" "fmacd,ffmad"))
- "cortex_a8_vfp,cortex_a8_vfplite*25")
+ "cortex_a8_vfp,cortex_a8_vfplite*15")
(define_insn_reservation "cortex_a8_vfp_divs" 37
(and (eq_attr "tune" "cortexa8")
(eq_attr "type" "fdivs, fsqrts"))
- "cortex_a8_vfp,cortex_a8_vfplite*36")
+ "cortex_a8_vfp,cortex_a8_vfplite*15")
(define_insn_reservation "cortex_a8_vfp_divd" 65
(and (eq_attr "tune" "cortexa8")
(eq_attr "type" "fdivd, fsqrtd"))
- "cortex_a8_vfp,cortex_a8_vfplite*64")
+ "cortex_a8_vfp,cortex_a8_vfplite*15")
;; Comparisons can actually take 7 cycles sometimes instead of four,
;; but given all the other instructions lumped into type=ffarith that