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authorRichard Kenner <kenner@gcc.gnu.org>1998-03-03 11:18:11 -0500
committerRichard Kenner <kenner@gcc.gnu.org>1998-03-03 11:18:11 -0500
commita69223ed4ad60434d60d77d6a46222869bab37e0 (patch)
treea63f69dc95ad7369ff8aa9c023a8037df01675e1
parent2907a9e9e350ce0cfc21d3e3af266794cd599e1a (diff)
(expand_increment): If op0 is a MEM, enqueue insn to load it into a
REG, not just the one to store it. From-SVN: r18388
-rw-r--r--gcc/expr.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/gcc/expr.c b/gcc/expr.c
index d408c3e2fab..8d03d29bc9f 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -10033,7 +10033,11 @@ expand_increment (exp, post, ignore)
rtx temp, result;
op0 = change_address (op0, VOIDmode, addr);
- temp = force_reg (GET_MODE (op0), op0);
+ if (GET_CODE (op0) != REG)
+ temp = gen_reg_rtx (GET_MODE (op0));
+ else
+ temp = op0;
+
if (! (*insn_operand_predicate[icode][2]) (op1, mode))
op1 = force_reg (mode, op1);
@@ -10041,6 +10045,9 @@ expand_increment (exp, post, ignore)
the instructions in reverse order. */
enqueue_insn (op0, gen_move_insn (op0, temp));
result = enqueue_insn (temp, GEN_FCN (icode) (temp, temp, op1));
+ if (temp != op0)
+ result = enqueue_insn (temp, gen_move_insn (temp, op0));
+
return result;
}
}